1. A slotted expandable centraliser.
2. A centraliser as claimed in claim 1, having a body with a bore to accept a tubular, and being adapted to expand radially from a non-expanded configuration to an expanded configuration.
3. A centraliser as claimed in claim 2, wherein the slots are longitudinal in the non-expanded configuration and diamond-shaped in the expanded configuration.
4. A centraliser as claimed in claim 2, being adapted to receive an expandable tubular and adapted to deform radially with the expandable tubular upon expansion of the tubular.
5. A centraliser as claimed in claim 2, wherein the centraliser has at least one blade that projects radially outward of the body in the non-expanded configuration.
6. A centraliser as claimed in claim 5, wherein the at least one blade projects radially outward of the body in the expanded configuration.
7. A centraliser as claimed in claim 5, wherein the at least one blade is adapted to change configuration during expansion of the centraliser.
8. A centraliser as claimed in claim 5, wherein the at least one blade is adapted to retain its configuration during expansion of the centraliser.
9. A centraliser as claimed in claim 5, wherein the at least one blade has the same thickness as the body.
10. A centraliser as claimed in claim 1, having slotted portions circumferentially adjacent to non-slotted portions.
11. A centraliser as claimed in claim 10, the centralizer having a body with a bore to accept a tubular, and being adapted to expand radially from a non-expanded configuration to an expanded configuration, and at least one blade that projects radially outward of the body in the non-expanded configuration, wherein the at least one blade is located in a non-slotted portion.
12. A centraliser as claimed in claim 1, wherein the slots are uniformly distributed over the centraliser.
13. A centraliser as claimed in claim 1 wherein the slots are arranged in longitudinally aligned rows with slots in adjacent rows being axially offset with respect to one another so that the ends of circumferentially adjacent slots overlap.
14. A centraliser as claimed in claim 1, wherein the slots are of uniform dimension.
15. A centraliser as claimed in claim 1, being adapted to deform plastically.
16. A centraliser as claimed in claim 1, being adapted to deform elastically.
17. A centraliser as claimed in claim 1, being a casing centraliser.
18. A centraliser assembly comprising a slotted expandable centraliser which has a body with a bore to accept a tubular, and is radially expandable from a non-expanded configuration to an expanded configuration; and an expandable tubular, located in the bore of the centraliser.
19. An assembly as claimed in claim 18, wherein the centraliser is a casing centraliser.
20. An assembly as claimed in claim 18, wherein the tubular comprises casing, liner or a screen.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A digital signal equalizer comprising
a plurality of multiplexers, wherein number of multiplexers defines resolution of equalization, wherein the plurality of multiplexers are configured in groups, wherein number of groups is based on number of taps, wherein number of multiplexers associated with a particular group is based on equalization range for the group, and wherein the multiplexers in each group select a digital value associated with the cursor or a non-cursor tap associated with the group.
2. The equalizer of claim 1, wherein the multiplexers select the appropriate digital value based on equalization desired.
3. The equalizer of claim 2, wherein the multiplexers receive coefficients based on the desired equalization and the coefficients are used to select the appropriate digital value.
4. The equalizer of claim 1, wherein the digital value associated with the non-cursor tap is a complement of the tap digital signal.
5. The equalizer of claim 1, wherein the digital value associated with the non-cursor tap is selected as a complement of the tap digital signal or the tap digital signal, where the selection is platform dependent.
6. The equalizer of claim 1, wherein equalization can be turned off by selecting the digital value associated with the cursor for each multiplexer.
7. The equalizer of claim 1, where number of taps considered in equalization can be reduced by selecting the digital value associated with the cursor for each multiplexer in a tap group where the tap is to be excluded from equalization.
8. The equalizer of claim 1, further comprising a plurality of flip flops aligned with the plurality of multiplexers, wherein the multiplexers are to align all the selected digital values.
9. The equalizer of claim 8, further comprising a digital to analog converter (DAC) to convert the plurality of digital values into a single analog signal.
10. The equalizer of claim 1, wherein the plurality of multiplexers includes a first set associated with an odd half of a two way interleaved data stream and a second set associated with an even set, wherein the first and second set have same group configurations, and further comprising a 2-to-1 multiplexer to combine the digital values from the first set and the second set.
11. A digital signal equalizer comprising
an odd bit multiplexer based equalization including a first plurality of multiplexers arranged in a first plurality of groups, wherein each of the first plurality of groups is associated with a non-cursor tap and selects either an odd cursor or the non-cursor tap based on equalization parameters defined, wherein number of multiplexers in the first plurality of multiplexers defines resolution of equalization, wherein number of groups in the first plurality of groups is based on number of taps, and wherein number of multiplexers associated with a particular group is based on distance associated non-cursor tap is away from the odd cursor;
an even bit multiplexer based equalization including a second plurality of multiplexers arranged in a second plurality of groups, wherein each group of the second plurality of groups is associated with a non-cursor tap and selects either an even cursor or the non-cursor tap based on equalization parameters defined, wherein number of multiplexers in the second plurality is same as first plurality, and wherein number of groups in second plurality is same as first plurality; and
a 2-to-1 multiplexer to combine associated outputs from the odd bit multiplexer based equalization and the even bit multiplexer based equalization.
12. The equalizer of claim 11, wherein the odd bit multiplexer based equalization further includes a first plurality of flip flops equal in number to the number of multiplexers in the first plurality of multiplexers to clock an output of an associated multiplexer according to a first clock signal, and wherein the even bit multiplexer based equalization further includes a second plurality of flip flops equal in number to the number of multiplexers in the second plurality of multiplexers to clock an output of an associated multiplexer according to a second clock signal.
13. The equalizer of claim 12, wherein the odd bit multiplexer based equalization further includes a first plurality of inverters equal in number to the number of flip flops in the first plurality of flip flops to generate an inverted output, and wherein the even bit multiplexer based equalization further includes a second plurality of inverters equal in number to the number of flip flops in the second plurality of flip flops to generate an inverted output, wherein the 2-to-1 multiplexer is to combine associated outputs and inverted outputs from the odd bit multiplexer based equalization and the even bit multiplexer based equalization.
14. The equalizer of claim 11, further comprising a pre-driverdriver to convert output of the 2-to-1 multiplexer into an analog signal.
15. The equalizer of claim 11, wherein number or taps considered in equalization can be reduced by selecting the digital value associated with the cursor for each multiplexer in a tap group where the tap is to be excluded from equalization and equalization can be turned off by selecting the digital value associated with the cursor for all multiplexers.
16. A system comprising
a first processor having a transmitter to transmit data, wherein the transmitter includes a multiplexer based equalizer;
a second processor having a receiver to receive data; and
a data link between the first and the second processor.
17. The system of claim 16, wherein the multiplexer based equalizer includes a plurality of multiplexers, wherein number of multiplexers defines resolution of equalization, wherein the plurality of multiplexers are configured in groups, wherein number of groups is based on number of taps, wherein number of multiplexers associated with a particular group is based on equalization range for the group, and wherein the multiplexers in each group select a digital value associated with the cursor or a tap associated with the group.
18. The system of claim 17, wherein equalization can be turned off by selecting the digital value associated with the cursor for each multiplexer.
19. The system of claim 17, where number of taps considered in equalization can be reduced by selecting the digital value associated with the cursor for each multiplexer in the tap group.
20. The equalizer of claim 17, further comprising a plurality of flip flops aligned with the plurality of multiplexers, wherein the multiplexers are to align all the selected digital values.