1. A method of providing ink to a printing system, the printing system including a docking bay having therein a first fluid inlet for receiving pressurized ink, the method comprising:
inserting a pump module into the docking bay of the printing system to couple the pump module to the first fluid inlet within the docking bay, the pump module including keying features, a second fluid inlet for receiving ink, an air purge apparatus, and a pressurizing apparatus for increasing the fluid pressure of the ink before providing the ink to the first fluid inlet;
coupling an ink container to the second fluid inlet, the ink container including keying features corresponding to the pump module keying features, the coupling including engaging the corresponding keying features of the ink container with the pump module keying features to prevent an incompatible ink container from being coupled to the second fluid inlet; and
removing air trapped within the pump module using the air purge apparatus.
2. The method of claim 1, wherein the printing system includes a pump actuator and wherein the method further comprises:
actuating the pump actuator to move linearly to engage the pressurizing apparatus to provide pressurized ink at the first fluid inlet.
3. The method of claim 2, wherein the pressurizing apparatus includes a variable volume chamber having a chamber volume and wherein the step of actuating the pump actuator includes:
increasing the chamber volume to draw ink into the variable volume chamber from the ink container; and
decreasing the chamber volume to expel pressurized ink from the variable volume chamber through the first fluid inlet of the pump module.
4. The method of claim 1 wherein the air purge apparatus includes a septum, and wherein the step of removing air trapped within the pump module includes:
inserting a hollow member through the septum; and
applying vacuum pressure to the hollow member to draw trapped air from the air purge apparatus.
5. The method of claim 1, wherein prior to the step of coupling the ink container to the second fluid inlet, the method includes:
removing a protective cap on the ink container to expose a fill port for filling the ink container with an initial quantity of ink;
removing a plug from the fill port;
refilling the ink container with a quantity of refill ink; and
inserting a plug into the fill port to prevent refill ink leakage from the ink container.
6. The method of claim 1, wherein the pump module includes further keying features and the docking bay includes corresponding keying features, and wherein the step of inserting the pump module into the docking bay includes:
engaging the further keying features of the pump module with the corresponding keying features of the docking bay to ensure the pump module is properly oriented upon insertion of the pump module into the docking bay.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
We claim:
1. A computer implemented method for generating a list of exceptions for use by an electronic design automation (EDA) tool, the method comprising:
accessing a first list of exceptions defining non-default timing constraints of a circuit design; and
optimizing the first list of exception to generate a second list of exceptions, wherein the second list of exceptions such that the EDA tool operates more efficiently on the circuit design using the second list of exceptions as compared to the first list of exceptions.
2. The method of claim 1, wherein operating more efficiently comprises shorter run time for the EDA tool using the second list of exceptions compared to run time using the first list of exceptions.
3. The method of claim 1, wherein operating more efficiently comprises less memory usage for the EDA tool using the second list of exceptions compared to memory usage using the first list of exceptions.
4. The method of claim 1, further comprising performing one or more of a timing analysis and a static timing analysis on the circuit design using the EDA tool and the second list of exceptions.
5. The method of claim 1, further comprising performing synthesis on the circuit design using the EDA tool and the second list of exceptions.
6. The method of claim 1, further comprising performing a placement on the circuit design using the EDA tool and the second list of exceptions.
7. The method of claim 1, further comprising performing a routing on the circuit design using the EDA tool and the second list of exceptions.
8. The method of claim 1, further comprising performing one or more of a noise analysis and a static noise analysis on the circuit design using the EDA tool and the second list of exceptions.
9. The method of claim 1, further comprising performing a power analysis on the circuit design using the EDA tool and the second list of exceptions.
10. The method of claim 1, further comprising performing a reliability analysis on the circuit design using the EDA tool and the second list of exceptions.
11. The method of claim 10, wherein the reliability analysis comprises an electro-migration analysis.
12. The method of claim 1, further comprising generating a report analyzing contents of the second list of exceptions.
13. The method of claim 1, wherein the first list of exceptions generated by one or more of user input and a second EDA tool.
14. The method of claim 1, wherein the optimizing further comprises one or more of:
a non-existent path optimization; a clock path optimization; an unconstrained path optimization; a multi-cycle path optimization; a redundant exception optimization; a non-existent circuit optimization; a priority ordering optimization; and a flattening optimization.
15. The method of claim 1, wherein the optimizing further comprises one or more of:
an invalid path optimization; a merging rise and fall exceptions optimization; a wildcard and single reset optimization; and a tool-specific syntax optimization.
16. A method for context dependent exception list optimization for EDA tool usage, the method comprising:
generating an exception graph from an input design and an exception list, wherein the exception graph having a plurality of nodes coupled by a plurality of directed edges, and wherein the exception graph describing connectivity of the input wherein nodes in the plurality of nodes correspond to exception pins and edges in the plurality of edges correspond to exception usage along paths in the design;
determining the existence of a design path covered by an exception by verifying a path from a first node in the plurality of nodes to a second node in the plurality of nodes, wherein the first node comprises a source node and the second node comprises a target node;
optimizing the exception list responsive to the determining; and
performing analysis of the input design using the exception list responsive to the optimizing
17. The method of claim 16, wherein the optimizing further comprises removing exceptions from the exception list responsive to the determining.
18. The method of claim 16, wherein the optimizing further comprises marking exceptions in the exception list responsive to the determining such that the performing ignores marked exceptions.