1461161106-d5dddd4a-e193-4f43-8e5c-8560d737223f

1. A method of manufacturing a semiconductor device comprising:
forming a first region and a second region in a semiconductor substrate, the first and second regions being element-isolated;
depositing a gate electrode material layer on the semiconductor substrate via a gate insulating film;
processing the gate electrode material layer of the first region into a first gate electrode;
implanting ions into the first region while using the first gate electrode as a mask, thereby forming a first LDD diffusion layer for a first transistor;
depositing a first insulating film on a whole surface;
processing the gate electrode material layer and the first insulating film over the second region into a second gate electrode having a gate length shorter than that of the first gate electrode;
implanting ions into the second region while using the second gate electrode as a mask, thereby forming a second LDD diffusion layer for a second transistor;
depositing a second insulating film on a whole surface;
processing the second insulating film over the second region into second sidewalls of the second gate electrode;
processing the second insulating film and the first insulating film over the first region into first sidewalls of the first gate electrode;
selectively epitaxially growing a semiconductor layer on at least the first LDD diffusion layer exposed from the first sidewalls of the first region; and
implanting ions into the semiconductor substrate via the semiconductor layer of the first region, thereby forming an elevated sourcedrain structure,
wherein the first insulating film and the second insulating film are films that do not inhibit the growth of the semiconductor layer.
2. The method according to claim 1, wherein the second insulating film has a thickness suitable for the second sidewall of the second gate electrode and the first insulating film has such a thickness that a sum of the thickness of the first insulating film and the thickness of the second insulating film is suitable for the first sidewall of the first gate electrode.
3. The method according to claim 2, wherein the semiconductor layer is grown to have a thickness thicker than that of the first insulating film.
4. The method according to claim 1, wherein the semiconductor layer is a silicon layer and the first and second insulating films are silicon nitride films.
5. The method according to claim 1, wherein a semiconductor layer is selectively epitaxially grown on the second LDD diffusion layer of the second region.
6. The method according to claim 5, wherein the selective epitaxial growth of the semiconductor layer on the second LDD diffusion layer is simultaneously performed with the selective epitaxial growth of the semiconductor layer on the first LDD diffusion layer.
7. A method of manufacturing a semiconductor device comprising a DRAM having a memory cell region and a peripheral circuit region on a semiconductor substrate, the method comprising:
forming a gate electrode material layer on the semiconductor substrate via a gate insulating film;
processing the gate electrode material layer of the peripheral circuit region into a first gate electrode;
implanting ions into the semiconductor substrate of the peripheral circuit region while using the first gate electrode as a mask, thereby forming a first LDD diffusion layer for a peripheral circuit transistor;
forming a first insulating film on a whole surface;
processing the gate electrode material layer and the first insulating film of the memory cell region into a second gate electrode;
implanting ions into the semiconductor substrate of the memory cell region while using the second gate electrode as a mask, thereby forming a second LDD diffusion layer for a memory cell transistor;
forming a second insulating film on a whole surface;
processing the second insulating film of the memory cell region into second sidewalls of the second gate electrode;
processing the second insulating film and the first insulating film of the peripheral circuit region into first sidewalls of the first gate electrode;
selectively epitaxially growing a semiconductor layer on the first LDD diffusion layer and the second LDD diffusion layer; and
implanting ions into the semiconductor substrate via the semiconductor layer of the peripheral circuit region, thereby forming an elevated sourcedrain structure,
wherein the first insulating film and the second insulating film are films that do not inhibit the growth of the semiconductor layer.
8. The method according to claim 7, wherein the second insulating film has a thickness suitable for the second sidewall of the second gate electrode and the first insulating film has such a thickness that a sum of the thickness of the first insulating film and the thickness of the second insulating film is suitable for the first sidewall of the first gate electrode.
9. The method according to claim 8, wherein the semiconductor layer is grown to have a thickness thicker than that of the first insulating film.
10. The method according to claim 7, wherein the semiconductor layer is a silicon layer and the first and second insulating films are silicon nitride films.
11. The method according to claim 7, wherein a semiconductor layer is selectively epitaxially grown on the second LDD diffusion layer of the memory cell region.
12. The method according to claim 11, wherein the selective epitaxial growth of the semiconductor layer on the second LDD diffusion layer is simultaneously performed with the selective epitaxial growth of the semiconductor layer on the first LDD diffusion layer.
13. The method according to claim 11, wherein a contact connected to the diffusion layer of the memory cell transistor is formed by a self-aligned contact method using the second sidewalls as a mask and has a landing plug structure in which the semiconductor layer formed on the second LDD diffusion layer of the memory cell region is a landing pad.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A composite hydrogel comprising a polymer matrix and an intercalated network of nanocrystalline cellulose (NCC) substantially uniformly dispersed within said matrix wherein said polymer matrix is swellable in an aqueous andor organic solvent and said polymer matrix is comprising at least one cross-linked hydrophilic polymer; wherein said NCC is organized in a chiral nematic structure.
2. The composite as defined in claim 1, wherein said polymer matrix is an acrylic acid andor acrylate-based matrix.
3. A process comprising
preparing a solution of a hydrophilic monomer, a cross-linker and an initiator in a solvent;
providing a suspension of NCC in a solvent;
mixing said solution and said suspension to provide homogeneity;
optionally removing at least some of said solvent(s); and
polymerizing said monomer and crosslinking said cross-linker to form a composite hydrogel.
4. The process as defined in claim 3 wherein the mononer is an acrylic acid andor acrylate-based monomer.
5. The process as defined in claim 3, wherein the mononer is acrylamide (AAm), N-isopropylacrylamide (NIPAm), hydroxyethylmethacrylate (HEMa), poly(ethylene glycol) methacrylate (PEGMa), acrylic acid (AAc), vinylpyrrolidone, N-vinylformamide (NVF) or a mixture thereof.
6. The process as defined in claim 3, wherein the initiator is a photoinitiator.
7. The process as defined in claim 3, further comprising adding a salt before the step of polymerizing the monomer.
8. The process as defined in claim 3, further comprising effecting a cation exchange step after forming of said composite hydrogel.
9-10. (canceled)
11. An article of manufacture comprising the composite hydrogel as defined in claim 1.
12. The article as defined in claim 11, wherein said article is a sensor, a tunable optical filter, or an electrophoresis gels for separating chiral or nonchiral species, displaying features or templating a nanomaterial.
13. The process as defined in claim 3 wherein the cross-linker comprises prop-2-enoyl functional groups.
14. The process as defined in claim 3 wherein the cross-linker comprises N,N\u2032-methylenebisacrylamide or ethyleneglycol dimethacrylate.
15. The process as defined in claim 3 wherein the initiator is a photoinitiator comprising 2,2-diethoxyacetophenone or 2-hydroxy-1-4-(2-hydroxyethoxy)phenyl-2-methyl-1-propanone.
16. The process of claim 3 comprising
preparing a solution of a hydrophilic monomer, a cross-linker and an initiator in an organic solvent,
wherein said mononer is acrylamide (AAm), N-isopropylacrylamide (NIPAm), hydroxyethylmethacrylate (HEMa), poly(ethylene glycol) methacrylate (PEGMa), acrylic acid (AAc), vinylpyrrolidone, N-vinylformamide (NVF) or a mixture thereof,
said cross-linker comprises at least two end-terminal prop-2-enoyl functional groups and
said organic solvent is miscible with water or an aqueous solvent;

providing a suspension of NCC in an aqueous solvent;
mixing said solution and said suspension to provide homogeneity;
optionally removing at least some of said solvent(s); and
polymerizing said monomer and crosslinking said cross-linker to form said composite hydrogel.