1. An apparatus comprising:
one or more storage devices storing machine readable code; and
one or more processors executing the machine readable code, the machine readable code comprising:
sound setting code that;
detects use of a microphone, and
sets sound characteristics that are suitable for conversation in response to detecting the use of the microphone; and
sound processing code that processes sound on the basis of the sound characteristics set by the sound setting code.
2. The apparatus of claim 1, wherein the sound characteristics include equalizing characteristics that are suitable for conversation.
3. The apparatus of claim 2, wherein the equalizing characteristics that are suitable for conversation comprise two peaks.
4. The apparatus of claim 1, wherein the sound characteristics comprise sound characteristics for a speaker.
5. The apparatus of claim 4, wherein the sound characteristics for the speaker comprise one or more of a speaker mute and a speaker volume.
6. The apparatus of claim 1, wherein the sound characteristics comprise sound characteristics for a microphone.
7. The apparatus of claim 6, wherein the sound characteristics for the microphone comprise one or more of a microphone mute and a microphone volume.
8. The apparatus of claim 1, wherein the sound setting code further detects that the use of the microphone is by a VOIP application program sets the sound characteristics that are suitable for conversation in response to the detection of the use of the microphone by the VOIP application program.
9. The apparatus of claim 1, wherein the sound setting code further detects an end of the use of the microphone and sets the sound characteristics to a previous setting in response to the detection of the end of the use of the microphone.
10. The apparatus of claim 1, wherein the sound setting code further detects an end of the use of the microphone and sets the sound characteristics to a normal setting in response to the detection of the end of the use of the microphone.
11. The apparatus of claim 1, wherein the sound characteristics comprise an echo cancelling function.
12. A method comprising:
detecting use of a microphone;
setting sound characteristics that are suitable for conversation in response to detecting the use of the microphone; and
processing sound on the basis of the sound characteristics set in the sound characteristics setting step.
13. The method of claim 12, wherein the sound characteristics include equalizing characteristics.
14. The method of claim 13, wherein the equalizing characteristics comprise two peaks.
15. The method of claim 12, wherein the sound characteristics comprise sound characteristics for a speaker.
16. The method of claim 15, wherein the sound characteristics for the speaker comprise one or more of a speaker mute and a speaker volume.
17. The apparatus of claim 12, wherein the sound characteristics comprise sound characteristics for a microphone.
18. The method of claim 17, wherein the sound characteristics for the microphone comprise one or more of a microphone mute and a microphone volume.
19. The method of claim 12, further comprising detecting that the use of the microphone is by a VOIP application program and wherein the sound characteristics are set in response to the detecting the use of the microphone by the VOIP application program.
20. A computer program product comprising a storage device storing machine readable code executed by a processor to perform the operations of:
detecting use of a microphone;
setting sound characteristics that are suitable for conversation in response to detecting the use of the microphone; and
processing sound on the basis of the sound characteristics set in the sound characteristics setting step.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor substrate, comprising:
a sapphire substrate including an a-plane main surface and comprising a groove in a surface thereof, the groove including side surfaces and a bottom surface; and
a Group III nitride semiconductor layer formed on the sapphire substrate,
wherein both side surfaces of the groove assume a c-plane of sapphire,
wherein an axis perpendicular to one of the side surfaces of the groove of the Group III nitride semiconductor layer assumes a c-axis of Group III nitride semiconductor, and
wherein a plane parallel to the main surface of the sapphire substrate of the Group III nitride semiconductor layer assumes an m-plane of Group III nitride semiconductor.
2. A semiconductor substrate, comprising:
a sapphire substrate including an m-plane main surface and comprising a groove in a surface thereof, the groove including side surfaces and a bottom surface; and
a Group III nitride semiconductor layer formed on the sapphire substrate;
wherein both side surfaces of the groove assumes a c-plane of sapphire;
wherein an axis perpendicular to one of the side surfaces of the groove of the Group III nitride semiconductor layer assumes a c-axis of Group III nitride semiconductor; and
wherein a plane parallel to the main surface of the sapphire substrate of the Group III nitride semiconductor layer assumes an a-plane of Group III nitride semiconductor.
3. A semiconductor substrate, comprising:
a sapphire substrate including a c-plane main surface and comprising a groove in a surface thereof, the groove including side surfaces and a bottom surface; and
a Group III nitride semiconductor layer formed on the sapphire substrate,
wherein both side surfaces of the groove assumes an a-plane of sapphire,
wherein an axis perpendicular to one of the side surfaces of the groove of the Group III nitride semiconductor layer assumes a c-axis of Group III nitride semiconductor, and
wherein a plane parallel to the main surface of the sapphire substrate of the Group III nitride semiconductor layer assumes an a-plane of Group III nitride semiconductor.
4. A semiconductor substrate according to claim 1, wherein the surface of the sapphire substrate is nitrided, and the Group III nitride semiconductor layer is formed without depositing a buffer layer.
5. A semiconductor substrate according to claim 2, wherein the surface of the sapphire substrate is nitrided, and the Group III nitride semiconductor layer is formed without depositing a buffer layer.
6. A semiconductor substrate according to claim 3, wherein the surface of the sapphire substrate is nitrided, and the Group III nitride semiconductor layer is formed without depositing a buffer layer.
7. A semiconductor substrate according to claim 1, wherein the sapphire substrate comprises a buffer film formed along an entire surface thereof, and the Group III nitride semiconductor layer is formed via a buffer film on the sapphire substrate.
8. A semiconductor substrate according to claim 2, wherein the sapphire substrate comprises a buffer film formed along an entire surface thereof, and the Group III nitride semiconductor layer is formed via a buffer film on the sapphire substrate.
9. A semiconductor substrate according to claim 3, wherein the sapphire substrate comprises a buffer film formed along an entire surface thereof, and the Group III nitride semiconductor layer is formed via a buffer film on the sapphire substrate.
10. A semiconductor substrate according to claim 1, wherein the groove is formed in a stripe pattern.
11. A semiconductor substrate according to claim 2, wherein the groove is formed in a stripe pattern.
12. A semiconductor substrate according to claim 3, wherein the groove is formed in a stripe pattern.
13. A semiconductor substrate according to claim 7, wherein the buffer film comprises AlxGa1-xN (0\u2266x\u22661).
14. A semiconductor substrate according to claim 8, wherein the buffer film comprises AlxGa1-xN (0\u2266x\u22661).
15. A semiconductor substrate according to claim 9, wherein the buffer film comprises AlxGa1-xN (0\u2266x\u22661).
16. A semiconductor substrate according to claim 13, wherein the buffer film has a thickness of 150 \u212b or less.
17. A semiconductor substrate according to claim 14, wherein the buffer film has a thickness of 150 \u212b or less.
18. A semiconductor substrate according to claim 15, wherein the buffer film has a thickness of 150 \u212b or less.