What is claimed is:
1. A method of detecting a transition with zero skew comprising:
identifying a coupling point for a plurality of communication paths;
sampling a first communication path of the plurality of communication paths at a sampling point on the first communication path;
detecting transition of a first signal on the first communication path; and
using the transition of the first signal to generate a detection pulse.
2. The method of claim 1, wherein the plurality of communication paths are parallel communication paths.
3. The method of claim 1, wherein the plurality of communication paths are adjacent communication paths.
4. The method of claim 1, wherein the sampling point is located prior to the coupling point on the first communication path.
5. The method of claim 1, wherein the detection pulse is generated by a switching circuit.
6. The method of claim 5, wherein the switching circuit switches with transition of the first signal.
7. The method of claim 1, wherein a plurality of signals simultaneously transition on the plurality of communication paths at the coupling point.
8. The method of claim 1, further comprising:
adjusting the delay of a delay unit to adjust a width of the detection pulse.
9. The method of claim 1, further comprising:
adjusting a first delay for the switching circuit to adjust the width of the detection pulse.
10. The method of claim 1, wherein the width of the detection pulse is equal to a transition period of the first signal.
11. The method of claim 1, further comprising:
using the detection pulse to adjust a second delay in a second signal simultaneously transitioning on at least one of the plurality of communication paths at the coupling point.
12. The method of claim 11, wherein the second delay is equal to the transition period of the first signal.
13. The method of claim 11, wherein the first and the second delays are adjusted by using a plurality of buffers.
14. A system for detecting a transition with zero skew comprising:
a transition detector, the transition detector detects transition of a first signal on a first one of a plurality of communication paths;
a delay unit coupled to the transition detector, the delay unit provides delays for the first signal; and
a switching circuit coupled to the transition detector, the switching unit generates a detection pulse.
15. The system of claim 14, wherein the switching circuit comprises a plurality of metal-oxide field effect transistors.
16. The system of claim 14, wherein the switching circuit switches with transition of the first signal.
17. The system of claim 14, wherein the transition detector is one of the plurality of metal-oxide field effect transistors.
18. The system of claim 14, wherein the delay unit comprises a plurality of buffers.
19. The system of claim 18, wherein a number of the plurality of buffers is adjusted to adjust a width of the detection pulse.
20. The system of claim 15, wherein the width of the detection pulse is equal to a transition period of the first signal.
21. A system of detecting a transition with zero skew comprising:
means for identifying a coupling point for a plurality of communication paths;
means for sampling a first communication path of the plurality of communication paths at a sampling point on the first communication path;
means for detecting transition of a first signal on the first communication path; and
means for using the transition of the first signal to generate a detection pulse.
22. The system of claim 21, wherein the plurality of communication paths are parallel communication paths.
23. The system of claim 21, wherein the plurality of communication paths are adjacent communication paths.
24. The system of claim 21, wherein the sampling point is located prior to the coupling point on the first communication path.
25. The system of claim 21, wherein the detection pulse is generated by a switching circuit.
26. The system of claim 25, wherein the switching circuit switches with transition of the first signal.
27. The system of claim 21, wherein a plurality of signals simultaneously transition on the plurality of communication paths at the coupling point.
28. The system of claim 21, further comprising:
means for adjusting the delay of a delay unit to adjust a width of the detection pulse.
29. The system of claim 21, further comprising:
means for adjusting a first delay for the switching circuit to adjust the width of the detection pulse.
30. The system of claim 21, wherein the width of the detection pulse is equal to a transition period of the first signal.
31. The system of claim 21, further comprising:
means for using the detection pulse to adjust a second delay in a second signal simultaneously transitioning on at least one of the plurality of communication paths at the coupling point.
32. The system of claim 31, wherein the second delay is equal to the transition period of the first signal.
33. The system of claim 31, wherein the first and the second delays are adjusted by using a plurality of buffers.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A program converter which converts an encryption program for executing encryption into a converted encryption program for executing encryption equivalent to the encryption,
the encryption program including arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition,
said program converter comprising:
a key-data separation unit operable to separate the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the key data K;
an addition-target-data separation unit operable to separate the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X;
an arithmetic-addition-table generation unit operable to generate an arithmetic addition table adds for each i (i=0 to n\u22121), the arithmetic addition table adds being indicated by
(i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and
(ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
a randomized-conversion-table generation unit operable to generate a randomized conversion table RTabi of each i (i=0 to n\u22121), by randomizing, using a random number, the arithmetic addition table adds generated by said arithmetic-addition-table generation unit.
2. The program converter according to the claim 1,
wherein said arithmetic-addition-table generation unit is operable, for each i (i=0 to n\u22121):
to generate, when i=n\u22121, an arithmetic addition table addn\u22121 being indicated by (i) elements which are added data yn\u22121 and carried data cn\u22121, and (ii) an index which is partial addition-target data xn\u22121, the added data yn\u22121 being Nn\u22121 lower-order bit data of a result of an arithmetic addition on partial key data kn\u22121 and the partial addition-target data xn\u22121, and the carried data cn\u22121 being Nn\u22121+1th bit data of the result of the arithmetic addition;
to generate, when i\u22671 and i<n\u22121, an arithmetic addition table adds being indicated by (i) elements which are added data yi and carried data ci, and (ii) indexes which are partial addition-target data xi and carried data ci+1, the added data yi being Ni lower-order bit data of a result of an arithmetic addition on partial key data ki, the partial addition-target data xi, and the carried data ci+1, and the carried data ci being Ni+1th data of the result of the arithmetic addition; and
to generate, when i=0, an arithmetic addition table add0 being indicated by (i) an element which is added data y0, and (ii) indexes which are partial addition-target data x0 and carried data c1, the added data y0 being N0 lower-order bit data of a result of an arithmetic addition on partial key data k0, the partial addition-target data x0, and carried data c1.
3. The program converter according to the claim 1,
wherein the encryption program includes addition data conversion processing of executing predetermined conversion Si for each partial key added data Zi, the partial key added data Zi being obtained by separating the key added data E into n partial data, each of which has Ni bits sequentially obtained from a most significant bit in the key added data E (i=0 to n\u22121),
said randomized-conversion-table generation unit includes:
a merger-table generation unit operable to generate a merger table Ui of each i (i=0 to n\u22121), by merging the arithmetic addition table adds generated by said arithmetic-addition-table generation unit and the predetermined conversion Si, so that the merger table Ui has an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1; and
a generation unit operable to generate a randomized conversion table RTabi of each i (i=0 to n\u22121), by randomizing, using the random number, the merger table Ui generated by said merger-table generation unit.
4. An encryption device which encrypts a plain text to generate an encrypted text, said device comprising:
a program conversion unit operable to convert an encryption program for executing encryption into a converted encryption program for executing encryption equivalent to the encryption; and
an encrypted-text generation unit operable to encrypt the plain text to generate the encrypted text, according to the converted encryption program generated by said program conversion unit,
wherein the encryption program includes arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition, and
said program conversion unit includes:
a key-data separation unit operable to separate the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the key data K;
an addition-target-data separation unit operable to separate the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X;
an arithmetic-addition-table generation unit operable to generate an arithmetic addition table addi for each i (i=0 to n\u22121), the arithmetic addition table adds being indicated by (i) an element which is data including at least added data yi among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and (ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
a randomized-conversion-table generation unit operable to generate a randomized conversion table RTabi of each i (i=0 to n\u22121), by randomizing, using a random number, the arithmetic addition table adds generated by said arithmetic-addition-table generation unit.
5. An encryption device which performs arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition, said device comprising:
an addition-target-data separation unit operable to separate the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X; and
a randomized-key-added-data acquisition unit operable to acquire, for each i (i=0 to n\u22121), a randomized key added data rei which is an element of a randomized conversion table RTabi, by searching the randomized conversion table RTabi for the randomized key added data rei using at least randomized partial addition-target data rxi; which is generated by randomizing the partial addition-target data xi using a random number rai,
wherein the randomized conversion table RTabi is generated by:
separating the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from the most significant bit in the key data K;
generating an arithmetic addition table addi for each i (i=0 to n\u22121), the arithmetic addition table addi being indicated by (i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and (ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
randomizing the arithmetic addition table addi of each i (i=0 to n\u22121) using a random number.
6. A program converting method for use in a program converter that converts an encryption program for executing encryption into a converted encryption program for executing encryption equivalent to the encryption,
the encryption program including arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition, and
the program converter including a key-data separation unit, an addition-target-data separation unit, an arithmetic-addition-table generation unit, and a randomized-conversion-table generation unit,
said program converting method includes steps of:
separating, by the key-data separation unit, the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the key data K;
separating, by the addition-target-data separation unit, the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X;
generating, by the arithmetic-addition-table generation unit, an arithmetic addition table addi for each i (i=0 to n\u22121), the arithmetic addition table adds being indicated by
(i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and
(ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
generating, by the randomized-conversion-table generation unit, a randomized conversion table RTabi of each i (i=0 to n\u22121), by randomizing, using a random number, the arithmetic addition table adds generated in said generating of the arithmetic addition table.
7. A program converting program recorded on a computer-readable recording medium, said program converting program causing a computer to convert an encryption program for executing encryption into a converted encryption program for executing encryption equivalent to the encryption,
the encryption program including arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition,
said program converting program causing a processor to execute steps of:
separating the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the key data K, and storing the n partial key data ki (i=0 to n\u22121) into a memory;
separating the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X, and storing the n partial addition-target data xi (i=0 to n\u22121) into the memory;
generating an arithmetic addition table addi for each i (i=0 to n\u22121) with reference to the n partial key data ki (i=0 to n\u22121) and the n partial addition-target data xi (i=0 to n\u22121) stored in the memory, the arithmetic addition table adds being indicated by
(i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and
(ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index;
storing the arithmetic addition table addi into the memory; and
generating a randomized conversion table RTabi of each i (i=0 to n\u22121) with reference to the arithmetic addition table addi stored in the memory, by randomizing, using a random number, the arithmetic addition table addi generated in said generating of the arithmetic addition table.
8. An integrated circuit which converts an encryption program for executing encryption into a converted encryption program for executing encryption equivalent to the encryption,
the encryption program including arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition,
said integrated circuit comprising:
a key-data separation unit operable to separate the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the key data K;
an addition-target-data separation unit operable to separate the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X;
an arithmetic-addition-table generation unit operable to generate an arithmetic addition table addi for each i (i=0 to n\u22121), the arithmetic addition table addi being indicated by
(i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and
(ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
a randomized-conversion-table generation unit operable to generate a randomized conversion table RTabi of each i (i=0 to n\u22121), by randomizing, using a random number, the arithmetic addition table addi generated by said arithmetic-addition-table generation unit.
9. An encryption method, for use in an encryption device, of performing arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition,
the encryption device including an addition-target-data separation unit and a randomized-key-added-data acquisition unit,
said method comprising steps of:
separating, by the addition-target-data separation unit the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X; and
acquiring by the randomized-key-added-data acquisition unit, for each i (i=0 to n\u22121), a randomized key added data rei which is which is an element of a randomized conversion table RTabi, by searching the randomized conversion table RTabi for the randomized key added data rei using at least randomized partial addition-target data rxi which is generated by randomizing the partial addition-target data xi using a random number rai
wherein the randomized conversion table RTabi is generated by:
separating the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from the most significant bit in the key data K;
generating an arithmetic addition table adds for each i (i=0 to n\u22121), the arithmetic addition table addi being indicated by (i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and (ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
randomizing the arithmetic addition table adds of each i (i=0 to n\u22121) using a random number.
10. A program recorded on a computer-readable recording medium, said program causing a computer to execute arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition, said program causing a processor to execute steps of:
separating the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X, and storing the n partial addition-target data xi (i=0 to n\u22121) into a memory; and
acquiring, with reference to the n partial addition-target data xi (i=0 to n\u22121) stored in the memory, for each i (i=0 to n\u22121), a randomized key added data rei which is an element of a randomized conversion table RTabi, by searching the randomized conversion table RTabi for the randomized key added data rei using at least randomized partial addition-target data rxi which is generated by randomizing the partial addition-target data xi using a random number ra-L
wherein the randomized conversion table RTabi is generated by:
separating the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from the most significant bit in the key data K;
generating an arithmetic addition table addi for each i (i=0 to n\u22121), the arithmetic addition table adds being indicated by (i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and (ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
randomizing the arithmetic addition table addi of each i (i=0 to n\u22121) using a random number.
11. An integrated circuit which performs arithmetic addition processing of executing an arithmetic addition on N-bit (N is an integer of 2 or more) addition-target data X and N-bit key data K and thereby obtaining key added data E as a result of the arithmetic addition, said integrated circuit comprising:
an addition-target-data separation unit operable to separate the addition-target data X into n partial addition-target data xi (i=0 to n\u22121), each of which has Ni bits sequentially obtained from a most significant bit in the addition-target data X; and
a randomized-key-added-data acquisition unit operable to acquire, for each i (i=0 to n\u22121), a randomized key added data rei which is an element of a randomized conversion table RTabi, by searching the randomized conversion table RTabi for the randomized key added data rei using at least randomized partial addition-target data rxi which is generated by randomizing the partial addition-target data xi using a random number rai,
wherein the randomized conversion table RTabi is generated by:
separating the key data K into n partial key data ki (i=0 to n\u22121), each of which has Ni bits sequentially obtained from the most significant bit in the key data K;
generating an arithmetic addition table addi for each i (i=0 to n\u22121), the arithmetic addition table addi being indicated by (i) an element which is data including at least added data yi, among the added data yi and carried data ci which result from an arithmetic addition on (a) the partial key data ki, (b) the partial addition-target data xi, (c) carried data ci+1 of an arithmetic addition on partial key data ki+1 and partial addition-target data xi+1, and (ii) an index which is data including at least the partial addition-target data xi, among the partial addition-target data xi and the carried data ci+1,
the element being associated with the index; and
randomizing the arithmetic addition table addi of each i (i=0 to n\u22121) using a random number.