1461173706-cc053112-9c05-45d7-a9c2-1cbf9eb1c771

1. A flip-flop comprising:
a tri-state inverter configured to receive a flip-flop input, a clock input and an inverted clock input;
a master latch configured to receive an output of the tri-state inverter, the master latch comprising a common inverter;
a slave latch coupled to the master latch, wherein the common inverter is shared between the master latch and the slave latch; and
an output inverter coupled to the common inverter and configured to generate a flip-flop output.
2. The flip-flop of claim 1 further comprising a clock inverter configured to generate the inverted clock input in response to the clock input.
3. The flip-flop of claim 1 is at least one of a positive edge triggered flip-flop and a negative edge triggered flip-flop.
4. The flip-flop of claim 1, wherein the master latch comprises:
a first transmission gate configured to receive the output of the tri-state inverter, the clock input and the inverted clock input;
a master inverter configured to receive the output of the tri-state inverter; and
a second transmission gate coupled to the master inverter and configured to receive the clock input and the inverted clock input, wherein the common inverter is configured to receive an output of the second transmission gate.
5. The flip-flop of claim 1, wherein the slave latch comprises a slave tri-state inverter configured to receive an output of the first transmission gate and an output of the common inverter, wherein the common inverter is configured to receive an output of the slave tri-state inverter.
6. The flip-flop of claim 5, wherein the slave tri-state inverter is configured to receive the clock input and the inverted clock input.
7. The flip-flop of claim 5, wherein the output of the first transmission gate is equal to the output of the common inverter and the output of the second transmission gate is equal to the output of the slave tri-state inverter.
8. The flip-flop of claim 1, wherein the output inverter is configured to generate the flip-flop output in response to the output of the common inverter.
9. The flip-flop of claim 1, wherein the tri-state inverter comprises:
a first PMOS transistor and a first NMOS transistor, a gate terminal of the first PMOS transistor and a gate terminal of the first NMOS transistor configured to receive the flip-flop input;
a second PMOS transistor coupled to a drain terminal of the first PMOS transistor and configured to receive the clock input; and
a second NMOS transistor coupled to a drain terminal of the first NMOS transistor and configured to receive the inverted clock input, wherein a drain terminal of the second PMOS transistor is coupled to a drain terminal of the second NMOS transistor to generate the output of the tri-state inverter.
10. The flip-flop of claim 1, wherein the each of the first transmission gate and the second transmission gate comprises:
a PMOS transistor, a gate terminal of the PMOS transistor configured to receive the inverted clock input; and
an NMOS transistor, a gate terminal of the NMOS transistor configured to receive the clock input.
11. The flip-flop of claim 1, wherein the slave tri-state inverter comprises:
a third PMOS transistor and a third NMOS transistor, a gate terminal of the third PMOS transistor and a gate terminal of the third NMOS transistor configured to receive the output of the common inverter;
a fourth PMOS transistor coupled to a drain terminal of the third PMOS transistor and configured to receive the clock input; and
a fourth NMOS transistor coupled to a drain terminal of the third NMOS transistor and configured to receive the inverted clock input, wherein a drain terminal of the fourth PMOS transistor is coupled to a drain terminal of the fourth NMOS transistor to generate the output of the slave tri-state inverter.
12. The flip-flop of claim 1, wherein the common inverter comprises a fifth PMOS transistor and a fifth NMOS transistor, a gate terminal of each of the fifth PMOS transistor and the fifth NMOS transistor configured to receive the output of the second transmission gate, and a drain terminal of the fifth PMOS transistor is coupled to a drain terminal of the fifth NMOS transistor to generate the output of the common inverter.
13. The flip-flop of claim 1, wherein the output inverter comprises a sixth PMOS transistor and a sixth NMOS transistor, a gate terminal of each of the sixth PMOS transistor and the sixth NMOS transistor configured to receive the output of the common inverter, and a drain terminal of the sixth PMOS transistor is coupled to a drain terminal of the sixth NMOS transistor to generate the flip-flop output.
14. The flip-flop of claim 1, wherein a source terminal of each of the first PMOS transistor, the third PMOS transistor, the fifth PMOS transistor and the sixth PMOS transistor are coupled to a power terminal.
15. The flip-flop of claim 1, wherein a source terminal of each of the first NMOS transistor, the third NMOS transistor, the fifth NMOS transistor and the sixth NMOS transistor are coupled to a ground terminal.
16. The flip-flop of claim 1, wherein the master latch and the slave latch are configured to receive at least one of a clear signal and a preset signal.
17. The flip-flop of claim 1 further comprising a multiplexer coupled to the tri-state inverter, the multiplexer configured to receive the flip-flop input and a scan data input.
18. The flip-flop of claim 17, wherein the multiplexer is configured to receive a scan enable to select one of the flip-flop input and the scan data input, and the multiplexer is configured to provide one of the flip-flop input and the scan data input to the tri-state inverter.
19. An apparatus comprising:
a clock input;
a plurality of flip-flops configured to receive the clock input, wherein each of the flip-flop comprises:
a tri-state inverter configured to receive a flip-flop input, the clock input and an inverted clock input;
a master latch configured to receive an output of the tri-state inverter, the master latch comprising a common inverter;
a slave latch coupled to the master latch, wherein the common inverter is shared between the master latch and the slave latch; and
an output inverter coupled to the common inverter and configured to generate a flip-flop output.
20. A method comprising:
providing a tri-state inverter configured to receive a flip-flop input, a clock input and an inverted clock input;
providing a master latch configured to receive an output of the tri-state inverter, the master latch comprising a common inverter;
providing a slave latch coupled to the master latch, wherein the common inverter is shared between the master latch and the slave latch; and
providing an output inverter coupled to the common inverter and configured to generate a flip-flop output.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for fuel production comprising operating a solid oxide reversible cell in electrolysis mode at a thermo-neutral voltage of from between 1.0-1.3 V to generate a fuel mixture.
2. A method according to claim 1 wherein the generated fuel mixture comprises at least about 10% methane.
3. A method according to claim 1 wherein electrolysis mode is operated at an operating pressure of 5-100 atmospheres, and at an operating temperature of 700-850\xb0 C.
4. A method according to claim 3 wherein the operating pressure is 10-20 atmospheres.
5. A method according to claim 1 wherein electrolysis mode is operated at an operating pressure of 1-5 atmospheres, and at an operating temperature of 500-700\xb0 C.
6. A method according to claim 1 wherein electrolysis mode is operated at an operating pressure of 5-100 atmospheres, and at an operating temperature of 500-700\xb0 C.
7. A method according to claim 1 wherein the generated fuel is catalytically converted to another form selected from the group consisting of a hydrocarbon and an alcohol.
8. A method according to claim 7 wherein the generated fuel is catalytically converted to pure methane.
9. A method according to claim 1 wherein electrolysis mode is operated under conditions wherein the thermal-neutral voltage is approximately equal to the Nernst potential.
10. A method according to claim 2 further comprising providing the stored at least 10% methane-containing fuel mixture, and oxygen or air, to the solid oxide reversible cell, and operating the solid oxide reversible cell in a fuel cell mode using the provided fuel, and oxygen or air, to produce electricity.
11. A method according to claim 10 wherein fuel cell mode is operated at an operating pressure of 5-100 atmospheres, and at an operating temperature of 700-850\xb0 C.
12. A method according to claim 11 wherein the operating pressure is 10-20 atmospheres.
13. A method according to claim 10 wherein fuel cell mode is operated at an operating pressure of 1-5 atmospheres, and at an operating temperature of 500-700\xb0 C.
14. A method according to claim 10 wherein fuel cell mode is operated at an operating pressure of 5-100 atmospheres, and at an operating temperature of 500-700\xb0 C.
15. A method for electrical energy storage comprising:
a) operating a solid oxide reversible cell in electrolysis mode at a thermal-neutral voltage of from between 1.0-1.3 V, at a first operating temperature of 500-850\xb0 C., and a first operating pressure of 1-100 atmospheres to generate a fuel mixture comprising at least 10% methane;
b) providing the fuel mixture, and oxygen or air, to the solid oxide reversible cell; and
c) operating the solid oxide reversible cell in fuel cell mode using the provided fuel, and oxygen or air, at a second operating temperature of 500-850\xb0 C. and a second operating pressure of from between 1-100 atmospheres to produce electrical energy.
16. A method according to claim 15 wherein electrolysis mode is operated under conditions wherein the thermal-neutral voltage is approximately equal to the Nernst potential.
17. A method according to claim 15 wherein the first operating pressure and the second operating pressure are independently 5-100 atmospheres, and the first operating temperature and the second operating temperature are independently 700-850\xb0 C.
18. A method according to claim 17 wherein the first operating pressure and the second operating pressure are independently 10-20 atmospheres.
19. A method according to claim 15 wherein the first operating pressure and the second operating pressure are independently 1-5 atmospheres, and the first operating temperature and the second operating temperature are independently 500-700\xb0 C.
20. A method according to claim 15 wherein the first operating pressure and the second operating pressure are independently 5-100 atmospheres, and the first operating temperature and the second operating temperature are independently 500-700\xb0 C.
21. A reversible solid oxide cell energy storage system comprising:
a) a solid oxide fuel cell comprising an electrolyte, a fuel electrode and an oxygen electrode;
b) one or more storage tanks attached to the solid fuel cell to store liquid or gaseous reactants and products;
c) a thermally-integrated catalytic reactor; and
d) a heat exchanger, wherein
the thermally-integrated catalytic reactor and the heat changer are located between the one or more storage tanks and the solid oxide fuel cell.
22. A reversible solid oxide cell energy storage system of claim 21 wherein the one storage tank is used to store oxygen produced during an electrolysis mode.
23. A reversible solid oxide cell energy storage system of claim 21 wherein oxygen is not stored and ambient air is used in a fuel cell mode.
24. A reversible solid oxide cell energy storage system of claim 21 wherein the one storage tank is used to supply reactants to and receive products from the solid oxide cell such that the tank composition of at least one of the storage tanks changes during a storage cycle.
25. A reversible solid oxide cell energy storage system of claim 21 wherein at least one storage tank is used for reactants and at least one storage tank is used for products such that the compositions of the one or more storage tanks does not vary during a cycle.
26. A reversible solid oxide cell energy storage system of claim 25 wherein a first storage tank is used to store methane, a second storage tank is used to store water, and a third storage tank is used to store residual gases.