1. A method for reading configuration stored in a fuse memory during a power-up operation in a nonvolatile memory, the fuse memory having a pre-check fuse cells memory section, a main fuse cells memory section, storing configuration information, and a post-check fuse cells memory section, comprising:
performing a pre-check operation during the power-up operation by reading data from the pre-check fuse cells memory section to determine if the read data from the pre-check fuse cells memory section matches with a predefined pre-check data;
reading the configuration information during the power-up operation from the main fuse cells memory section, and storing the configuration information for use in operating the non-volatile memory; and
performing a post-check operation during the power-up operation by reading data from the post-check fuse cells memory section to determine if the read data from the post-check fuse cells memory section matches with a predefined post-check data; and
if the pre-check and post-check operations result in determining matches, then completing the read of configuration information, else retrying the pre-check operation, the reading of the configuration information and the post-check operation.
2. The method of claim 1, prior to performing the pre-check, operation, further comprising loading the predefined pre-check data into a first address and a second address in the pre-check fuse cells memory section.
3. The method of claim 2, prior to performing the pre-check, operation, further comprising loading at least part of the configuration information into the main fuse cells memory section.
4. The method of claim 3, prior to performing the pre-check operation, further comprising loading the predefined post-check data into a next-to-last address and a last address in the post-check fuse cells memory section.
5. The method of claim 1, prior to performing the pre-check, operation, generating a power-on reset signal.
6. The method of claim 5, after the generating step, further comprising enabling a power-up operation.
7. The method of claim 6, after the enabling step, further comprising starting a clock for the power-up operation.
8. The method of claim 7, after performing the post-check, further comprising disabling the clock for the power-up operation.
9. The method of claim 2 wherein the predefined pre-check data comprises a first word of AAAA in hexadecimal for the first address in the pre-check fuse cells memory section and a second word of 5555 in hexadecimal for the second address in the pre-check fuse cells memory section.
10. The method of claim 1, wherein the nonvolatile memory comprises a low voltage flash memory.
11. A nonvolatile memory, comprising:
a flash memory array;
a fuse memory coupled to the memory array for verifying an operational voltage during a power-up operation, including:
a pre-check fuse cells memory section for storing a predefined pre-check data;
a main fuse cells memory section coupled to the first fuse cells memory section for storing configuration information; and
a post-check fuse cells memory section coupled to the main fuse cells memory section for storing a pre-defined post-check data; and
logic coupled to the first fuse memory responsive to a power-on reset to
first read the predefined pre-check data from the pre-check fuse cells memory section in a pre-check operation during the power-up operation to determine if the read data matches with the predefined pre-check data,
second read the configuration information from the main fuse cells and store the configuration information for use in operation of the flash memory array,
third read the predefined post-check data from the post-check fuse cells memory section in a post check operation during the power-up operation to determine if the read data matches with the predefined post-check data, and
if the pre-check and post-check operations result in determining matches, then completing the read of configuration information, else retrying the pre-check operation, the reading of the configuration information and the post-check operation.
12. The nonvolatile memory of claim 11 wherein the fuse memory is coupled to the memory array and the fuse memory is attached next to the memory array.
13. The nonvolatile memory of claim 11 where the fuse memory is coupled to the memory array but is not attached the memory array.
14. The nonvolatile memory of claim 11 further comprising a power-on reset circuit coupled to the fuse memory for resetting registers, the registers coupled to the power-on-reset circuit.
15. The nonvolatile memory of claim 14 further comprising a clock circuit, coupled to the fuse memory, for enabling the power-up operation.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A mouthpiece structure for a pressure vessel, comprising:
a liner made of a synthetic resin and constituting a vessel body and a cylindrical part communicating between an interior and an exterior of the vessel body;
a cylindrical mouthpiece mounted closely to an inner periphery of the cylindrical part;
a retainer having a covering portion which covers regions of outer surfaces of the cylindrical part and the cylindrical mouthpiece respectively and a peripheral wall surrounding the cylindrical part, the cylindrical part and the cylindrical mouthpiece having an interface between an inner periphery of the cylindrical part and an outer periphery of the cylindrical mouthpiece, the interface having a distal end facing the regions;
a first sealing member disposed between the cylindrical mouthpiece and the covering portion; and
a second sealing member disposed between the cylindrical part and the peripheral wall of the retainer,
wherein the cylindrical mouthpiece is formed with a male thread, the mouthpiece structure further comprising a nut which is threadingly engageable with the male thread thereby to press the covering portion against the cylindrical mouthpiece.
2. The structure according to claim 1, wherein the second sealing member is housed in a seal groove formed by recessing only an inner periphery of the peripheral wall.
3. The structure according to claim 1, wherein the covering portion abuts against the region of the outer surface of the cylindrical mouthpiece which the distal end of the interface faces.
4. The structure according to claim 1, wherein the region of the outer surface of the cylindrical part which the distal end of the interface faces, is non-contact with the covering portion.