1. A digital phase locked loop (DPLL), comprising:
an adjustable delay line configured to receive at least one of a reference clock and a feedback clock as an input and to output a dithered signal;
a phase and frequency detector (PFD) configured to compare clock signals including a reference clock signal and a feedback clock signal wherein at least one of the clock signals is the dithered signal to determine phase and frequency differences between the clock signals, and further wherein a gain of the PFD is adjusted such that noise power is shaped to higher frequencies beyond a loop bandwidth of the DPLL; and
a digitally controlled oscillator (DCO) configured to receive early or late determinations from the PFD to adjust an output in accordance therewith, wherein the dithered signal distributes jitter response to enhance overall operation of the DPLL.
2. The DPLL as recited in claim 1, wherein the PFD includes a transfer function that is linearized by the use of the adjustable delay line to modulate behavior of a clock input.
3. The DPLL as recited in claim 2, wherein the transfer function enables control of gain of the PFD.
4. The DPLL as recited in claim 1, wherein the jitter is injected into the DPLL to make the behavior of the DPLL more controllable and predictable, and, at the same time, improve jitter performance of the DPLL in frequency bands of interest.
5. The DPLL as recited in claim 1, wherein the adjustable delay line includes a plurality of stages controlled using delay line controls derived by feedback from at least one of the DCO and the PFD.
6. The DPLL as recited in claim 1, wherein the stages each include a plurality of buffers wherein the buffers are activated in accordance with a delay range signal.
7. The DPLL as recited in claim 1, further comprising a row-column control block configured to drive varactors of the DCO such that the DCO is configured as having extra steps created dynamically by dithering between adjacent fine steps to scale DCO gain to match separation between DCO steps.
8. The DPLL as recited in claim 1, further comprising a dithering control circuit for changing an operating frequency to the DCO, the dithering control circuit including a feedback loop connected to an output to feed back a control sequence to enable a frequency of operation, wherein the DCO is thereby dithered at a rate equal to or exceeding its operating frequency and a spectral density of an oscillator frequency distribution is shaped so that dithering energy falls at or near zero so that no additional jitter or phase noise is introduced by the dithering.
9. A method for controlling jitter in a digital phase locked loop (DPLL), comprising:
adjusting delay in a delay line configured to receive at least one of a reference clock signal and a feedback clock signal as an input and to output a dithered signal;
comparing the reference clock signal with the feedback clock signal, wherein at least one of the reference clock signal and the feedback clock signal is dithered, by using a phase and frequency detector (PFD) configured to determine phase and frequency differences, and further wherein adjusting delay includes adjusting a gain of the PFD such that noise power is shaped to higher frequencies beyond a loop bandwidth of the DPLL; and
adjusting an output of a digitally controlled oscillator (DCO) in accordance with early or late determinations from the PFD, wherein the dithered signal distributes jitter response to enhance overall operation of the DPLL.
10. The method as recited in claim 9, wherein adjusting delay includes linearizing the PFD using a transfer function by the use of the delay line to modulate behavior of a clock input.
11. The method as recited in claim 10, wherein the transfer function enables control of gain of the PFD.
12. The method as recited in claim 9, wherein adjusting delay includes injecting jitter into the DPLL to make the behavior of the DPLL more controllable and predictable, and, at the same time, improve jitter performance of the DPLL in frequency bands of interest.
13. The method as recited in claim 12, wherein the adjustable delay line includes a plurality of stages and further comprising controlling the delay line using delay line controls derived by feedback from at least one of the DCO and the PFD.
14. The method as recited in claim 13, wherein the stages each include a plurality of buffers wherein the buffers are activated in accordance with a delay range signal.
15. The method as recited in claim 9, further comprising a row-column control block configured to drive varactors of the DCO such that the DCO is configured as having extra steps created dynamically by dithering between adjacent fine steps to scale DCO gain to match separation between DCO steps.
16. A method for optimizing dither in a digitally controlled oscillator (DCO), comprising:
dithering a DCO at a rate equal to or exceeding its operating frequency; and
actively shaping a spectral density of an oscillator frequency distribution so that dithering energy falls at or near zero such that no additional jitter or phase noise is introduced in the dithering.
17. The method as recited in claim 16, wherein the spectral density is given by
\u03c3
T
2
=
\u222b
0
+
\u221e
\u2062
S
\u03a9
\u2061
(
\u03c9
)
\u03c9
2
\u2062
4
\u2062
\u2062
sin
2
\u2061
(
\u03c9
\u2062
\u2062
T
2
)
\u2062
\u2146
\u03c9
,
where \u03c3 is standard variance of the oscillator period jitter, \u03c9 is angular velocity, S\u03a9 is a corresponding frequency noise spectrum (power spectral density of the oscillator frequency) and T is the oscillator period, and actively shaping includes determining frequencies to reduce an integrand to zero or substantially zero.
18. The method as recited in claim 16, wherein dithering includes running the DCO at f+\u0394f for one half of an oscillation period and at f for another half of the oscillation period.
19. The method as recited in claim 18, wherein oscillation period remains constant at a value corresponding to approximately f+\u0394f2.
20. The method as recited in claim 16, wherein dithering includes controlling the DCO between frequencies off and f+\u0394f during an oscillation cycle to achieve \u0394f2 during the cycle without additional jitter.
21. A self-dithered digitally controlled oscillator (DCO) circuit, comprising;
a DCO; and
a dithering control circuit for changing an operating frequency to the DCO, the dithering control circuit including a feedback loop connected to an output to feed back a control sequence to enable a frequency of operation, wherein the DCO is thereby dithered at a rate equal to or exceeding its operating frequency and a spectral density of an oscillator frequency distribution is shaped so that dithering energy falls at or near zero so that no additional jitter or phase noise is introduced by the dithering.
22. The DCO as recited in claim 21, wherein the spectral density is given by
\u03c3
T
2
=
\u222b
0
+
\u221e
\u2062
S
\u03a9
\u2061
(
\u03c9
)
\u03c9
2
\u2062
4
\u2062
\u2062
sin
2
\u2061
(
\u03c9
\u2062
\u2062
T
2
)
\u2062
\u2146
\u03c9
,
where \u03c3 is standard variance of the oscillator period jitter, \u03c9 is angular velocity, S\u03a9 is a corresponding frequency noise spectrum (power spectral density of the oscillator frequency) and T is the oscillator period, and actively shaping includes determining frequencies to reduce an integrand to zero or substantially zero.
23. The DCO as recited in claim 21, wherein the DCO is operated at one of: f+\u0394f for one half of an oscillation period and at f for another half of the oscillation period and a constant value corresponding to approximately f+\u0394f2.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A speaker comprising:
at least one electrode electrically coupled with an audio signal input;
a film comprising at least one electret layer, the film being configured to interact with the electrode in response to an audio signal supplied by the audio signal input and to vibrate to generate sound waves,
wherein the electret layer is formed from a polymer-containing solution which includes a polymer with a surfactant mixed therein,
wherein the polymer comprises at least one of cyclic olefin copolymer (COC), polystyrene (PS), polycarbonate (PC), polymethylmethacrylate (PMMA), polyvinyl chloride (PVC), polyimide (PI), polyetherimide (PEI), high density polyethylene (HDPE), polypropylene (PP), and wherein the surfactant comprises at least one of (n+1)-hydroxy-alkanoic acid, (n+1)-amino-alkanoic acid, HO\u2014(CH2)n-COOH, 2,3-bis-(n-hydroxy-alkyloxy)-succinic acid, 2,3-bis-(n-amino-alkyloxy)-succinic acid, (n+1)-triazol-alkanoic acid, and 2,3-bis-(n-triazol-alkyloxy)-succinic acid.
2. The speaker of claim 1, wherein the polymer-containing solution further comprises at least one of tetrahydrofuran (THF), toluene, xylene, p-xylene, dichloromethane, chloroform, n-methylpyrrolidone (NMP), and dimethylformamide (DMF) as a solvent.
3. The speaker of claim 1, wherein the film contains self-assembling structure providing holes in the range of nanometer to micrometer scale.
4. The speaker of claim 1, wherein the film further comprises a conductive layer.
5. The speaker of claim 1, wherein the electret layer is formed via at least one of a spraying-coating, spin-coating, screen-printing, and scraping process.
6. The speaker of claim 1, wherein the electret layer is formed with a thickness between about 0.5\u02dc100 \u03bcm.
7. The speaker of claim 1, wherein the film is an actuator remotely coupled with and insulated from the electrode to allow the actuator to vibrate in relation to the electrode.
8. The speaker of claim 1, wherein the at least one electrode comprises two electrodes that sandwich the film between the two electrodes with an air gap between the electrodes and the film.
9. The speaker of claim 1, wherein the film comprises an electret-metal-electret structure.
10. The speaker of claim 1, wherein the at least one electrode has openings for allowing the sound waves to pass through the openings.
11. The speaker of claim 1, wherein the speaker is an electrostatic push-pull speaker.
12. The speaker of claim 1, wherein the electret layer is formed on a non-woven material.
13. The speaker of claim 12, wherein the non-woven material comprises at least one of polypropylene (PP), poly(ethylene terephthalate) (PET), and nylon.
14. The speaker of claim 1, wherein the electret layer comprises nanometer-scale particles or micrometer-scale fibers.
15. The speaker of claim 14, wherein the nanometer-scale particles or micrometer scale fibers comprise at least one of Poly(ethylene terephthalate) (PET), poly tetrafluoroethylene (PTFE), fluorinated ethylene propylene (FEP), silicon dioxide, aluminum oxide, and high density polyethylene (HDPE).
16. The speaker of claim 1, wherein the surfactant comprises
Y\u2014(\u2014CH2)n\u2014COOH,
in which
Y is OH or NH2; and
n is an integer ranging from 5 to 10.
17. The speaker of claim 1, wherein the surfactant comprises
Y\u2014(\u2014CH2)n\u2014(COOH)2,
in which
Y is OH or NH2; and
n is an integer ranging from 5 to 10.
18. An electret material comprising a layer formed from a polymer-containing solution, wherein the polymer-containing solution comprises a polymer material with a surfactant material mixed therein, wherein the polymer material comprises at least one of cyclic olefin copolymer (COC), polystyrene (PS), polycarbonate (PC), polymethylmethacrylate (PMMA), polyvinyl chloride (PVC), polyimide (PI), polyetherimide (PEI), high density polyethylene (HDPE), and polypropylene (PP), and wherein the surfactant material comprises at least one of (n+1)-hydroxy-alkanoic acid, (n+1)-amino-alkanoic acid, HO\u2014(CH2)n-COOH, 2,3-bis-(n-hydroxy-alkyloxy)-succinic acid, 2,3-bis-(n-amino-alkyloxy)-succinic acid, (n+1)-triazol-alkanoic acid, and 2,3-bis-(n-triazol-alkyloxy)-succinic acid.
19. The electret material of claim 18, wherein the polymer-containing solution further comprises at least one of tetrahydrofuran (THF), toluene, xylene, p-xylene, dichloromethane, chloroform, n-methylpyrrolidone, (NMP), and dimethylformamide (DMF) as a solvent.
20. The electret material of claim 18, wherein the surfactant material comprises
Y\u2014(\u2014CH2)n\u2014COOH,
in which
Y is OH or NH2; and
n is an integer ranging from 5 to 10.
21. The electret material of claim 18, wherein the surfactant material comprises
Y\u2014(\u2014CH2)n\u2014(COOH)2,
in which
Y is OH or NH2; and
n is an integer ranging from 5 to 10.