1. A semiconductor device structure, comprising:
a substrate;
a first dielectric layer, disposed on the substrate;
a second dielectric layer, disposed on the first dielectric layer, wherein a Young’s modulus of the second dielectric layer is smaller than a Young’s modulus of the first dielectric layer;
a semiconductor layer, disposed on the first dielectric layer or the second dielectric layer;
a first conductive layer, disposed adjacently to the first dielectric layer or the second dielectric layer; and
a second conductive layer, disposed on the second dielectric layer or the first dielectric layer.
2. The semiconductor device structure according to claim 1, wherein the first dielectric layer comprises a first patterned dielectric film and a second patterned dielectric film, the second patterned dielectric film is disposed on the first patterned dielectric film, the semiconductor layer and the first conductive layer are separated via the first patterned dielectric film, the second conductive layer is disposed on the second dielectric film and is electrically connected to at least one of the semiconductor layer and the first conductive layer via a contact hole.
3. The semiconductor device structure according to claim 2, wherein the first patterned dielectric film and the second patterned dielectric film are single-layer or multi-layer structures.
4. The semiconductor device structure according to claim 2, wherein the second dielectric layer is a single-layer or multi-layer structure.
5. The semiconductor device structure according to claim 2, wherein the first conductive layer is disposed under the semiconductor layer; the semiconductor layer, the first conductive layer, the second conductive layer and the first dielectric layer form a bottom-gate transistor; the semiconductor layer is an active layer of the bottom-gate transistor, and the first conductive layer is a gate electrode of the bottom-gate transistor.
6. The semiconductor device structure according to claim 2, wherein the first conductive layer is disposed on the semiconductor layer; the semiconductor layer, the first conductive layer, the second conductive layer and the first dielectric layer form a top-gate transistor; the semiconductor layer has functions of an active layer, and the first conductive layer has functions of a gate electrode.
7. The semiconductor device structure according to claim 2, wherein the semiconductor layer, the first conductive layer and the first dielectric layer form a capacitor.
8. The semiconductor device structure according to claim 7, wherein the capacitor is formed by the first conductive layer, the semiconductor layer and the first patterned dielectric film of the first dielectric layer.
9. The semiconductor device structure according to claim 1, wherein the first conductive layer and the second conductive layer are separated from each other via the second dielectric layer; the first conductive layer, the second conductive layer and the second dielectric layer form a capacitor.
10. The semiconductor device structure according to claim 1, wherein the first conductive layer is disposed on the substrate, the second dielectric layer or the first dielectric layer has an opening revealing the first conductive layer, and the first conductive layer is electrically connected to the second conductive layer.
11. The semiconductor device structure according to claim 2, wherein the Young’s modulus of the first patterned dielectric film is between 1 GPa and 450 GPa, and the Young’s modulus of the second dielectric layer is between 0.1 MPa and 80 GPa.
12. The semiconductor device structure according to claim 11, wherein a leakage current density of the first patterned dielectric film is smaller than 10\u22127 Acm2 when electric field strength is 1 MVcm.
13. A method for manufacturing a semiconductor device structure, comprising:
providing a substrate;
forming a first dielectric layer on the substrate;
forming a second dielectric layer on the first dielectric layer, wherein a Young’s modulus of the second dielectric layer is smaller than a Young’s modulus of the first dielectric layer;
forming a semiconductor layer on the first dielectric layer or the second dielectric layer;
forming a first conductive layer, wherein the first conductive layer is adjacent to the first dielectric layer or the second dielectric layer; and
forming a second conductive layer on the second dielectric layer or the first dielectric layer.
14. The method according to claim 13, wherein the first dielectric layer comprises a first patterned dielectric film and a second patterned dielectric film; the second dielectric film is disposed on the first patterned dielectric film; the semiconductor layer and the first conductive layer are separated from each other via the first patterned dielectric film; the second conductive layer is disposed on the second dielectric layer or the first dielectric layer, and is electrically connected to at least one of the semiconductor layer and the first conductive layer via a contact hole.
15. The method according to claim 14, wherein the first patterned dielectric film and the second patterned dielectric film are single-layer or multi-layer structures.
16. The method according to claim 13, wherein the second dielectric layer is a single-layer or multi-layer structure.
17. The method according to claim 14, wherein the first conductive layer is disposed under the semiconductor layer; the semiconductor layer, the first conductive layer, the second conductive layer and the first dielectric layer form a bottom-gate transistor; the semiconductor layer has functions of an active layer, and the first conductive layer has functions of a gate electrode.
18. The method according to claim 14, wherein the first conductive layer is disposed on the semiconductor layer; the semiconductor layer, the first conductive layer, the second conductive layer and the first dielectric layer form a top-gate transistor; the semiconductor layer has functions of an active layer, and the first conductive layer has functions of a gate electrode.
19. The method according to claim 14, wherein the semiconductor layer, the first conductive layer and the first dielectric layer form a capacitor.
20. The method according to claim 19, wherein the capacitor is formed by the first conductive layer, the semiconductor layer and the first patterned dielectric film of the first dielectric layer.
21. The method according to claim 13, wherein the first conductive layer and the second conductive layer are separated from each other via the second dielectric layer; the second conductive layer, the first conductive layer and the second dielectric layer form a capacitor.
22. The method according to claim 13, wherein the first conductive layer is disposed on the substrate, the second dielectric layer or the first dielectric layer has an opening revealing the first conductive layer, and the first conductive layer is electrically connected to the second conductive layer.
23. The method according to claim 14, wherein the Young’s modulus of the first patterned dielectric film is between 1 GPa and 450 GPa, and the Young’s modulus of the second dielectric layer is between 0.1 MPa and 80 GPa.
24. The method according to claim 14, wherein a leakage current density of the first patterned dielectric film is smaller than 10\u22127 Acm2 when electric field strength is 1 MVcm.
25. A semiconductor device structure, comprising:
a substrate;
a first dielectric layer, disposed on the substrate, comprising a first patterned dielectric film and a second patterned dielectric film;
a second dielectric layer, disposed on the first dielectric layer, wherein a Young’s modulus of the second dielectric layer is smaller than a Young’s modulus of the first dielectric layer;
a first semiconductor layer, disposed on the substrate;
a first conductive layer, disposed on the first patterned dielectric film;
a second semiconductor layer, disposed on the second patterned dielectric film, wherein the first semiconductor layer and the first conductive layer are disposed at two opposite sides of the first patterned dielectric film, and the first conductive layer and the second semiconductor layer are disposed at two opposite sides of the second patterned dielectric film; and
a second conductive layer, disposed on the second dielectric layer, being electrically connected to the first semiconductor layer, the second semiconductor layer or the first conductive layer via a contact hole.
26. The semiconductor device structure according to claim 25, wherein the first semiconductor layer, the first conductive layer and the second conductive layer form a top-gate transistor; the first conductive layer, the second semiconductor layer and the second conductive layer form a bottom-gate transistor; the first conductive layer has functions of a gate layer, and the first semiconductor layer and the second semiconductor layer have functions of an active layer.
27. The semiconductor device structure according to claim 25, wherein the first semiconductor layer, the first conductive layer and the first patterned dielectric film form a capacitor; the first conductive layer, the second semiconductor layer and the second patterned dielectric film form another capacitor.
28. The semiconductor device structure according to claim 27, wherein the first semiconductor layer and the second semiconductor layer have the same potential.
29. The semiconductor device structure according to claim 25, wherein the first dielectric layer is a multi-layer structure.
30. The semiconductor device structure according to claim 25, wherein the second dielectric layer is a single-layer or multi-layer structure.
31. A pixel structure, comprising:
at least two pixel electrodes; and
a driving transistor, wherein the pixel electrodes are connected to an end electrode of the driving transistor; the driving transistor comprising:
a substrate;
a first dielectric layer, disposed on the substrate, comprising a first patterned dielectric film and a second patterned dielectric film;
a second dielectric layer, disposed on the first dielectric layer, wherein a Young’s modulus of the second dielectric layer is smaller than a Young’s modulus of the first patterned dielectric film or the second patterned dielectric film;
a semiconductor layer, disposed adjacently to the first dielectric layer or the second dielectric layer;
a first conductive layer, disposed adjacently to the first dielectric layer or the second dielectric layer, wherein the semiconductor layer and the first conductive layer are disposed at two opposite sides of the first patterned dielectric film; and
a second conductive layer, disposed on the second dielectric layer, electrically connected to the semiconductor layer or the first conductive layer via a contact hole;
wherein, the driving transistor drives the pixel electrodes to generate a pixel.
32. The pixel structure according to claim 31, wherein the second dielectric layer is a single-layer or multi-layer structure.
33. A pixel structure, comprising:
at least two pixel electrodes; and
a driving transistor, wherein the pixel electrodes are connected to an end electrode of the driving transistor; the driving transistor comprising:
a substrate;
a semiconductor layer, disposed on the substrate;
a dielectric layer, disposed on the semiconductor layer;
a first conductive layer, wherein the first conductive layer and the semiconductor layer are disposed at two opposite sides of the dielectric layer; and
a second conductive layer, disposed on the dielectric layer, electrically connected to the semiconductor layer or the first conductive layer via a contact hole;
wherein, the driving transistor drives the pixel electrodes to generate a pixel.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A thermoplastic resin composition comprising 2.5 to 6.5 wt. % of a styrene-based elastomer and 93.5 to 97.5 wt. % of tungsten powder.
2. A thermoplastic resin molded article comprising 2.5 to 6.5 wt. % of a styrene-based elastomer and 93.5 to 97.5 wt. % of tungsten powder.
3. A thermoplastic resin molded article consisting essentially of 2.5 to 6.5 wt. % of a styrene-based elastomer, 93.5 to 97.5 wt. % of tungsten powder and, optionally, at least one member selected from the group consisting of steel, brass, copper, aluminum, nickel, silver, zinc, iron oxide, copper oxide, aluminum oxide, barium sulfate, zinc oxide and molybdenum sulfide.
4. A thermoplastic resin composition consisting of 2.5 to 15 wt. % of a styrene-based thermoplastic elastomer and 85 to 97.5 wt. % of tungsten powder.
5. A thermoplastic resin molded article consisting of 2.5 to 15 wt. % of a styrene-based thermoplastic elastomer and 85 to 97.5 wt. % of tungsten powder.
6. A thermoplastic resin molded article consisting of 2.5 to 15 wt. % of a styrene-based thermoplastic elastomer, 85 to 97.5 wt. % of tungsten powder and, optionally, at least one member selected from the group consisting of steel, brass, copper, aluminum, nickel, silver, zinc, iron oxide, copper oxide, aluminum oxide, barium sulfate, zinc oxide and molybdenum sulfide.