1. An electronic device comprising an electrically-conductive perforated patterned structure which is enclosed between a dielectric layer and an active element of the electronic device, said perforated patterned structure comprises a geometrical pattern defining an array of spaced-apart perforation regions surrounded by continuous electrically conductive regions, said pattern being such as to allow the active element of the electronic device to be in direct contact with said dielectric layer aligned with the perforation regions, a material composition of the device and features of said geometrical pattern being selected to provide a desired electrical conductance of the electrically-conductive perforated patterned structure and a desired profile of a charge carriers’ injection barrier along said structure.
2. The device of claim 1, comprising said active element on top of the electrically-conductive perforated patterned structure, said active element comprising an organic or amorphous semiconductor material composition corresponding to an active cell of a thin film transistor structure, said electrically-conductive perforated patterned structure being one of a source and drain electrodes enclosed between the dielectric layer of a gate on dielectric structure and said active element.
3. The device of claim 2, wherein said transistor structure is configured and operable as a vertical field effect transistor (VFET) structure with the source and drain electrodes arranged in a spaced-apart relationship in different layers, with the active element therebetween, one of said source and drain electrodes being said patterned perforated electrically-conductive structure.
4. The device of claim 1, wherein said electrically conductive regions are formed by one or more metals or semiconductors.
5. The device of claim 1, wherein the features of said geometrical pattern comprise a thickness of at least the electrically conductive layer structure, lateral dimensions of the perforation region and that of electrically-conductive surrounding, and a fill factor of perforations within the electrically-conductive structure.
6. The device of claim 1, wherein said material composition is selected to provide a certain electrical conductivity profile across the source electrode, said certain electrical conductivity profile being selected to provide the desired charge carrier’s injection.
7. The device of claim 6, wherein said material composition comprises a single material layer or a multi-layer structure.
8. The device of claim 1, wherein said patterned source electrode has anisotropic injection properties.
9. The device of claim 1, wherein said geometrical pattern is formed by depositing at least one electrically conductive material on said dielectric layer via a patterning mask comprising a block copolymer layer, thereby enabling nano-scale features of the pattern and independent selection of materials for the electrically conductive patterned structure and the dielectric layer underneath said structure.
10. The device of claim 9, wherein said block copolymer comprises PS-b-PMMA,
11. A method for use in manufacturing a vertical thin film transistor structure, the method comprising applying patterning to at least one layer of a source electrode structure to create an array of spaced-apart perforations surrounded by the continuous electrically conductive regions along said electrode, said patterning utilizing a block copolymer material as a patterning mask to thereby enabling to provide a selected thickness of the patterned layer and lateral feature size of the pattern.
12. The method of claim 11 wherein said patterning creates nano-scale pattern features.
13. The method of claim 11, wherein said patterning comprises selecting an optimized relationship between the electrode layer thickness and the layer patterned perforations for a given selected dielectric layer thickness underneath the patterned electrode structure.
14. The method of claim 11, comprising providing a desired electrical conductivity along the patterned electrode and desired charge carriers’ injection barrier by appropriately selecting the source electrode material composition, geometry, and fill factor of the perforations.
15. The method of claim 14 wherein said selecting of the source electrode material composition comprises providing a single material layer or a multi-layer structure.
16. The method of claim 11, wherein said patterning comprises controlling evaporation of one or more electrically conductive materials and selecting a dielectric material of a desired dielectric permeability.
17. The method of claim 11, wherein said patterning comprises creating a phase separation of diblock copolymer into a first phase and a second phase; dissolving the first phase of the diblock copolymer; evaporating at least one electrically conductive material onto said patterned block copolymer serving as a patterning mask; dissolving the second phase of the block copolymer by performing a lift-off process for the conductive material to thereby remove the mask and create a patterned conductive layer.
18. The method of claim 17, wherein said creating of said phase separation comprises solvent annealing.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A connector assembly comprising:
a body having a top side and a bottom side;
a bottom signal plate connected to the bottom side, the bottom signal plate being configured for capacitive coupling to a conductor of a coplanar waveguide;
a bottom grounding plate connected to the bottom side and spaced apart from the bottom signal plate, the bottom grounding plate being configured for capacitive coupling to a grounding plane of the coplanar waveguide;
a first electrically conductive pathway electrically connected to the bottom signal plate and extending to the top side;
a second electrically conductive pathway electrically connected to the bottom grounding plate and extending to the top side;
a dielectric adhesive at least partially covering the bottom signal plate and the bottom grounding plate;
a top grounding plate disposed on the top side, the top grounding plate being electrically connected to the bottom grounding plate through the second electrically conductive pathway; and
a microstrip disposed on the top side and electrically connected to the bottom signal plate through the first electrically conductive pathway, the microstrip and the top grounding plate being spaced apart,
wherein the microstrip extends from the first electrically conductive pathway towards the top grounding plate.
2. The connector assembly of claim 1, wherein the body, the bottom signal plate, the bottom grounding plate, the first electrically conductive pathway and the second electrically conductive pathway comprise a printed circuit board.
3. The connector assembly of claim 1, further comprising a terminal attached to the microstrip and the top grounding plate on the top side, the terminal being configured to receive a coaxial cable and the terminal being electrically connected to the first electrically conductive pathway and to the second electrically conductive pathway.
4. The connector assembly of claim 1 further comprising circuitry in line with the microstrip.
5. A method of assembling a connector arrangement, the method comprising the steps of:
providing a coplanar waveguide having a center conductor and a grounding plane;
providing a connector assembly including:
a body having a top side and a bottom side;
a bottom signal plate connected to the bottom side;
a bottom grounding plate connected to the bottom side and spaced apart from the bottom signal plate;
a first electrically conductive pathway electrically connected to the bottom signal plate and extending to the top side;
a second electrically conductive pathway electrically connected to the bottom grounding plate and extending to the top side; and
a dielectric adhesive at least partially covering the bottom signal plate and the bottom grounding plate;
aligning the connector assembly with the coplanar waveguide such that the bottom signal plate aligns with the center conductor and such that the bottom grounding plate aligns with the grounding plane; and
pressing the connector assembly and the coplanar waveguide together such that the dielectric adhesive adheres the connector assembly to the coplanar a waveguide
wherein a gap is disposed about a periphery of the center conductor such that the center conductor and the grounding plane are spaced apart, the gap being configured as a loop with a widened end, the method further comprising the step of aligning the bottom signal plate with the widened end.
6. The method of claim 5, wherein the connector assembly further includes a top grounding plate disposed on the top side, the top grounding plate being electrically connected to the bottom grounding plate through the second electrically conductive pathway, wherein the connector assembly further includes a microstrip disposed on the top side, the microstrip being electrically connected to the bottom signal plate through the first electrically conductive pathway, wherein the microstrip and the top grounding plate are spaced apart, the method further comprising the steps of:
providing a coaxial cable having a central conductor and a grounding shield; and
connecting the coaxial cable to the connector assembly such that the grounding shield is electrically connected to the top grounding plate and the central conductor is electrically connected to the microstrip.
7. The method of claim 6 wherein the connecting step comprises soldering the grounding shield to the top grounding plate and soldering the central conductor to the micro strip.
8. A connecting arrangement comprising:
a coplanar waveguide having a center conductor and a grounding plane; and
a connector assembly including:
a body having a top side and a bottom side;
a bottom signal plate connected to the bottom side;
a bottom grounding plate connected to the bottom side and spaced apart from the bottom signal plate;
a first electrically conductive pathway electrically connected to the bottom signal plate and extending to the top side;
a second electrically conductive pathway electrically connected to the bottom grounding plate and extending to the top side; and
a dielectric adhesive at least partially covering the bottom signal plate and the bottom grounding plate
wherein the bottom signal plate is capacitively coupled with the center conductor, wherein the bottom grounding plate is capacitively coupled with the grounding plane, and wherein the dielectric adhesive adheres the connector assembly to the coplanar waveguide and
wherein a gap is disposed about a periphery of the center conductor such that the center conductor and the grounding plane are spaced apart, the gap being configured as a loop with a widened end and wherein the bottom signal plate is aligned with the widened end.
9. The connecting arrangement of claim 8:
wherein the body comprises a printed circuit board;
wherein a gap is disposed about a periphery of the center conductor such that the center conductor and the grounding plane are spaced apart, the gap being configured as a loop with a widened end,
wherein the bottom signal plate is aligned with the widened end,
wherein the connector assembly further includes a top grounding plate disposed on the top side, the top grounding plate being electrically connected to the bottom grounding plate through the second electrically conductive pathway,
wherein the connector assembly further includes a microstrip disposed on the top side, the microstrip being electrically connected to the bottom signal plate through the first electrically conductive pathway, the microstrip and the top grounding plate being spaced apart,
wherein the microstrip extends from the first electrically conductive pathway towards the top grounding plate,
wherein a characteristic impedance of the microstrip is substantially the same as a characteristic impedance of the coplanar waveguide,
wherein the first electrically conductive pathway comprises a via hole, and
wherein the second electrically conductive pathway comprises a via hole.
10. The connecting arrangement of claim 8, wherein the body, the bottom signal plate, the bottom grounding plate, the first electrically conductive pathway and the second electrically conductive pathway comprise a printed circuit board.
11. The connecting arrangement of claim 8, wherein the connector assembly further includes a microstrip disposed on the top side, the microstrip being electrically connected to the bottom signal plate through the first electrically conductive pathway.
12. The connecting arrangement of claim 11, wherein a characteristic impedance of the microstrip is substantially the same as a characteristic impedance of the coplanar waveguide.
13. The connecting arrangement of claim 8, wherein the connector assembly further includes a top grounding plate disposed on the top side, the top grounding plate being electrically connected to the bottom grounding plate through the second electrically conductive pathway.
14. The connecting arrangement of claim 13, wherein the connector assembly further includes a microstrip disposed on the top side and electrically connected to the bottom signal plate through the first electrically conductive pathway, the microstrip and the top grounding plate being spaced apart.