What is claimed is:
1. A voltage converter circuit comprising:
a transistor switch for providing current pulses to a current input node, the transistor switch having a gate and a turn-on threshold voltage;
an adjustment circuit for providing a controlled voltage to the gate for turning on the transistor switch and having means for compensating for variations in the turn-on threshold voltage of the transistor switch; and
a timer for enabling the adjustment circuit for a preset period of time.
2. The voltage converter circuit as recited in claim 1 wherein the transistor switch is a MOSFET.
3. The voltage converter circuit as recited in claim 1 wherein the adjustment circuit contains a transistor having a turn-on threshold voltage substantially equal to the turn-on threshold voltage of the transistor switch.
4. The voltage converter circuit as recited in claim 1 wherein the adjustment circuit includes a voltage divider circuit.
5. The voltage converter circuit as recited in claim 4 wherein the voltage divider circuit has at least one resistor which can be dimensioned to adjust the gate voltage of the transistor switch.
6. The voltage converter circuit as recited in claim 4 wherein the voltage divider circuit includes at least one transistor having a threshold voltage substantially the same as the transistor switch.
7. The voltage converter circuit as recited in claim 4 wherein the voltage divider circuit includes at least one transistor having a source and a drain, and the transistor switch has a source and a drain wherein the sources and drains share doped regions.
8. A semiconductor memory comprising an adjustment current, wherein the adjustment comprises:
a first node;
a second node for connecting to a gate of a MOSFET switch;
a feedback circuit connected to the first and second nodes for monitoring voltage changes at the first node and adjusting voltage at a second node to compensate for variations in current flow through the MOSFET switch.
9. The semiconductor memory as recited in claim 8 wherein the feedback circuit further comprises a differential amplifier to supply a substantially constant voltage to the first node, a resistor connected between the first node and ground such that a constant current flows through a first transistor, the first transistor having a gate connected to the second node.
10. The semiconductor memory as recited in claim 9 wherein the first transistor and the MOSFET switch are PMOSFETs.
11. The semiconductor memory as recited in claim 9 wherein the first transistor and the MOSFET switch are NMOSFETs.
12. The semiconductor memory as recited in claim 9 wherein the first transistor has a threshold voltage substantially equal to the threshold voltage of the MOSFET switch.
13. The semiconductor memory as recited in claim 9 wherein the first transistor has a source and a drain, the MOSFET switch has a source and a drain wherein the sources and drains share doped regions.
14. A semiconductor memory device voltage down converter comprising:
a first node having a reference voltage supplied thereto by a differential amplifier;
a first transistor having a gate connected to a second node, the second node connecting to a gate of a MOSFET switch;
a first resistor connecting between a drain of the first transistor and ground such that constant current flows through the first resistor and the first transistor;
a feedback circuit for monitoring voltage changes at the first node and adjusting voltage at a second node to compensate for variations in the threshold voltage of the MOSFET switch.
15. The semiconductor memory device voltage down converter as recited in claim 14 wherein the first transistor and the MOSFET switch are PMOSFETs.
16. The semiconductor memory device voltage down converter as recited in claim 14 wherein the first transistor and the MOSFET switch are NMOSFETs.
17. The semiconductor memory device voltage down converter as recited in claim 14 wherein the first transistor has a threshold voltage substantially equal to the threshold voltage of the MOSFET switch.
18. The semiconductor memory device voltage down converter as recited in claim 14 wherein the first transistor has a source and a drain, the MOSFET switch has a source and a drain wherein the sources and drains share doped regions.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A radio-frequency device comprising:
a planar dielectric layer;
a first conductive layer placed on one surface of the dielectric layer; and
a second conductive layer placed on the other surface of the dielectric layer,
the first conductive layer having a width dimension equal to about \xbd of an effective wavelength of a radio-frequency signal transmitted,
the second conductive layer comprising:
a plurality of conductive elements which are arrayed periodically and two-dimensionally, independently of one another, at an array pitch equal to about \xbc of the effective wavelength of the radio-frequency signal; and
a plurality of connecting elements for electrically connecting mutually neighboring ones of the conductive elements to each other, wherein
the individual connection elements are placed so as to connect the individual neighboring conductive elements selectively, whereby radiation directivity of an electromagnetic field formed by the first and second conductive layers is controlled.
2. The radio-frequency device as defined in claim 1, wherein in the second conductive layer, the individual conductive elements are square-shaped in equal dimensions and shape and placed in a grid periodically at the array pitch on the other surface of the dielectric layer.
3. The radio-frequency device as defined in claim 2, wherein a ratio of a width dimension of each of the conductive elements to a spacing dimension between each conductive element and its neighboring conductive element is set within a range of 9010 to 982.
4. The radio-frequency device as defined in claim 2, wherein in the second conductive layer,
at least one set of the conductive elements having no mutual electrical connection by the connecting element is included, and
a slot two-dimensionally surrounded by a conductor is formed in a region including a space between the one set of the conductive elements.
5. The radio-frequency device as defined in claim 2, wherein in the second conductive layer,
the conductive element having no electrical connection with the conductive elements neighboring in four directions by the connecting elements is included, and
a slot two-dimensionally surrounded by a conductor is formed in a region including spaces between the conductive element and the four conductive elements.
6. The radio-frequency device as defined in claim 2, wherein the conductive elements are formed in a region on the second conductive layer corresponding to a region which is surrounded by a distance of equality to the effective wavelength outside an outer peripheral end portion of the first conductive layer.
7. The radio-frequency device as defined in claim 2, wherein the first conductive layer is a patch portion to which the radio-frequency signal is inputted or from which the radio-frequency signal is outputted, and
the radio-frequency device further includes a signal transmission line for performing transmission of the radio-frequency signal between the patch portion and external of the device.
8. The radio-frequency device as defined in claim 2, wherein each of the connecting elements is a conductive pattern.
9. The radio-frequency device as defined in claim 2, wherein each of the connecting elements is a chip capacitor.
10. A radio-frequency device comprising:
a planar dielectric layer;
a first conductive layer placed on one surface of the dielectric layer; and
a second conductive layer placed on the other surface of the dielectric layer,
the first conductive layer having a width dimension equal to about \xbd of an effective wavelength of a radio-frequency signal transmitted,
the second conductive layer comprising:
a plurality of conductive elements each of which has a square shape of equal dimensions and shape and which are arrayed on the other surface of the dielectric layer at a specified array pitch two-dimensionally and periodically in a grid independently of one another;
a plurality of connecting elements for electrically connecting a plurality of mutually neighboring ones of the conductive elements to one another; and
an open conductive element group which includes an conductive element group comprising a plurality of the conductive elements of an n-rows and n-columns array, where n is an integer of 2 or more, electrically connected to one another by a plurality of the connecting elements, the conductive element group having a generally square shape in which a one-side length is equal to about \xbc of the effective wavelength of the radio-frequency signal, and moreover having no electrical connections with the individual conductive elements placed in four directions therearound by the connecting elements, wherein
a slot two-dimensionally surrounded by a conductor is formed in a region including spaces between the open conductive element group and the individual conductive elements placed therearound in the four directions, whereby radiation directivity of an electromagnetic field formed by the first and second conductive layers is controlled.