1. A drying machine comprising:
a drum disposed in a cabinet to receive laundry;
an inlet channel configured to allow external air to be introduced into the drum therethrough;
a heater configured to heat air introduced into the inlet channel;
an outlet channel configured to allow air in the drum to be discharged out of the cabinet therethrough;
a circulating channel connected between the outlet channel and the heater such that at least a portion of air flowing through the outlet channel is introduced into the heater through the circulating channel before being discharged out of the cabinet and circulated into the drum; and
a condenser configured to condense the circulated air such that a humidity of air passing through the circulating channel is decreased, said condenser comprising first channel parts that allow the air introduced into the circulating channel to flow therethrough, and second channel parts that allow external air, necessary to take heat away from the air passing through the first channel parts, to flow therethrough.
2. The machine as set forth in claim 1, wherein the condenser further comprises:
an external air inlet duct that introduces external air from the outside of the cabinet;
an external air fan housing and an external air blowing fan that allows the external air having passed through the external air inlet duct to flow therethrough;
an external air guide duct that guides the external air having passed through the external air fan housing to the second channel parts; and
an external air outlet duct that guides the air having passed through the second channel parts to the outside of the cabinet.
3. A drying machine comprising:
a drum disposed in a cabinet to receive laundry;
an inlet channel configured to allow external air to be introduced into the drum therethrough;
a heater configured to heat air introduced into the inlet channel;
an outlet channel configured to allow air in the drum to be discharged out of the cabinet therethrough;
a circulating channel connected between the outlet channel and the heater such that at least a portion of air flowing through the outlet channel is introduced into the heater through the circulating channel before being discharged out of the cabinet and circulated into the drum; and
a condenser configured to condense the circulated air such that a humidity of air passing through the circulating channel is decreased, said condenser comprising a condensing duct that allows air introduced into the circulating channel to flow therethrough, and a cooling water supplying unit that supplies cooling water to the condensing duct to condense air passing through the condensing duct.
4. The machine as set forth in claim 3, wherein the cooling water supplying unit comprises:
a cooling water valve connected to an external hose that allows cooling water supplied from the external hose to flow therethrough or stopping the cooling water from flowing therethrough; and
a cooling water hose that guides cooling water having passed through the cooling water valve into the condensing duct.
5. The machine as set forth in claim 1, wherein the circulating channel consists of a circulating duct having one end communicating with one side of the outlet channel and the other end disposed in the front of the heater.
6. The machine as set forth in claim 5, wherein the circulating duct comprises:
a first circulating duct disposed between the side of the outlet channel and the condenser that guides the air having passed through the outlet channel to the condenser; and
a second circulating duct that guides the air having passed through the condenser to the heater.
7. The machine as set forth in claim 1, further comprising:
a blowing fan disposed in the outlet channel between a drum-side outlet part that allows air in the drum to flow to the outlet channel therethrough and one end of the circulating channel communicating with the outlet channel,
whereby air is distributed to the outlet channel and the circulating channel based on the exhaust resistance of air at the rear of the outlet channel.
8. The machine as set forth in claim 1, further comprising:
an air flow rate control unit disposed in the outlet channel that controls the flow rate of air passing through the outlet channel or the circulating channel.
9. The machine as set forth in claim 8, wherein the air flow rate control unit comprises:
an airflow rate control valve disposed in the outlet channel between a rear end of the outlet channel and one end of the circulating channel communicating with the outlet channel that controls the flow rate of air discharged through the outlet channel.
10. The machine as set forth in claim 9, wherein the air flow rate control valve comprises:
a plate body rotatably disposed in the outlet channel that opens or closes the outlet channel; and
a solenoid having a shaft for rotating the plate body.
11. The machine as set forth in claim 8, further comprising:
a temperature sensor that measures temperature of air discharged from the drum.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of performing a page mode operation in a semiconductor memory device comprising a plurality of memory cells, the method comprising:
generating a first clock signal upon detecting transition of a first address;
generating a second clock signal upon detecting transition of a second address following generation of the first clock signal;
receiving an internal start address and sequentially generating a plurality of access addresses by generating a current access address equal to the internal start address, wherein the internal start address comprises the first address and the second address, and the second address is a lower bit of the internal start address, and the memory cells in the plurality of memory cells are sequentially accessed by selection using the plurality of access addresses in response to at least the second clock signal; and then,
incrementing the current address in response to at least the second clock signal.
2. The method of claim 1, wherein the lower bit is a least significant bit of a start address corresponding to the internal start address.
3. The method of claim 1, wherein the page mode operation is a page mode read operation.
4. The method of claim 3, further comprising:
outputting data stored in the memory cells accessed by selection using the plurality of access addresses in response to transition of at least the second clock signal.
5. A method of performing a page mode operation in a semiconductor memory device comprising a plurality of memory cells, the method comprising:
generating a first clock signal upon detecting transition of a first address;
generating a second clock signal upon detecting transition of a second address following generation of the first clock signal;
generating a third clock signal before generation of the second clock signal;
receiving an internal start address and incrementing the internal start address to sequentially generate a plurality of access addresses by generating a current access address equal to the internal start address and then incrementing the current access address in response to respective transitions of at least the second and third clock signals;
wherein the internal start address comprises the first address and the second address, and the second address is a lower bit of the internal start address, and
the memory cells in the plurality of memory cells are sequentially accessed by selection using the plurality of access addresses in response to at least the second and third clock signals.
6. The method of claim 5, wherein the lower bit is the least significant bit of a start address corresponding to the internal start address.
7. The method of claim 5, wherein the page mode operation is a page mode read operation.
8. A method of performing a page mode operation in a semiconductor memory device comprising a plurality of memory cells, the method comprising:
receiving a start address and outputting an internal start address comprising a first address and a second address, wherein the second address is a lower bit of the internal start address;
receiving the first address and generating a first clock signal upon detecting transition of the first address;
receiving the second address and generating a second clock signal upon detecting transition of the second address following generation of the first clock signal; and
sequentially providing access addresses to a memory cell array to sequentially access memory cells in the memory cell array,
wherein upon receiving the internal start address, the access addresses are generated by generating a current access address equal to the internal start address and then incrementing the current access address in response to at least the second clock signal.