1. A method for manufacturing a semiconductor device comprising:
measuring a finished state of a wafer in a completed process;
estimating an in-surface tendency of the wafer based on a result of the measuring;
estimating a surface characteristic of the wafer based on the estimated in-surface tendency;
setting a process condition of a uncompleted process based on the estimated surface characteristic; and
controlling the uncompleted process based on the set process condition.
2. The method for manufacturing a semiconductor device according to claim 1, wherein, in the setting of the process condition, if the estimated surface characteristic does not satisfy a predetermined specification, the process condition is modified to be set.
3. The method for manufacturing a semiconductor device according to claim 1, further comprising:
forming a insulating film on the wafer;
measuring a thickness of the formed insulating film in the measuring of the finished state;
estimating the in-surface tendency of the wafer based on the measured thickness in the estimating of the in-surface tendency;
setting a process condition of a chemical mechanical polishing (CMP) process, an etching process, or a post-processing based on the estimated surface characteristic in the setting of the process condition; and
controlling the CMP process, the etching process, or the post-processing based on the set process condition in the controlling of the uncompleted process.
4. The method for manufacturing a semiconductor device according to claim 1, further comprising:
polishing the wafer on which a insulating film is formed, by performing a CMP;
measuring a thickness of the insulating film formed on the polished wafer in the measuring of the finished state;
estimating the in-surface tendency of the wafer based on the measured thickness in the estimating of the in-surface tendency;
setting a process condition of a etching process or a post-processing based on the estimated surface characteristic in the setting of the process condition; and
controlling the etching process or the post-processing based on the set process condition in the controlling of the uncompleted process.
5. The method for manufacturing a semiconductor device according to claim 1, further comprising:
selectively etching a silicon oxide film formed on the wafer;
measuring a remaining thickness of the etched silicon oxide film in the measuring of the finished state;
estimating the in-surface tendency of the wafer based on the measured remaining thickness in the estimating of the in-surface tendency;
setting a process condition of a post-processing based on the estimated surface characteristic in the setting of the process condition; and
controlling the post-processing based on the set process condition in the controlling of the uncompleted process.
6. The method for manufacturing a semiconductor device according to claim 1, further comprising:
acquiring a partitioned data from predetermined partitioned regions of the wafer and estimating states of a completed process of the partitioned regions corresponding to partitioned data in the estimating of the in-surface tendency;
estimating a characteristic of the completed process of the partitioned regions based on the estimated state of the completed process in the estimating of the surface characteristic; and
integrating the estimated characteristic of the completed processes and setting a process condition of a uncompleted process based on the a result of the integration of the estimated characteristic in the setting of the process condition.
7. The method for manufacturing a semiconductor device according to claim 6, wherein, in the setting of the process condition, if the estimated surface characteristic does not satisfy a predetermined specification, the process condition is modified to be set.
8. The method for manufacturing a semiconductor device according to claim 6, further comprising;
measuring particles on the surface of the wafer in the completed process and estimating particle risk based on the measured particles in the estimating of the in-surface tendency; and
controlling the uncompleted process based on the estimated particle risk and the set process condition in the controlling of the uncompleted process.
9. The method for manufacturing a semiconductor device according to claim 8, further comprising:
selecting performing of the uncompleted process or starting of a new lot wafer manufacturing process based on the estimated particle risk on the surface of the wafer; and
controlling the uncompleted process based on a result of the selecting in the controlling of the uncompleted process.
10. The method for manufacturing a semiconductor device according to claim 9, further comprising: in the selecting of the starting of the manufacturing process,
comparing a profit to be obtained from the performing of the uncompleted process with a profit to be obtained from the performing the new lot wafer manufacturing process based on the estimated particle risk on the surface of the wafer; and
selecting the performing of the uncompleted process or the starting of the new lot wafer manufacturing process based on a result of the comparing.
11. A system for manufacturing a semiconductor device comprising:
an in-surface tendency estimation unit which measures a finished state of a wafer in a completed process and estimates an in-surface tendency of the wafer based on a result of the measuring;
a characteristic estimation unit which estimates a surface characteristic of the wafer based on the estimated in-surface tendency;
a process condition setting unit which sets a process condition of a uncompleted process based on the estimated surface characteristic; and
a controller which controls the uncompleted process based on the set process condition.
12. The system for manufacturing a semiconductor device according to claim 11, wherein, if the estimated surface characteristic does not satisfy a predetermined specification, the process condition setting unit modifies the process condition to be set.
13. The system for manufacturing a semiconductor device according to claim 11, further comprising:
a film forming process unit which performs a process of forming a insulating film on the wafer;
a CMP process unit which performs a CMP process to polish the wafer on which the insulating film is formed by the film forming process unit;
an etching process unit which selectively etches a silicon oxide film formed on the wafer polished by the CMP process unit; and
a post-processing unit which performs a post-processing on the wafer selectively etched by the etching process unit,
wherein the in-surface tendency estimation unit measures a thickness of the insulating film formed by the film forming process unit and estimates the in-surface tendency of the wafer based on the measured thickness,
wherein the process condition setting unit sets a process condition of the CMP process unit, the etching process unit, or the post-processing unit based on the estimated surface characteristic, and
wherein the controller controls the CMP process unit, the etching process unit, or the post-processing unit based on the set process condition.
14. The system for manufacturing a semiconductor device according to claim 11, further comprising:
a film forming process unit which performs a process of forming a insulating film on the wafer;
a CMP process unit which performs a CMP process to polish the wafer on which the insulating film is formed by the film forming process unit;
an etching process unit which selectively etches a silicon oxide film formed on the wafer polished by the CMP process unit; and
a post-processing unit which performs a post-processing on the wafer selectively etched by the etching process unit,
wherein the in-surface tendency estimation unit measures a thickness of the insulating film formed on the wafer polished by the CMP process unit and estimates the in-surface tendency of the wafer based on the measured thickness,
wherein the process condition setting unit sets a process condition of the etching process unit or the post-processing unit based on the estimated surface characteristic, and
wherein the controller controls the etching process unit or the post-processing unit based on the set process condition.
15. The system for manufacturing a semiconductor device according to claim 11, further comprising:
a film forming process unit which performs a process of forming a insulating film on the wafer;
a CMP process unit which performs a CMP process to polish the wafer on which the insulating film is formed by the film forming process unit;
an etching process unit which selectively etches a silicon oxide film formed on the wafer polished by the CMP process unit; and
a post-processing unit which performs a post-processing on the wafer selectively etched by the etching process unit,
wherein the in-surface tendency estimation unit measures a remaining thickness of the silicon oxide film etched by the etching process unit and estimates the in-surface tendency of the wafer based on the measured remaining thickness,
wherein the process condition setting unit sets a process condition of the post-processing unit based on the estimated surface characteristic, and
wherein the controller controls the post-processing unit based on the set process condition.
16. The system for manufacturing a semiconductor device according to claim 11, further comprising:
a partitioned data acquisition unit which acquires partitioned data from predetermined partitioned regions of the wafer,
wherein the in-surface tendency estimation unit estimates states of a completed process of the partitioned regions corresponding to partitioned data acquired by the partitioned data acquisition unit,
wherein the surface characteristic estimation unit estimates characteristic of the completed process of the partitioned regions based on the state of the completed process estimated by the in-surface tendency estimation unit, and
wherein the process condition setting unit integrates the characteristic of the completed processes estimated by the surface characteristic estimation unit and sets a process condition of a uncompleted process based on the a result of the integration of the estimated characteristic.
17. The system for manufacturing a semiconductor device according to claim 16, wherein, if the estimated surface characteristic does not satisfy a predetermined specification, the process condition setting unit modifies the process condition to be set.
18. The system for manufacturing a semiconductor device according to claim 16,
wherein the in-surface tendency estimation unit measures particles on the surface of the wafer in the completed process and estimates particle risk based on the measured particles, and
wherein the controller controls the uncompleted process based on the particle risk estimated by the in-surface tendency estimation unit and the process condition set by the process condition setting unit.
19. The system for manufacturing a semiconductor device according to claim 18,
further comprising a selection unit which selects performing of the uncompleted process or starting of a new lot wafer manufacturing process based on the particle risk on the surface of the wafer estimated by the in-surface tendency estimation unit,
wherein the controller controls the uncompleted process based on a result of the selecting of the selection unit.
20. The system for manufacturing a semiconductor device according to claim 19,
wherein the selection unit compares a profit to be obtained from the performing of the uncompleted process with a profit to be obtained from the performing the new lot wafer manufacturing process based on the particle risk estimated by the in-surface tendency estimation unit and selects the performing of the uncompleted process or the starting of the new lot wafer manufacturing process based on a result of the comparing.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A carrier assembly, comprising:
a first plate formed with a spline, by which a stator shaft is connected to the carrier assembly;
a second plate spaced from the first plate and formed with a cylinder;
pinions supported on the first and second plates; and
a piston located in the cylinder for displacement along an axis of the cylinder.
2. The carrier assembly of claim 1, wherein the first plate is formed with a hydraulic passage in hydraulic communication with the cylinder.
3. The carrier assembly of claim 1, wherein the second plate is secured to a clutch.
4. The carrier assembly of claim 1, wherein:
the second plate is secured to a control element;
said piston is supported in the cylinder for moment along an axis of the cylinder toward and away from the control element; and
the cylinder includes a head formed in the second plate, and a open end facing away from the first plate, the piston extending toward the control element from the open end.
5. The carrier assembly of claim 4, wherein the control element is one of a clutch and a brake.
6. The carrier assembly of claim 1, further comprising:
a second passage extending between the hydraulic passage and the cylinder.
7. The carrier assembly of claim 1, wherein:
the second plate supports a spring contacting the piston and urging the piston toward a head of the cylinder; and
an interface between an inner surface of the cylinder and the piston is sealed against passage of fluid.
8. A carrier assembly, comprising:
a gear control element;
a carrier including a first plate formed with a passage communicating with a pressure source and a spline, by which a stator shaft is connected to the carrier assembly, and a second plate formed with a cylinder through which the control element is actuated, and second passage in the carrier and communicating the cylinder to the first passage;
pinions supported on the plates; and
a piston located in the cylinder for actuating the control element.
9. The carrier assembly of claim 8, wherein the control element is one of a clutch and a brake.
10. The carrier assembly of claim 8, further comprising:
a planetary gearset including a sun gear secured to a transmission input, a ring gear, first planet pinions meshing with the sun gear, and second planet pinions meshing with the first planet pinions and the ring gear.
11. The carrier assembly of claim 8, further comprising:
a spring located in the cylinder for urging the piston away from engagement with the brake control element.