1. A method comprising:
receiving an indication that a viewer of a video stream on a device has selected a tagged area of the video corresponding to an article of clothing appearing in the video while the video is playing;
using a computer,
i) accessing and retrieving from an avatar-related storage stored information needed to construct an avatar for the viewer dimensioned in proportion to physical dimensions of the viewer based upon an avatar identifier for the viewer,
ii) accessing and retrieving from a tag related storage sizing information regarding the article of clothing corresponding to the tagged area that is sufficient to allow the article of clothing to be displayed on the avatar, and appear to fit the avatar in proportion to how a physical specimen of the article of clothing would fit the viewer, and
iii) changing the sizing information contained in the tag related storage independently of the tagged area in the video; and
displaying to the viewer on the device the avatar for the viewer wearing the proportionally fitted article of clothing.
2. The method of claim 1, further comprising:
receiving an indication from the viewer, following the displaying, that will trigger a purchase by the viewer of the article of clothing displayed on the avatar.
3. The method of claim 1, further comprising:
using the computer, retrieving information identifying a vendor for the article of clothing corresponding to the tagged area; and
initiating a communication by the viewer to the vendor, the communication identifying the article of clothing and payment information so that the vendor can consummate the viewer’s purchase of the article of clothing.
4. The method of claim 1, further comprising:
determining that an alteration must be made to the article of clothing based upon the stored information needed to construct the avatar for the viewer dimensioned in proportion to physical dimensions of the viewer and the sizing information regarding the article of clothing.
5. The method of claim 3, wherein the vendor is one of multiple vendors applicable to different regional user locations, and the information identifying the vendor is based upon regional location information.
6. The method of claim 1, wherein the displaying to the viewer comprises, displaying the avatar to the viewer while the video continues to play and be displayed to the viewer.
7. The method of claim 2, wherein, following receiving the indication from the viewer that will trigger the purchase by the viewer, the method comprises requesting payment information from the viewer.
8. The method of claim 7, further comprising:
receiving payment information from the viewer.
9. The method of claim 8, further comprising:
initiating a communication with a vendor identifying the article of clothing and the payment information so that the vendor can consummate the viewer’s purchase of the article of clothing.
10. The method of claim 1, further comprising: maintaining the stored information needed to construct the avatar for the viewer dimensioned in proportion to the physical dimensions of the viewer in a database such that the viewer can change at least one value representing at least one dimension of the viewer.
11. An apparatus comprising:
an Enterprise System Bus (ESB) platform including a processor, memory, tag-related storage and avatar-related storage,
the tag-related storage including information stored therein correlating selectable areas in a video with items of clothing appearing in the video, the tag-related storage providing for storage of details regarding the items of clothing, the tag-related storage further providing for changing the details independently of the information correlating the selectable areas in the video with the items of clothing appearing in the video,
the avatar-related storage including information stored therein, provided by a specific user and representing the specific user’s actual physical measurements, that is usable by the ESB platform to construct an avatar for the specific user that is proportionally dimensioned to the actual physical measurements;
the ESB platform being constructed to, in response to receiving an indication that the specific user has made a selection of a specific selectable area of the video, the ESB platform will
(i) retrieve the details regarding an item of clothing corresponding to the specific selectable area of the video based upon the information stored in the tag related storage,
(ii) retrieve the information from the avatar-related storage,
(iii) use the details and the retrieved information to construct a clothed avatar for the specific user with the clothed avatar wearing the item of clothing such that a depicted version of the item of clothing on the avatar will fit the avatar in proportion to how the item of clothing will fit the actual physical measurements of the specific user, and
(iv) display the clothed avatar to the specific user.
12. The apparatus of claim 11, further comprising an interface via which the ESB platform receives the details regarding an item of clothing for storage in the tag related storage.
13. The apparatus of claim 11, further comprising an interface via which the ESB platform can provide payment information to a vendor of the item of clothing.
14. The apparatus of claim 11, wherein the ESB platform is constructed to tag the video so as to define the selectable areas.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1-20. (canceled)
21. A content addressable memory comprising:
first and second search registers for storing first and second search data to be compared with first and second stored data stored in respective first and second memory blocks; and
a data bus for providing first and second search data to said first and second registers, respectively, said data bus being coupled to said first search register and said second search register.
22. A content addressable memory as in claim 21, wherein:
said first memory block being capable of comparing said first stored data to said first search data and providing a first comparison output; and
said second memory block being capable of comparing said second stored data to said second search data and providing a second comparison output.
23. A content addressable memory as in claim 22, further comprising a control circuit mutually coupled to said first search register and to said second search register, said control circuit being operable to provide a first and second control signal to control said first and second search registers such that first search data from said data bus is received by said first search register during a first time interval and second search data from said data bus is received by said second search register during a second time interval.
24. A content addressable memory as in claim 23, wherein said control circuit is mutually coupled to said first memory block and to said second memory block, said control circuit being operable to provide signals such that said first and second search data are evaluated by said first and second memory blocks during a third time interval.
25. A content addressable memory as in claim 24, wherein said data bus is a serial data bus.
26. A content addressable memory as in claim 24, wherein said data bus is a parallel data bus.
27. A content addressable memory as in claim 24, wherein said data lines are strip lines.
28. A content addressable memory as in claim 24, wherein said data lines are waveguide structures.
29. A method of forming a content addressable memory comprising:
forming first and second memory blocks over a substrate for storing first and second stored data;
forming first and second search registers for storing first and second search data to be compared with said first and second stored data, said first and second search registers respectively coupled to said first and second memory blocks; and
forming a data bus over said substrate for providing first and second search data to said first and second registers, respectively, said data bus being coupled to said first search register and said second search register.
30. A method of forming a content addressable memory as defined in claim 29, wherein:
said first memory block being capable of comparing said first stored data to said first search data and providing a first comparison output; and
said second memory block being capable of comparing said second stored data to said second search data and providing a second comparison output.
31. A method of forming a content addressable memory as defined in claim 30, further comprising forming a control circuit over said substrate coupled to said first search register and to said second search register, said control circuit being operable to provide a first and second control signal to control said first and second search registers such that first search data from said data bus is received by said first search register during a first time interval and second search data from said data bus is received by said second search register during a second time interval.
32. A method of forming a content addressable memory as defined in claim 31, wherein said control circuit is mutually coupled to said first memory block and to said second memory block, said control circuit being operable to provide signals such that said first and second search data are evaluated by said first and second memory blocks during a third time interval.
33. A router comprising:
a processor; and
a content addressable memory coupled to said processor, said content addressable memory comprising:
first and second search registers for storing first and second search data to be compared with first and second stored data stored in respective first and second memory blocks; and
a data bus for providing first and second search data to said first and second registers, respectively, said data bus being coupled to said first search register and said second search register.
34. A router as in claim 33, wherein:
said first memory block being capable of comparing said first stored data to said first search data and providing a first comparison output; and
said second memory block being capable of comparing said second stored data to said second search data and providing a second comparison output.
35. A router as in claim 34, further comprising a control circuit mutually coupled to said first search register and to said second search register, said control circuit being operable to provide a first and second control signal to control said first and second search registers such that first search data from said data bus is received by said first search register during a first time interval and second search data from said data bus is received by said second search register during a second time interval.
36. A router as in claim 35, wherein said control circuit is mutually coupled to said first memory block and to said second memory block, said control circuit being operable to provide signals such that said first and second search data are evaluated by said first and second memory blocks during a third time interval.
37. A communication network system comprising:
a plurality of computers;
a communication medium coupling said plurality of computers to a router, said router including a content addressable memory device, said content addressable memory device having:
first and second search registers for storing first and second search data to be compared with first and second stored data stored in respective first and second memory blocks; and
a data bus for providing first and second search data to said first and second registers, respectively, said data bus being coupled to said first search register and said second search register.
38. A system as in claim 37, wherein:
said first memory block being capable of comparing said first stored data to said first search data and providing a first comparison output; and
said second memory block being capable of comparing said second stored data to said second search data and providing a second comparison output.
39. A system as in claim 38, further comprising a control circuit mutually coupled to said first search register and to said second search register, said control circuit being operable to provide a first and second control signal to control said first and second search registers such that first search data from said data bus is received by said first search register during a first time interval and second search data from said data bus is received by said second search register during a second time interval.
40. A system as in claim 39, wherein said control circuit is mutually coupled to said first memory block and to said second memory block, said control circuit being operable to provide signals such that said first and second search data are evaluated by said first and second memory blocks during a third time interval.
41. A digital system comprising:
a central processing unit;
an IO port device coupled to said central processing unit;
a memory data bus coupled to said central processing unit; and
a content addressable memory device, said content addressable memory device including:
first and second search registers for storing first and second search data to be compared with first and second stored data stored in respective first and second memory blocks; and
a data bus for providing first and second search data to said first and second registers, respectively, said data bus being coupled to said first search register and said second search register.
42. A system as in claim 41, wherein:
said first memory block being capable of comparing said first stored data to said first search data and providing a first comparison output; and
said second memory block being capable of comparing said second stored data to said second search data and providing a second comparison output.
43. A system as in claim 42, further comprising a control circuit mutually coupled to said first search register and to said second search register, said control circuit being operable to provide a first and second control signal to control said first and second search registers such that first search data from said data bus is received by said first search register during a first time interval and second search data from said data bus is received by said second search register during a second time interval.
44. A system as in claim 43, wherein said control circuit is mutually coupled to said first memory block and to said second memory block, said control circuit being operable to provide signals such that said first and second search data are evaluated by said first and second memory blocks during a third time interval.