1. A direct current to direct current (DC-DC) converter circuit having a direct current input, said converter circuit comprising:
a first switch circuit;
a second switch circuit connected in parallel with said first switch circuit;
a third switch circuit;
a fourth switch circuit; and
control circuitry coupled to said switch circuits, said control circuitry configured to receive a direct current output voltage reference signal and utilize said direct current output voltage reference signal to select an operation of at least one of said switch circuits to generate a direct current output voltage signal of said DC-DC converter circuit, wherein said control circuitry comprises:
a first output switch driver having a plurality of first control signal outputs configured to control said first switch circuit, a portion of said third switch circuit, and a portion of said fourth switch circuit; and
a second output switch driver having a plurality of second control signal outputs configured to control said second switch circuit, another portion of said third switch circuit, and another portion of said fourth switch circuit.
2. The converter circuit as set forth in claim 1, wherein:
said control circuitry is configured to operate said first switch circuit to provide the direct current output voltage signal that is based on the operation of said first switch circuit.
3. The converter circuit as set forth in claim 2, wherein:
said control circuitry is configured to concurrently operate said second switch circuit with said first switch circuit to provide the direct current output voltage signal that is based on the operation of said second switch circuit and said first switch circuit.
4. The converter circuit as set forth in claim 3, wherein:
said control circuitry is configured to compare said direct current output voltage reference signal with a direct current threshold voltage; and
said control circuitry is configured to concurrently operate said second switch circuit with said first switch circuit only when said direct current output voltage reference signal is greater than said direct current threshold voltage.
5. The converter circuit as set forth in claim 1, wherein said converter circuit is reconfigurable to operate in one of: a buck mode and a boost mode.
6. The converter circuit as set forth in claim 1, wherein said control circuitry further comprises:
a pulse width modulation controller having (i) an output coupled to an input of said first output switch driver and to a first input of said second output switch driver and (ii) an input configured to receive said direct current output voltage reference signal; and
a comparator circuit having (i) a first input configured to receive said direct current output voltage reference signal, (ii) a second input coupled to a direct current threshold voltage source, and (iii) an output coupled to a second input of said second output switch driver.
7. The converter circuit as set forth in claim 1, wherein:
said first switch circuit comprises a PMOS transistor and an NMOS transistor coupled in a switch configuration; and
said second switch circuit comprises a PMOS transistor and an NMOS transistor coupled in a switch configuration.
8. The converter circuit as set forth in claim 7, wherein:
the third switch circuit comprises two PMOS transistors coupled in a switch configuration;
the fourth switch circuit comprises two NMOS transistors coupled in a switch configuration;
the first output switch driver is configured to control the PMOS transistor and the NMOS transistor in the first switch circuit, one of the PMOS transistors in the third switch circuit, and one of the NMOS transistors in the fourth switch circuit; and
the second output switch driver is configured to control the PMOS transistor and the NMOS transistor in the second switch circuit, another of the PMOS transistors in the third switch circuit, and another of the NMOS transistors in the fourth switch circuit.
9. The converter circuit as set forth in claim 1, wherein:
the first and second switch circuits are coupled to a first end of an inductor; and
the third switch circuit is coupled to a second end of the inductor and to a node that provides the direct current output voltage signal.
10. The converter circuit as set forth in claim 1, wherein:
the first and second switch circuits have outputs coupled to a first end of an inductor, the first and second switch circuits also coupled to ground; and
the fourth switch circuit is coupled to a second end of the inductor and to ground.
11. A direct current to direct current (DC-DC) converter circuit having a direct current input, said converter circuit comprising:
first and second switch circuits connected in parallel; and
control circuitry coupled to the switch circuits, said control circuitry configured to receive a direct current output voltage reference signal and utilize said direct current output voltage reference signal to selectively operate at least one of the switch circuits to generate a direct current output voltage signal of said DC-DC converter circuit;
wherein the control circuitry is configured to operate only the first switch circuit to generate the direct current output voltage signal when the direct current output voltage reference signal is less than a direct current threshold voltage; and
wherein the control circuitry is configured to operate both the first and second switch circuits to generate the direct current output voltage signal when the direct current output voltage reference signal is greater than the direct current threshold voltage.
12. The converter circuit as set forth in claim 11, wherein the converter circuit is reconfigurable to operate as one of: a buck converter circuit, a boost converter circuit, and buck-boost converter circuit.
13. The converter circuit as set forth in claim 11, wherein:
the first switch circuit comprises at least one first transistor in a switch configuration; and
the second switch circuit comprises at least one second transistor in a switch configuration.
14. The converter circuit as set forth in claim 11, wherein:
said converter circuit further comprises a third switch circuit; and
said control circuitry is configured to concurrently operate said third switch circuit with said first and second switch circuits to provide said direct current output voltage signal when the direct current output voltage reference signal is greater than the direct current threshold voltage and greater than a second direct current threshold voltage.
15. The converter circuit as set forth in claim 11, wherein said control circuitry comprises:
a plurality of output switch drivers, wherein each output switch driver has an output coupled to at least one of the switch circuits;
a pulse width modulation controller having (i) an output coupled to an input of each of said output switch drivers and (ii) an input configured to receive said direct current output voltage reference signal; and
a plurality of comparator circuits, wherein each comparator circuit has (i) a first input configured to receive said direct current output voltage reference signal, (ii) a second input coupled to one of a plurality of direct current threshold voltage sources, and (iii) an output coupled to another input of one of the output switch drivers.
16. A method for providing switch size management comprising the steps of:
providing a direct current to direct current (DC-DC) converter having a direct current input, the converter comprising first, second, and third switch circuits connected in parallel and control circuitry for controlling said switch circuits;
providing a direct current output voltage reference signal to said control circuitry; and
utilizing said direct current output voltage reference signal to select an operation of at least one of the switch circuits to generate a direct current output voltage signal of said DC-DC converter;
wherein utilizing the direct current output voltage reference signal comprises:
operating only the first switch circuit to generate the direct current output voltage signal when the direct current output voltage reference signal is less than a first direct current threshold voltage;
operating both the first and second switch circuits to generate the direct current output voltage signal when the direct current output voltage reference signal is greater than the first direct current threshold voltage and less than a second direct current threshold voltage; and
operating the first, second, and third switch circuits to generate the direct current output voltage signal when the direct current output voltage reference signal is greater than the first direct current threshold voltage and greater than the second direct current threshold voltage.
17. The method as set forth in claim 16, wherein each of the switch circuits comprises a PMOS transistor and an NMOS transistor coupled in a switch configuration.
18. The method as set forth in claim 17, wherein utilizing the direct current output voltage reference signal comprises:
comparing said direct current output voltage reference signal with said first direct current threshold voltage; and
operating said second switch circuit concurrently with said first switch circuit to provide said direct current output voltage signal only when said direct current output voltage reference signal is greater than said first direct current threshold voltage.
19. The method as set forth in claim 18, wherein utilizing the direct current output voltage reference signal comprises:
comparing said direct current output voltage reference signal with said second direct current threshold voltage; and
operating said third switch circuit concurrently with said first switch circuit and said second switch circuit to provide said direct current output voltage signal only when said direct current output voltage reference signal is greater than said second direct current threshold voltage.
20. The method as set forth in claim 19, further comprising the steps of:
disabling said third switch circuit when said direct current output voltage reference signal is less than said second direct current threshold voltage; and
disabling said second switch circuit when said direct current output voltage reference signal is less than said first direct current threshold voltage.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A glass composition of a PDP comprising:
ZnO\u2014B2O3 group and
alkaline earth metal oxide.
2. The composition of claim 1 further comprising:
Bi2O3.
3. The composition of claim 2 comprises:
ZnO and B2O3 added in the ratio of 0.5\u02dc1.5 within the range of 10\u02dc40 mol %, respectively;
10\u02dc24 mol % of alkaline earth metal oxide; and
mol % or less Bi2O3.
4. The composition of claim 3 further comprises:
an additive, and said additive is at least one of La2O3, Al2O3 and SiO2, or their mixture.
5. The composition of claim 1, wherein the alkaline earth metal oxide is at least one of BaO, CaO, SrO and MgO, or their mixture.
6. The composition of claim 1 further comprises:
an additive, and said additive is at least one of La2O3, Al2O3 and SiO2, or their mixture.
7. The composition of claim 1 is mixed to a ceramic filler which is TiO2 or Al2O3.
8. The composition of claim 1 is mixed to TiO2 or Al2O3 and formed as an unleaded non-alkali isolation wall dielectric or an unleaded non-alkali lower dielectric.
9. The composition of claim 1 is included in an isolation wall, an upper dielectric layer, a lower dielectric layer and a seal material of a PDP.
10. A method for fabricating a glass composition of a PDP, comprising:
mixing 10\u02dc40 mol % of ZnO, 10\u02dc40 mol % B2O3, 10\u02dc25 mol % of alkaline earth metal oxide and 15 mol % or less Bi2O3; and
melting the mixture at a high temperature, quenching the melted component to form a glass flake, milling the glass flake to form unleaded non-alkali glass powder.
11. The method of claim 10, wherein the unleaded non-alkali glass powder has a particle diameter of 1\u02dc4 \u03bcm.
12. The method of claim 10, wherein the unleaded non-alkali glass powder is contained in each composition of an isolation wall, an upper dielectric, a lower dielectric and a seal material of a PDR.
13. A glass composition of a PDP comprising:
10\u02dc40 mol % of ZnO and B2O3 each having a ratio of 0.5\u02dc1.5;
10\u02dc24 mol % of alkaline earth metal oxide;
15 mol % or less Bi2O3; and
10 mol % or less additive for heightening a glass durability and preventing crystallization.
14. The composition of claim 13, wherein the alkaline earth metal oxide is at least one of BaO, CaO, SrO and MgO, or their mixture.
15. The composition of claim 13, wherein the additive is at least one of La2O3, Al2O3, SiO2, or their mixture.
16. The composition of claim 13 is mixed to a ceramic filler and formed as an unleaded non-alkali isolation wall dielectric or an unleaded non-alkali lower dielectric, and the ceramic filler is TiO2 or Al2O3.