1. An integrated circuit, comprising:
a substrate;
an insulation layer over the substrate;
a resistor over the insulation layer;
a first thermal gate over the resistor without contact thereof;
a second thermal gate over the resistor without contact thereof;
a heat sink contact having a top surface that is level with a top surface of the first thermal gate and a bottom surface that is over the resistor;
a first metal layer interconnect having a bottom surface with a first portion that contacts the top surface of the first thermal gate and a second portion that contacts the top surface of the heat sink contact;
a heat sink connected to the first thermal gate via the heat sink contact and the first metal layer interconnect, the heat sink formed in a portion of the resistor, wherein the heat sink is adapted to receive thermal energy that dissipates from the resistor through a flow path that includes the first thermal gate, the first metal layer interconnect, and the heat sink contact, the flow path terminating in the heat sink; and
a substrate contact having a top surface that is level with a top surface of the second thermal gate, a bottom surface in contact with the substrate, and sidewalls having a portion in contact with the resistor, wherein the substrate contact is adapted to dissipate the thermal energy from the resistor to the substrate via the second thermal gate.
2. The integrated circuit of claim 1, wherein the substrate includes a silicon on insulator (SOI) substrate.
3. The integrated circuit of claim 1, wherein each of the first thermal gate and the second thermal gate includes metal.
4. The integrated circuit of claim 1, further comprising a nitride coating on the first thermal gate and the second thermal gate.
5. The integrated circuit of claim 1, wherein the first thermal gate and the second thermal gate are electrically neutral.
6. The integrated circuit of according to claim 1, further comprising a first oxide layer and a second oxide layer, each deposited over the resistor, wherein the first thermal gate is formed in the first oxide layer and the second thermal gate is formed in the second oxide layer.
7. The integrated circuit of according to claim 6, wherein the bottom surface of the heat sink contact is level with a bottom surface of each of the first oxide layer and the second oxide layer.
8. The integrated circuit of according to claim 6, wherein the first portion of the bottom surface of the first metal layer interconnect contacts a portion of a top surface of the first oxide layer.
9. The integrated circuit of according to claim 6, wherein the flow path further includes the first oxide layer.
10. The integrated circuit of according to claim 6, further comprising a second metal layer interconnect having a bottom surface with a first portion that contacts the top surface of the second thermal gate and the second oxide layer, and a second portion that contacts the top surface of the substrate contact.
11. The integrated circuit of according to claim 10, wherein the substrate contact is further adapted to dissipate the thermal energy through the second oxide layer and the second metal layer interconnect.
12. A design structure tangibly embodied in a machine readable medium for design, manufacturing, or testing an integrated circuit, the design structure comprising:
a substrate;
an insulation layer over the substrate;
a resistor over the insulation layer;
a first thermal gate over the resistor without contact thereof;
a second thermal gate over the resistor without contact thereof;
a heat sink contact having a top surface that is level with a top surface of the first thermal gate and a bottom surface that is over the resistor;
a first metal layer interconnect having a bottom surface with a first portion that contacts the top surface of the first thermal gate and a second portion that contacts the top surface of the heat sink contact;
a heat sink connected to the first thermal gate via the heat sink contact and the first metal layer interconnect, the heat sink formed in a portion of the resistor, wherein the heat sink is adapted to receive thermal energy that dissipates from the resistor through a flow path that includes the first thermal gate, the first metal layer interconnect, and the heat sink contact, the flow path terminating in the heat sink; and
a substrate contact having a top surface that is level with a top surface of the second thermal gate, a bottom surface in contact with the substrate, and sidewalls having a portion in contact with the resistor, wherein the substrate contact is adapted to dissipate the thermal energy from the resistor to the substrate via the second thermal gate.
13. The design structure of claim 12, wherein the substrate includes a silicon on insulator (SOI) substrate.
14. The design structure of claim 12, wherein each of the first thermal gate and the second thermal gate includes metal.
15. The design structure of claim 12, further comprising a nitride coating on the first thermal gate and the second thermal gate.
16. The design structure of claim 12, wherein the first thermal gate and the second thermal gate are electrically neutral.
17. The design structure of claim 12, further comprising a second metal layer interconnect having a bottom surface with a first portion that contacts the top surface of the second thermal gate and a second portion that contacts the top surface of the substrate contact.
18. The design structure of claim 12, further comprising a first oxide layer and a second oxide layer, each deposited over the resistor, wherein the first thermal gate is formed in the first oxide layer and the second thermal gate is formed in the second oxide layer.
19. The design structure of claim 18, wherein the bottom surface of the heat sink contact is level with a bottom surface of each of the first oxide layer and the second oxide layer.
20. The design structure of claim 18, wherein the first portion of the bottom surface of the first metal layer interconnect contacts a portion of a top surface of the first oxide layer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A cable assembly for interconnecting an oximeter machine to an oximeter finger sensor, comprising:
an oximeter machine having a first socket built thereinto;
a first fixed-length cable having a jack formed in a proximal and a distal end thereof;
said jack at said proximal end of said first cable adapted to releasably engage said first socket;
a second socket, said second socket being a double socket having a proximal socket and a distal socket;
said jack at said distal end of said first cable adapted to releasably engage said proximal end of said second socket;
a second adjustable-length cable including a retractable cable housing, said second cable having a jack at its proximal end and a jack at its distal end;
said jack at said proximal end of said second cable adapted to releasably engage a distal end of said second socket;
a third socket, said third socket being a double socket having a proximal socket and a distal socket;
said jack at said distal end of said second cable adapted to releasably engage said proximal socket of said third socket;
a third fixed-length cable having a jack at a proximal end and an oximeter finger sensor at its distal end;
said jack at said proximal end of said third cable adapted to releasably engage said distal socket of said third socket;
whereby said retractable cable housing minimizes the length of said second adjustable-length cable when said oximeter finger sensor and oximeter machine are interconnected to one another.