1. In a device that implements a video decoder, the device including a processor and memory, a method for use in decoding video data within a sequence of video frames, the method comprising:
with the device that implements the video decoder, decoding portions of a predictive (P) frame by motion compensation relative to a reference frame using encoded motion vector information associated with the respective portions of the P frame; and
with the device that implements the video decoder, decoding first and second direct mode portions of a bidirectionally predictive (B) frame without using motion vector information encoded in a bit stream for the first and second direct mode portions but according to mode identifying data in the bit stream, wherein the mode identifying data indicates whether motion vector information for each of the respective first and second direct mode portions of the B frame is directly derived (a) using the motion vector information associated with the respective portions of the P frame or (b) according to spatial motion vector prediction with motion vector information for other portions in the B frame, including:
for any of the first and second direct mode portions of the B frame for which motion vector information is directly derived using the motion vector information associated with the respective portions of the P frame, defining the direct mode portion to include video data predictively correlated to the reference frame based on the motion vector information derived using the motion vector information associated with one of the respective portions of the P frame; and
for any of the first and second direct mode portions of the B frame for which motion vector information is directly derived according to spatial motion vector prediction, defining the direct mode portion to include video data predictively correlated to the reference frame based on the motion vector information determined according to spatial motion vector prediction.
2. The method of claim 1, further comprising:
with the device that implements the video decoder, during the decoding the first and second direct mode portions of the B frame, determining to switch between motion projection and spatial motion vector prediction, wherein the motion projection uses the motion vector information associated with respective portions of the P frame.
3. The method of claim 2, wherein the determining is based upon the mode identifying data as signaled in a bit stream.
4. The method of claim 1, wherein the first and second direct mode portions are macroblocks.
5. In a device that implements a video decoder, the device including a processor and memory, a method comprising:
receiving, at the device that implements the video decoder, encoded video in a bit stream; and
with the device that implements the video decoder, decoding video for a sequence, including:
decoding a first video frame in the sequence, wherein at least some of the first video frame uses motion compensation relative to a reference frame;
decoding a second video frame in the sequence, wherein at least some of the second video frame uses bi-directionally predictive motion compensation, including:
determining whether one or more direct mode macroblocks of the second video frame use (a) motion vectors based upon motion vector information associated with macroblocks of the first video frame or (b) motion vectors determined according to spatial motion vector prediction with motion vector information of other macroblocks in the second video frame;
for the one or more direct mode macroblocks of the second video frame, using spatial motion vector prediction to determine the motion vectors from the motion vector information of other macroblocks in the second video frame; and
decoding the one or more direct mode macroblocks of the second video frame using the motion vectors determined by spatial motion vector prediction.
6. The method of claim 5 wherein the first video frame is a P frame and the second video frame is a B frame.
7. The method of claim 5 wherein, for the determining, mode identifying data in the bit stream indicates whether to use motion projection or spatial motion vector prediction for the one or more direct mode macroblocks, wherein the motion projection uses the motion vector information associated with collocated macroblocks of the first video frame.
8. A device that implements a video decoder, the device comprising:
a processor;
memory; and
storage storing computer-executable instructions for causing the video decoder to perform a method comprising:
decoding portions of a predictive (P) frame by motion compensation relative to a reference frame using encoded motion vector information associated with the respective portions of the P frame; and
decoding first and second direct mode portions of a bidirectionally predictive (B) frame without using motion vector information encoded in a bit stream for the first and second direct mode portions but according to mode identifying data in the bit stream, wherein the mode identifying data indicates whether motion vector information for each of the respective first and second direct mode portions of the B frame is directly derived (a) using the motion vector information associated with the respective portions of the P frame or (b) according to spatial motion vector prediction with motion vector information for other portions in the B frame, including:
for any of the first and second direct mode portions of the B frame for which motion vector information is directly derived using the motion vector information associated with the respective portions of the P frame, defining the direct mode portion to include video data predictively correlated to the reference frame based on the motion vector information derived using the motion vector information associated with one of the respective portions of the P frame; and
for any of the first and second direct mode portions of the B frame for which motion vector information is directly derived according to spatial motion vector prediction, defining the direct mode portion to include video data predictively correlated to the reference frame based on the motion vector information determined according to spatial motion vector prediction.
9. The device of claim 8, wherein the method further comprises:
during the decoding the first and second direct mode portions of the B frame, determining to switch between motion projection and spatial motion vector prediction, wherein the motion projection uses the motion vector information associated with respective portions of the P frame.
10. The device of claim 9, wherein the determining is based upon the mode identifying data as signaled in a bit stream.
11. The device of claim 8, wherein the first and second direct mode portions are macroblocks.
12. The device of claim 8, wherein the video decoder comprises an inverse quantizer, an inverse frequency transformer, a loop filter, a motion compensator, a frame buffer, a motion vector buffer, and a mode selector.
13. The device of claim 12, wherein the mode selector is adapted to select the reference frame from among multiple reference frames.
14. The device of claim 12, wherein the mode selector includes:
a block mode module adapted to receive decoded macroblock mode information and provide a controlling input for selection of the motion vector information; and
a selection module adapted to provide the motion vector information as controlled by the controlling input from the block mode module.
15. The device of claim 14, wherein the selection module is adapted to provide the motion vector information, as controlled by the controlling input from the block mode module, by selectably using decoded motion vector information from the bit stream.
16. The device of claim 14, wherein the selection module is adapted to provide the motion vector information, as controlled by the controlling input from the block mode module, by selectably using buffered motion vector information from the motion vector buffer.
17. The device of claim 8, further comprising a display device and a speaker.
18. The method of claim 1, wherein the device further comprises a display device and a speaker, and wherein the video decoder comprises an inverse quantizer, an inverse frequency transformer, a loop filter, a motion compensator, a frame buffer, a motion vector buffer, and a mode selector, the method further comprising, with the mode selector, selecting the reference frame from among multiple reference frames.
19. The method of claim 5, wherein the device further comprises a display device and a speaker, and wherein the video decoder comprises an inverse quantizer, an inverse frequency transformer, a loop filter, a motion compensator, a frame buffer, a motion vector buffer, and a mode selector.
20. The method of claim 19, further comprising, with the mode selector, selecting the reference frame from among multiple reference frames.
21. One or more computer-readable media storing computer-readable instructions for causing a computer device programmed thereby to perform a method of decoding video data, the one or more computer-readable media including one or more or volatile memory, non-volatile memory, magnetic storage media and optical storage media, the method comprising:
receiving encoded video in a bit stream; and
decoding video for sequence, including:
decoding a first video frame in the sequence, wherein at least some of the first video frame uses motion compensation relative to a reference frame;
decoding a second video frame in the sequence, wherein at least some of the second video frame uses bi-directionally predictive motion compensation, including:
determining whether one or more direct mode macroblocks of the second video fram use (a) motion vectors based upon vector information associated with macroblocks of the first video frame or (b) motion vectors determined according to spatial motion vector prediction with motion vector information of other macroblocks in the second video frame;
for the one or more direct mode macroblocks of the second video frame, using spatial motion vector prediction to determine the motion vectors from the motion vector information of other macroblocks in the second video frame; and
decoding the one or more direct mode macroblocks of the second video frame using the motion vectors determined by spatial motion vector prediction.
22. The one or more computer-readable media of claim 21 wherein the first video frame is a P frame and the second video frame is a B frame.
23. The one or more computer-readable media of claim 21 wherein, for the determining, mode identifying data in the bit stream indicates whether to use motion projection or spatial motion vector prediction for the one or more direct mode macroblocks, wherein the motion projection uses the motion vector information associated with collocated macroblocks of the first video frame.
24. A video encoder implemented with a computing device, wherein the video encoder is adapted to perform a method comprising:
encoding video for a sequence, including:
encoding a first video frame in the sequence, wherein at least some of the first video frame uses motion compensation relative to a reference frame;
encoding a second video frame in the sequence, wherein at least some of the second video frame uses bi-directionally predictive motion compensation, including:
based at least in part on rate-distortion optimization, determining whether one or more direct mode macroblocks of the second video frame use (a) motion vectors based upon motion information associated with macroblocks of the first video frame or (b) motion vectors determined according to spatial motion vector prediction with motion information of other macroblocks in the second video frame;
for the one or more direct mode macroblocks of the second video frame, using spatial motion vector prediction to determine the motion vectors from the motion information of other macroblocks in the second video frame; and
encoding the one or more direct mode macroblocks of the second video frame using the motion vectors determined using spatial motion vector prediction; and
outputting the encoded video in a bit stream.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. An apparatus, comprising:
a first capacitor component;
a second capacitor component; and
a switch component;
wherein the first capacitor component, the second capacitor component, and the switch component cooperate to maintain an input voltage to a target circuit at or above a cut-off voltage of the target circuit until a power circuit is able to maintain the input voltage of the target circuit at or above the cut-off voltage of the target circuit;
wherein the switch component serves to control a flow of current from the first capacitor component to the second capacitor component.
2. The apparatus of claim 1, further comprising:
a current-restriction component that is electrically coupled with and located between the input voltage and the first capacitor component; and
an activator component that is electrically coupled with and located between the first capacitor component and the switch component;
wherein the current-restriction component serves to provide a flow of current to the first capacitor component, wherein the flow of current from the current-restriction component serves to charge the first capacitor component to an activation voltage level of the activator component.
3. The apparatus of claim 2 in combination with the power circuit, wherein the first capacitor component requires a duration of time from a time when the first capacitor component charges to a voltage level at or above the activation voltage level of the activator component to a time when the first capacitor component discharges to a voltage level below the activation voltage level of the activator component;
wherein the second capacitor component requires a duration of time from a time when the second capacitor component charges to a voltage level at or above the cut-off voltage of the target circuit to a time when the second capacitor component discharges to a voltage level below the cut-off voltage of the target circuit;
wherein the first capacitor component and the second capacitor component serve to supply power to the power circuit for a duration of time based on the duration of time required by the first capacitor component and the duration of time required by the second capacitor component.
4. The apparatus of claim 3, wherein the power circuit requires a duration of time from a time when the target circuit asserts a drive signal to the power circuit to a time when the power circuit, in absence of a fault condition, charges the input voltage to a voltage level at or above the cut-off voltage of the target circuit,
wherein the duration of time of the power circuit is based on the duration of time required by the first capacitor component and the duration of time required by the second capacitor component;
wherein the duration of time required by the first capacitor component and the duration of time required by the second capacitor component lasts as long as or lasts longer than the duration of time of the power circuit.
5. The apparatus of claim 4, wherein upon an occurrence of a fault condition where the power circuit fails to maintain the input voltage to the target circuit at or above the cut-off voltage of the target circuit, the first capacitor component, the second capacitor component, and the switch component cooperate to power the target circuit for the duration of time of the power circuit.
6. The apparatus of claim 2, wherein the activator component comprises a first activator component, the apparatus further comprising:
a second activator component that is electrically coupled with and located between the switch component and the target circuit;
wherein an activation of the target circuit serves to activate the second activator component.
7. The apparatus of claim 6, wherein the switch component is electrically coupled with and located between the first capacitor component and the second capacitor component, wherein the second capacitor component is electrically coupled with and located between the switch component and the target circuit, wherein the first activator component and the second activator component serve to control the switch component, wherein the switch component allows a flow of current from the first capacitor component to the second capacitor component.
8. The apparatus of claim 7, wherein upon the charging of the first capacitor component to the activation voltage level of the first activator component the switch component allows a first flow of current from the first capacitor component to the second capacitor component;
wherein the first flow of current serves to charge the second capacitor component to a voltage level at or above the cut-off voltage of the target circuit and to cause activation of the target circuit;
wherein upon the activation of the target circuit the second activator component activates and the switch component allows a second flow of current from the first capacitor component to the second capacitor component, wherein the second flow of current from the first capacitor component to the second capacitor component serves to maintain the voltage level of the second capacitor component at or above the cut-off voltage of the target circuit.
9. The apparatus of claim 7, wherein the first capacitor component requires a duration of time from a time when the first capacitor component, after charging to a voltage level at or above the activation voltage of the first activator component, discharges to a voltage level below the activation voltage of the first activator component to a time when the first capacitor component charges to a voltage level at or above the activation voltage of the first activator component;
wherein the second capacitor component requires a duration of time from a time when the second capacitor component, after charging to a voltage level at or above the cut-off voltage of the target circuit, discharges to a voltage level below the cut-off voltage of the target circuit to a time when the second capacitor component charges to a voltage level at or above the cut-off voltage of the target circuit;
wherein the duration of time required by the first capacitor component is based on the flow of current from the current-restriction component to the first capacitor component;
wherein the duration of time required by the second capacitor component is based on the flow of current from the first capacitor component through the switch component to the second capacitor component;
wherein the first capacitor component, the second capacitor component, and the switch component cooperate to promote an avoidance of a dissipation of power in the power circuit during the duration of time required by the first capacitor component and the duration of time required by the second capacitor component.
10. The apparatus of claim 9, wherein the power circuit requires a duration of time from a time when the target circuit asserts a drive signal to the power circuit to a time when the power circuit, in absence of a fault condition, charges the input voltage to a voltage level at or above the cut-off voltage of the target circuit, wherein upon a failure of the power circuit to charge the input voltage to the target circuit at or above the cut-off voltage of the target circuit before completion of the duration of time required by the power circuit the first capacitor component, the second capacitor component, and the switch component cooperate to cause the halting of the supply of power to the target circuit;
wherein the first capacitor component, the second capacitor component, and the switch component cooperate to recharge the first capacitor component and the second capacitor component;
wherein upon a charging of the second capacitor component to a voltage level at or above the cut-off voltage of the target circuit the first capacitor component, the second capacitor component, and the switch component cooperate to provide power to the target circuit for the duration of time required by the power circuit.
11. The apparatus of claim 6, wherein upon a failure of the power circuit to maintain the input voltage to the target circuit at or above the cut-off voltage of the target circuit the second capacitor component discharges to a voltage level below the cut-off voltage of the target circuit and the first capacitor component, the second capacitor component, and the switch component cooperate to cause a halting of the supply of power to the target circuit;
wherein upon the halting of the supply of power to the target circuit through cooperation of the first capacitor component, the second capacitor component, and the switch component the first capacitor component, the second capacitor component, and the switch component cooperate to charge the first capacitor component and the second capacitor component.
12. The apparatus of claim 11, wherein the first capacitor component, the second capacitor component, and the switch component cooperate to promote an avoidance of a dissipation of power in the power circuit during the duration of time required by the first capacitor component and the duration of time required by the second capacitor component.
13. A method, comprising the step of:
maintaining an input voltage to a target circuit at or above a cut-off voltage of the target circuit, through cooperation of a first capacitor component, a second capacitor component, and a switch component, until a power circuit is able to maintain the input voltage of the target circuit at or above the cut-off voltage of the target circuit;
wherein the switch component serves to control a flow of current from the first capacitor component to the second capacitor component.
14. The method of claim 13, further comprising the steps of:
employing a current-restriction component to provide a flow of current to the first capacitor component; and
employing the flow of current from the current-restriction component to charge the first capacitor component to an activation voltage level of an activator component;
wherein the current-restriction component is electrically coupled with and located between the input voltage and the first capacitor component;
wherein the activator component is electrically coupled with and located between the first capacitor component and the switch component.
15. The method of claim 14, wherein the first capacitor component requires a duration of time from a time when the first capacitor component charges to a voltage level at or above the activation voltage level of the activator component to a time when the first capacitor component discharges to a voltage level below the activation voltage level of the activator component;
wherein the second capacitor component requires a duration of time from a time when the second capacitor component charges to a voltage level at or above the cut-off voltage of the target circuit to a time when the second capacitor component discharges to a voltage level below the cut-off voltage of the target circuit, the method further comprising the step of:
supplying power from the first capacitor component and the second capacitor component to the power circuit for a duration of time based on the duration of time required by the first capacitor component and the duration of time required by the second capacitor component.
16. The method of claim 15, wherein the power circuit requires a duration of time from a time when the target circuit asserts a drive signal to the power circuit to a time when the power circuit, in absence of a fault condition, charges the input voltage to a voltage level at or above the cut-off voltage of the target circuit,
wherein the duration of time of the power circuit is based on the duration of time required by the first capacitor component and the duration of time required by the second capacitor component;
wherein the duration of time required by the first capacitor component and the duration of time required by the second capacitor component lasts as long as or lasts longer than the duration of time of the power circuit, the method further comprising the step of:
powering the target circuit for the duration of time of the power circuit through employment of cooperation among the first capacitor component, the second capacitor component, and the switch component upon an occurrence of a fault condition where the power circuit fails to maintain the input voltage to the target circuit at or above the cut-off voltage of the target circuit.
17. The method of claim 15, wherein the activator component comprises a first activator component, the method further comprising the step of:
activating a second activator component through an activation of the target circuit, wherein the second activator component is electrically coupled with and located between the switch component and the target circuit.
18. The method of claim 17, wherein the switch component is electrically coupled with and located between the first capacitor component and the second capacitor component, wherein the second capacitor component is electrically coupled with and located between the switch component and the target circuit, wherein the first activator component and the second activator component serve to control the switch component, the method further comprising the step of:
employing the switch component to allow a flow of current from the first capacitor component to the second capacitor component.
19. The method of claim 17, wherein upon a failure of the power circuit to maintain the input voltage to the target circuit at or above the cut-off voltage of the target circuit the second capacitor component discharges to a voltage level below the cut-off voltage of the target circuit and the first capacitor component, the second capacitor component, and the switch component cooperate to cause a halting of the supply of power to the target circuit, the method further comprising the step of:
charging the first capacitor component and the second capacitor component through cooperation of the first capacitor component, the second capacitor component, and the switch component upon the halting of the supply of power to the target circuit.
20. The method of claim 19, further comprising the step of:
promoting an avoidance of a dissipation of power in the power circuit during the duration of time required by the first capacitor component and the duration of time required by the second capacitor component through cooperation of the first capacitor component, the second capacitor component, and the switch component.