1. A process to identify a compound that is useful to treat or prevent ischemic or hypoxic injury in a mammal comprising (i) assessing the potency boost of the compound at physiological pH versus disorder-induced low pH in a cell by repeating the potency boost experiment at least 5 times such that the 95% confidence interval does not change more than 15% with the addition of a new experiment; (ii) testing the compound in an animal model of transient focal ischemia and measuring the effect of the compound on the infarct volume by repeating the experiment at least 12 times such that the 95% confidence interval does not change more than 5% with the addition of a new experiment; (iii) selecting a compound that has a potency boost of at least 5 according to step (i) and at least a 30% decrease in infarct volume according to step (ii).
2. A process to select a compound to treat or prevent a disorder that lowers the pH wherein the compound (i) exhibits a potency boost of at least 5 as determined in experiments in which the potency boost of the compound is assessed at physiological pH versus disorder-induced low pH in a cell by repeating the potency boost experiments at least 5 times such that the 95% confidence interval does not change more than 15% with the addition of a new experiment and (ii) exhibits at least a 30% decrease in infarct volume as measured in an animal model of focal ischemia as determined by repeating the experiment at least 12 times such that the 95% confidence interval does not change more than 5% with the addition of a new experiment.
3. The process of claim 1 wherein the mammal is a human.
4. The process of claim 1 or 2, wherein the cell expresses a glutamate receptor.
5. The process of claim 4, wherein the glutamate receptor is an NMDA receptor.
6. The process of claim 5, wherein the NMDA receptor comprises an NR1 subunit and at least one NR2 subunit selected from the group consisting of NR2A, NR2B, NR2C, and NR2D or any combination thereof.
7. The process of claim 5, wherein the NMDA receptor comprises an NR1 subunit and an an NR2 or NR3 subunit selected from the group consisting of NR2A, NR2B, NR2C, NR2D, NR3A, and NR3B or any combination thereof.
8. The process of claim 4, wherein the glutamate receptor comprises glutamate receptor subunits selected from the group consisting of GluR1, GluR2, GluR3, GluR4, GluR5, GluR6, GluR7, KA1, KA2, delta-1 and delta-2.
9. The compound of claim 1 or 2 wherein the compound is:
as well as pharmaceutically acceptable salts, esters, enantiomers, enantiomeric mixtures, and mixtures thereof.
10. The compound of claim 9 wherein the compound is
as well as pharmaceutically acceptable salts thereof.
11. The process of claim 2, wherein the disorder is ischemic or hypoxic injury
12. The process of claim 2, wherein the disorder is neuropathic pain or related disorder.
13. The process of claim 2, wherein the disorder is a brain tumor.
14. The process of claim 2, wherein the disorder is epilepsy.
15. The process of claim 2, wherein the disorder is a neurodegenerative disease.
16. The process of claim 11, wherein the ischemic or hypoxic injury is selected from the group consisting of: stroke, vasospasm after subarachnoid hemorrhage, traumatic brain injury, cognitive deficit after bypass surgery, cognitive deficit after carotid angioplasty; and ischemia following hypothermic circulatory arrest.
17. The process of claim 12, wherein the neuropathic pain or related disorder is selected from the group consisting of: peripheral diabetic neuropathy, postherpetic neuralgia, complex regional pain syndromes, peripheral neuropathies, cancer neuropathic pain, chemotherapy-induced neuropathic pain, neuropathic low back pain, HIV neuropathic pain, trigeminal neuralgia, and central post-stroke pain.
18. The process of claim 15, wherein the neurodegenerative disease is selected from the group consisting of: Parkinson’s disease, Alzheimer’s disease, Huntington’s disease and Amyotrophic Lateral Sclerosis.
19. The process of claim 16, wherein the ischemic or hypoxic injury is stroke.
20. The process of claim 16, wherein the ischemic or hypoxic injury is vasospasm after subarachnoid hemorrhage.
21. The process of claim 1 or 2, wherein the compound does not cause cognitive impairment.
22. The process of claim 21, wherein the cognitive impairment is psychotic-like symptoms.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of generating a bit stream pulse modulated signal at a controlled bit rate, said method including the steps of:
converting light into an electrical signal having a varying signal voltage dependent on the intensity of said light, the converting being effected by light sensitive capacitive element coupled to a supply rail through a transistor;
generating pulses from said varying signal voltage, said pulses being dependent on a charge stored by the light sensitive capacitive element;
frequency modulating said pulses to generate a pulse frequency modulated signal, the frequency modulating being effected by a feedback signal supplied to a control input of the transistor, wherein the feedback signal is dependent on said pulses; and
sampling said pulse frequency modulated signal to generate said bit stream pulse modulated signal at said controlled bit rate.
2. A method as claimed in claim 1, wherein said step of generating pulses is effected by comparing said varying signal voltage with a reference voltage, said pulses having edges resulting from said signal voltage crossing said reference voltage.
3. A method as claimed in claim 1, wherein the step of sampling includes providing a sampling frequency and providing the bit stream pulse modulated signal at said bit rate that is at least twice the sampling frequency.
4. A method as claimed in claim 1, further including a step of stochastic processing of said bit stream pulse modulated signal.
5. A method as claimed in claim 4, wherein the step of stochastic processing includes generating binary values from said bit stream pulse modulated signal.
6. A method as claimed in claim 5, wherein, the step of stochastic processing includes generating binary values from said bit stream pulse modulated signal, wherein each of said binary values corresponds to said bit stream pulse modulated signal provided over an integer multiple of said sampling rate.
7. A method as claimed in claim 6, wherein, the step of stochastic processing is effected by binary logic.
8. A method as claimed in claim 1, wherein the method is effected by an image sensor.
9. An image sensor array for providing a bit stream pulse modulated signal at a controlled bit rate, the image sensor circuit comprising:
a two-dimensional array of pixel signal pulse frequency modulators each having:
a transistor coupled to supply rail;
a light sensitive capacitive element coupled to the supply rail through the transistor, the light sensitive capacitive element having a signal output providing for converting incident light into a varying signal voltage that is dependent on light intensity detected by the light sensitive capacitive element,
a comparator having a constant reference voltage input and a signal input coupled to the signal output;
a feedback loop coupling an output of the comparator to a control input of the transistor to pulse frequency modulate said varying signal voltage thereby providing a pulse frequency modulated signal; and
a sampling unit which samples said pulse frequency modulated signal to generate said bit stream pulse modulated signal at said controlled bit rate.
10. An image sensor array as claimed in claim 9, wherein said light sensitive capacitive element is a photodiode.
11. An image sensor array as claimed in claim 9, wherein said sampling unit comprises a signal generator outputting a signal at said controlled bit rate to a shift register.
12. An image sensor array as claimed in claim 9, wherein said bit stream pulse modulated signal at a controlled bit rate is input to an arithmetic unit for performing stochastic processing on said bit stream pulse modulated signal.
13. An image sensor array as claimed in claim 12, wherein said arithmetic unit comprises binary logic circuits for performing said stochastic processing.