1. A method comprising:
storing one or more static or near-static graphics resources in a non-volatile random access memory (NVRAM), the NVRAM being directly accessible by a graphics processor using at least memory store and load commands;
a graphics processor executing a graphics application, wherein the graphics processor at least sends a request using a memory load command for an address corresponding to at least one of the one or more static or near-static graphics resources stored in the NVRAM;
in response to the memory load command, directly loading the requested graphics resource from the NVRAM into a cache for the graphics processor.
2. The method of claim 1, further comprising:
storing a graphics processor memory management unit address map in a volatile memory location accessible to a graphics memory manager logic component;
the graphics memory manager logic component managing a logical address to physical address map for each of a plurality of graphics resources related to the graphics application, wherein the one or more static or near-static graphics resources are part of the plurality of graphics resources related to the graphics application; and
the graphics memory manager logic component including a staticnear-static tag for each of the plurality of graphics resources in the graphics processor memory management unit address map, the staticnear-static tag indicating the resource will not be dynamically changing in a frequent manner.
3. The method of claim 2, further comprising:
a central processing unit sending the graphics memory manager logic component an update to the staticnear-static tag for at least a first graphics resource of the plurality of graphics resources; and
in response to receiving the update to the staticnear-static tag for at least the first graphics resource, the graphics memory manager logic component initiating a physical movement of the graphics resource between the NVRAM and the volatile memory.
4. The method of claim 2, further comprising:
storing translation lookaside buffer entries in the graphics processor memory management unit address map.
5. The method of claim 1, wherein the NVRAM comprises Phase Change Memory and Switch (PCMS).
6. A method comprising:
executing a graphics application on a graphics processor, wherein during execution there are one or more dynamic state records, utilized by the graphics application, stored in a volatile memory and at least one or more static or near-static graphics resources, utilized by the graphics application, stored in a non-volatile random access memory (NVRAM), the NVRAM being directly accessible by a graphics processor using at least memory store and load commands;
receiving a notification to suspend the graphics processor, the NVRAM, and the volatile memory;
in response to the notification to suspend, performing a first memory copy of the one or more dynamic state records from the volatile memory to the NVRAM;
after the one or more dynamic state records have been copied into the NVRAM, suspending the graphics processor, the NVRAM, and the volatile memory into a lower power state;
receiving a notification to resume the graphics processor, the NVRAM, and the volatile memory;
in response to the notification to resume, resuming the graphics processor, the NVRAM, and the volatile memory into an operational state;
performing a second memory copy of the one or more dynamic state records from the NVRAM back into the volatile memory; and
resuming execution of the graphics application.
7. The method of claim 6, wherein suspending to a lower power state further comprises suspending to a non-powered state.
8. The method of claim 6, further comprising:
building the one or more dynamic state records during an initial startup of execution of the graphics application; and
thereafter not rebuilding the one or more dynamic state records during any subsequent resumption of execution of the graphics application after a suspension of the graphics processor, the NVRAM, and the volatile memory.
9. The method of claim 6, wherein the NVRAM comprises Phase Change Memory and Switch (PCMS).
10. A method, comprising:
storing display image data in at least one frame buffer in a non-volatile random access memory (NVRAM), the NVRAM being directly accessible by a graphics processor using at least memory store and load commands,
a display controller performing a memory load on the frame buffer to receive the display image data, wherein storing the display image data in the NVRAM occurs at least as frequently as a refresh rate of the display screen; and
the display controller displaying the received display image data on a display screen.
11. The method of claim 10, wherein the NVRAM comprises Phase Change Memory and Switch (PCMS).
12. A device comprising:
a graphics processor memory augmentation logic to store one or more static or near-static graphics resources in a non-volatile random access memory (NVRAM), the NVRAM being directly accessible by a graphics processor using at least memory store and load commands;
a graphics processor to execute a graphics application, wherein the graphics processor at least sends a request using a memory load command for an address corresponding to at least one of the one or more static or near-static graphics resources stored in the NVRAM;
a graphics memory controller in response to the memory load command, to directly load the requested graphics resource from the NVRAM into a cache for the graphics processor.
13. The device of claim 12, further comprising:
a graphics processor memory augmentation logic to store a graphics processor memory management unit address map in a volatile memory location accessible to a graphics memory manager logic component;
the graphics memory manager logic component to manage a logical address to physical address map for each of a plurality of graphics resources related to the graphics application, wherein the one or more static or near-static graphics resources are part of the plurality of graphics resources related to the graphics application; and
and the graphics memory manager logic component to include a staticnear-static tag for each of the plurality of graphics resources in the graphics processor memory management unit address map, the staticnear-static tag to indicate the resource will not dynamically change in a frequent manner.
14. The device of claim 13, further comprising:
the graphics memory manager logic component to receive, from a central processing unit, an update to the staticnear-static tag for at least a first graphics resource of the plurality of graphics resources; and
in response to receiving the update to the staticnear-static tag for at least the first graphics resource, the graphics memory manager logic component to initiate a physical movement of the graphics resource between the NVRAM and the volatile memory.
15. The device of claim 13, further comprising:
the graphics memory manager logic component to store translation lookaside buffer entries in the graphics processor memory management unit address map.
16. The method of claim 12, wherein the NVRAM comprises Phase Change Memory and Switch (PCMS).
17. A device comprising:
a graphics processor to execute a graphics application, wherein during execution there are one or more dynamic state records, utilized by the graphics application, stored in a volatile memory and at least one or more static or near-static graphics resources, utilized by the graphics application, stored in a non-volatile random access memory (NVRAM), the NVRAM being directly accessible by a graphics processor using at least memory store and load commands;
a graphics processor memory augmentation logic to
receive a notification to suspend the graphics processor, the NVRAM, and the volatile memory;
in response to the notification to suspend, perform a first memory copy of the one or more dynamic state records from the volatile memory to the NVRAM;
after the one or more dynamic state records have been copied into the NVRAM, suspend the graphics processor, the NVRAM, and the volatile memory into a low power state;
receive a notification to resume the graphics processor, the NVRAM, and the volatile memory;
in response to the notification to resume, resume the graphics processor, the NVRAM, and the volatile memory into an operational state;
direct the graphics memory controller to perform a second memory copy of the one or more dynamic state records from the NVRAM back into the volatile memory; and
the graphics processor to resume execution of the graphics application.
18. The device of claim 17, wherein to suspend to a low power state further comprises to suspend to a non-powered state.
19. The device of claim 17, further comprising:
the graphics processor to build the one or more dynamic state records during an initial startup of execution of the graphics application; and
thereafter the graphics processor to not rebuild the one or more dynamic state records during any subsequent resumption of execution of the graphics application after a suspension of the graphics processor, the NVRAM, and the volatile memory.
20. The device of claim 17, wherein the NVRAM comprises Phase Change Memory and Switch (PCMS).
21. A system, comprising:
a graphics processor memory augmentation logic to store display image data in at least one frame buffer in a non-volatile random access memory (NVRAM), the NVRAM being directly accessible by a graphics processor using at least memory store and load commands,
a display controller to perform a memory load on the frame buffer to receive the display image data, wherein storing the display image data in the NVRAM occurs at least as frequently as a refresh rate of the display screen; and
the display controller to display the received display image data on a display screen.
22. The system of claim 21, wherein the NVRAM comprises Phase Change Memory and Switch (PCMS).
23. The system of claim 21, wherein the display controller includes a local display NVRAM to store one or more frame buffers locally within the display controller.
24. The system of claim 23, wherein during a current system boot, when the display controller is first capable of sending an image to the display screen, the display controller to display an image that was last stored within the local display NVRAM during an operational period of time prior to the current system boot.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method comprising:
generating a first plurality of meshes configured to map a first domain associated with a display surface to a second domain associated with an image capture device configured to capture a first image of the display surface;
generating a second plurality of meshes configured to map the second domain to a third domain associated with a first projector configured to display a second image onto the display surface; and
generating a third plurality of meshes using the first plurality of meshes and the second plurality of meshes, the third plurality of meshes configured to separately map a plurality of color bands between the first domain and the third domain.
2. The method of claim 1, and further comprising:
applying the third plurality of meshes to render a first image frame; and
projecting the first image frame with the first projector.
3. The method of claim 1, and further comprising:
providing a plurality of fiducial marks on the display surface;
locating the plurality of fiducial marks in the first image;
generating a set of point correspondences between the plurality of fiducial marks in the first image and the plurality of fiducial marks on the display surface; and
determining the first plurality of meshes from the set of point correspondences.
4. The method of claim 1, and further comprising:
capturing at least one image of at least one known color pattern projected on the display surface;
generating a set of point correspondences between the at least one known color pattern and the at least one known color pattern in the at least one captured image; and
determining at least one of the second plurality of meshes from the set of point correspondences.
5. The method of claim 4, wherein the at least one known color pattern comprises at least one of a red-and-black pattern, a green-and-black pattern, and a blue-and-black pattern.
6. The method of claim 1, wherein the plurality of color bands includes a red color band, a green color band, and a blue color band.
7. The method of claim 1, wherein the third plurality of meshes is configured to correct chromatic aberrations.
8. The method of claim 1, and further comprising:
generating at least one of the first plurality of meshes, the second plurality of meshes, and the third plurality of meshes using Delaunay triangulation.
9. The method of claim 1, and further comprising:
generating a fourth plurality of meshes configured to map the second domain to a fourth domain associated with a second projector configured to display a third image onto the display surface simultaneously with the display of the second image by the first projector; and
generating a fifth plurality of meshes using the first plurality of meshes and the fourth plurality of meshes, the fifth plurality of meshes configured to separately map a plurality of color bands between the first domain and the fourth domain.
10. A system comprising:
a frame generator configured to render a first image frame using a first plurality of meshes to generate a second image frame;
a first projector configured to store the second image frame in a first frame buffer and project the second image frame onto a display surface to display a first image; and
wherein the first plurality of meshes defines a first plurality of color-dependent mappings between the display surface and the first frame buffer.
11. The system of claim 10, wherein each mesh in the first plurality of meshes corresponds to a different color band in a plurality of color bands.
12. The system of claim 11, wherein the plurality of color bands include a red color band, a green color band, and a blue color band.
13. The system of claim 10, wherein the first plurality of meshes is configured to correct chromatic aberrations.
14. The system of claim 10, wherein the frame generator is configured to produce the second image frame by interpolating a first plurality of pixel values using the first plurality of meshes.
15. The system of claim 10, wherein the frame generator is configured to warp the first image frame using the first plurality of meshes to generate the second image frame.
16. The system of claim 10, wherein the frame generator is configured to render a third image frame using a second plurality of meshes to generate a fourth image frame, and wherein the system further comprises:
a second projector configured to store the fourth image frame in a second frame buffer and project the fourth image frame onto the display surface to display a second image such that the second image at least partially overlaps with the first image on the display surface; and
wherein the second plurality of meshes defines a second plurality of color-dependent mappings between the display surface and the second frame buffer.
17. The system of claim 10, wherein the display surface is a non-planar developable surface.
18. A computer-readable storage medium storing computer-executable instructions for performing a method comprising:
generating a first plurality of meshes based at least in part on a first image of a display surface;
generating a second plurality of color-dependent meshes from a first plurality of known color patterns and a first set of images that includes the first plurality of known color patterns, the first set of images captured from the display of the first plurality of color patterns on the display surface by a first projector; and
generating a third plurality of color-dependent meshes using the first plurality of meshes and the second plurality of color-dependent meshes, wherein the third plurality of color-dependent meshes defines a first plurality of color-dependent mappings between the display surface and the first projector.
19. The computer-readable medium of claim 18, wherein the first plurality of color-dependent mappings include a first mapping for a red color channel of the first projector, a second mapping for a green color channel of the first projector, and a third mapping for a blue color channel of the first projector.
20. The computer-readable medium of claim 18, wherein the method further comprises:
generating a fourth plurality of color-dependent meshes from the first plurality of known color patterns and a second set of images that includes the first plurality of known color patterns, the second set of images captured from the display of the first plurality of color patterns on the display surface by a second projector; and
generating a fifth plurality of color-dependent meshes using the first plurality of meshes and the fourth plurality of color-dependent meshes, wherein the fifth plurality of color-dependent meshes defines a second plurality of color-dependent mappings between the display surface and the second projector.