1. A wedge bar locking mechanism comprising a locking pin, a wedge bar and a bracket,
said locking pin comprising a reduced diameter portion and a threaded portion, said threaded portion having a continuous helical groove disposed circumferentially about and extending longitudinally of said threaded portion,
said wedge bar comprising first and second longitudinally extending portions at a proximal end thereof, said first and second longitudinally extending portions defining a locking pin receiving space therebetween, at least one of said first and second longitudinally extending portions having at least one tooth extending into said pin receiving space, said tooth being dimensioned to extend into and be accommodated within said helical groove when said threaded portion is received in said pin receiving space,
said bracket defining a longitudinally extending slot adapted to accommodate said wedge bar therein, and a longitudinally extending cylindrical portion defining a longitudinal cylindrical pathway adapted to accommodate said locking pin therein,
wherein said slot is effective to prevent said wedge bar from rotating as a result of torque supplied to said locking pin when said locking pin and said wedge bar are received, respectively, in said longitudinal cylindrical pathway and said slot.
2. A wedge bar locking mechanism according to claim 1, said bracket further comprising at least one retaining tab extending radially inward of said cylindrical portion into said longitudinal cylindrical pathway of said bracket, said retaining tab being received and accommodated within said reduced diameter portion of said locking pin when said locking pin is received in said longitudinal cylindrical pathway of said bracket.
3. A wedge bar locking mechanism according to claim 2, said retaining tab being formed by punching through a wall of said cylindrical portion such that a punched portion of said wall extends radially inward of the cylindrical portion, still attached to the wall, to provide said retaining tab.
4. A wedge bar locking mechanism according to claim 2, said retaining tab being integral with said bracket.
5. A wedge bar locking mechanism according to claim 2, comprising a plurality of said retaining tabs, each of said plurality of retaining tabs being received and accommodated within said reduced diameter portion of said locking pin when said locking pin is received in said longitudinal cylindrical pathway of said bracket.
6. A wedge bar locking mechanism according to claim 3, comprising a plurality of said retaining tabs formed by punching through said wall of said cylindrical portion, each of said plurality of retaining tabs being received and accommodated within said reduced diameter portion of said locking pin when said locking pin is received in said longitudinal cylindrical pathway of said bracket.
7. A wedge bar locking mechanism according to claim 1, at least one of said first and second longitudinally extending portions having a plurality of said teeth disposed at spaced intervals thereof and extending into said pin receiving space, the spacing of said teeth corresponding to a pitch of said helical groove of said threaded portion of said locking pin.
8. A wedge bar locking mechanism according to claim 1, said threaded portion being in the form of an Acme threaded rod.
9. A wedge bar locking mechanism according to claim 1, said locking pin further comprising means for engagement by a tool or by hand so that the locking pin can be turned to lock or unlock a casket equipped with said locking mechanism.
10. A wedge bar locking mechanism according to claim 9, said engagement means comprising an Allen key receptacle, adapted to receive an Allen key therein.
11. A wedge bar locking mechanism according to claim 9, said engagement means comprising a key receptacle adapted to receive a correspondingly shaped key therein.
12. A wedge bar locking mechanism according to claim 1, said helical groove terminating respectively at proximal and distal hard stops located respectively adjacent either end of the threaded portion.
13. A wedge bar locking mechanism according to claim 1, said cylindrical portion being provided substantially centrally relative to a vertical extent of said slot.
14. A wedge bar locking mechanism according to claim 1, consisting essentially of said locking pin, said wedge bar and said bracket.
15. A wedge bar locking mechanism comprising a locking pin, a wedge bar and a bracket,
said locking pin comprising a reduced diameter portion and a threaded portion, said threaded portion having a continuous helical groove disposed circumferentially about and extending longitudinally of said threaded portion,
said wedge bar comprising a longitudinally extending portion at a proximal end thereof, said longitudinally extending portion having at least one tooth dimensioned to extend into and be accommodated within said helical groove disposed in said threaded portion of said locking pin,
said bracket defining a longitudinally extending slot adapted to accommodate said wedge bar therein, and a longitudinally extending cylindrical portion defining a longitudinal cylindrical pathway adapted to accommodate said locking pin therein.
16. A wedge bar locking mechanism according to claim 15, said bracket further comprising at least one retaining tab extending radially inward of said cylindrical portion into said longitudinal cylindrical pathway of said bracket, said retaining tab being received and accommodated within said reduced diameter portion of said locking pin when said locking pin is received in said longitudinal cylindrical pathway of said bracket.
17. A wedge bar locking mechanism according to claim 16, said retaining tab being formed by punching through a wall of said cylindrical portion such that a punched portion of said wall extends radially inward of the cylindrical portion, still attached to the wall, to provide said retaining tab.
18. A wedge bar locking mechanism according to claim 16, said retaining tab being integral with said bracket.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An apparatus for accessing an encrypted memory portion of a memory, comprising:
a plurality of signature generators, the signature generators being implemented using digital hardware or a computer or a combination of a computer and digital hardware, wherein each signature generator of the plurality of signature generators is configured to generate a signature of a plurality of signatures depending on an instruction of a plurality of instructions, wherein each of the plurality of instructions is a processor instruction for controlling a processor;
a key modifier implemented using digital hardware or a computer or a combination of a computer and digital hardware and configured to generate a processed key depending on a standard key and on the plurality of signatures; and
a memory access controller for accessing the encrypted memory portion of the memory, wherein the memory access controller is configured to employ the processed key to access the encrypted memory portion of the memory.
2. An apparatus according to claim 1, wherein the apparatus further comprises an instruction loader for loading one or more of the plurality of instructions from an instruction pipeline, wherein the plurality of instructions are stored in the instruction pipeline.
3. An apparatus according to claim 1, wherein each signature generator of the plurality of signature generators is configured to generate a signature of the plurality of signatures by applying a hash-function on an instruction of the plurality of instructions.
4. An apparatus according to claim 1, wherein the key modifier is configured to generate the processed key by conducting an XOR operation on the standard key and on one of the plurality of signatures.
5. An apparatus according to claim 1,
wherein the key modifier comprises a plurality of XOR operation units, wherein each XOR operation unit of the plurality of XOR operation units is configured to generate an intermediate key of a plurality of intermediate keys by conducting an XOR operation on a first operand and on a second operand,
wherein the first operand is one of the plurality of signatures,
wherein the second operand is the standard key or a further intermediate key of the plurality of intermediate keys, and
wherein one of the plurality of intermediate keys is the processed key.
6. An apparatus according to claim 5, wherein the apparatus further comprises an instruction loader for loading one or more of the plurality of instructions from an instruction pipeline, wherein the plurality of instructions are stored in the instruction pipeline.
7. An apparatus according to claim 5, wherein the plurality of XOR operation units are arranged such that no two different XOR operation units of the plurality of XOR operation units exist, which conduct said XOR operation on the same signature of the plurality of signatures.
8. An apparatus according to claim 5, wherein the plurality of XOR operation units are arranged such that no two different XOR operation units of the plurality of XOR operation units exist, which conduct said XOR operation on the same intermediate key of the plurality of intermediate key.
9. An apparatus according to claim 5,
wherein the plurality of XOR operation units are arranged such that no two different XOR operation units of the plurality of XOR operation units exist, which conduct said XOR operation on the same signature of the plurality of signatures, and
wherein the plurality of XOR operation units are arranged such that no two different XOR operation units of the plurality of XOR operation units exist, which conduct said XOR operation on the same intermediate key of the plurality of intermediate keys.
10. An apparatus according to claim 1,
wherein the apparatus further comprises a compiler for calculating, depending on the plurality of instructions, a calculated key,
wherein the memory access controller is configured to employ the calculated key for encrypting data to obtain encrypted data, and
wherein the memory access controller is configured to store the encrypted data into the encrypted memory portion of the memory.
11. An apparatus according to claim 1,
wherein the plurality of instructions comprises a first group of instructions and a second group of instructions,
wherein the plurality of signature generators comprises a first group of signature generators and a second group of signature generators,
wherein the plurality of signatures being generated by the plurality of signature generators comprises a first group of signatures and a second group of signatures,
wherein each signature generator of the first group of signature generators is configured to generate a signature of the first group of signatures depending on an instruction of the first group of instructions,
wherein each signature generator of the second group of signature generators is configured to generate a signature of the second group of signatures depending on an instruction of the second group of instructions,
wherein the key modifier comprises a plurality of XOR operation modules,
wherein each XOR operation module of the plurality of XOR operation modules is configured to conduct a first XOR operation on a first operand and on a second operand to generate a third operand, and is configured to conduct a second XOR operation on the third operand and on a fourth operand to generate an intermediate key of a plurality of intermediate keys,
wherein the first operand is one of the signatures of the first group of signatures, wherein the second operand is the standard key or a further intermediate key of the plurality of intermediate keys, wherein the fourth operand is one of the signatures of the second group of signatures, and
wherein one of the plurality of intermediate keys is the processed key.
12. An apparatus according to claim 11,
wherein the apparatus further comprises a first instruction loader for loading one or more of the first group of instructions from a slave pipeline, wherein the first group of instructions are stored in the slave pipeline, and
wherein the apparatus further comprises a second instruction loader for loading one or more instructions of the second group of instructions from a master pipeline, wherein the second group of instructions are stored in the master pipeline.
13. An apparatus according to claim 11, wherein the plurality of XOR operation modules are arranged such that no two different XOR operation modules of the plurality of XOR operation modules exist, which conduct said XOR operation on the same intermediate key of the plurality of intermediate keys.
14. An apparatus according to claim 11,
wherein the memory access controller is configured to employ the standard key for memory encryption, and
wherein the memory access controller is configured to employ the processed key for memory decryption.
15. An apparatus for accessing an encrypted memory portion of a memory, comprising:
a plurality of signature generators, the signature generators being implemented using digital hardware or a computer or a combination of a computer and digital hardware, wherein each signature generator of the plurality of signature generators is configured to generate a signature of a plurality of signatures depending on an instruction of a plurality of instructions, wherein each of the plurality of instructions is a processor instruction for controlling a processor;
a key modifier implemented using digital hardware or a computer or a combination of a computer and digital hardware and configured to generate a processed key depending on a standard key and on the plurality of signatures; and
a memory access controller for accessing the encrypted memory portion of the memory, wherein the memory access controller is configured to employ the processed key to access the encrypted memory portion of the memory;
wherein the plurality of instructions comprises a first group of instructions and a second group of instructions,
wherein the plurality of signature generators comprises a first group of signature generators and a second group of signature generators,
wherein the plurality of signatures being generated by the plurality of signature generators comprises a first group of signatures and a second group of signatures,
wherein each signature generator of the first group of signature generators is configured to generate a signature of the first group of signatures depending on an instruction of the first group of instructions being stored in a slave pipeline,
wherein each signature generator of the second group of signature generators is configured to generate a signature of the second group of signatures depending on an instruction of the second group of instructions being stored in a master pipeline,
wherein the key modifier comprises a plurality of XOR operation modules,
wherein each XOR operation module of the plurality of XOR operation modules is configured to conduct a first XOR operation on a first operand and on a second operand to generate a third operand, and is configured to conduct a second XOR operation on the third operand and on a fourth operand to generate an intermediate key of a plurality of intermediate keys,
wherein the first operand is one of the signatures of the first group of signatures, wherein the second operand is the standard key or a further intermediate key of the plurality of intermediate keys, wherein the fourth operand is one of the signatures of the second group of signatures, and
wherein one of the plurality of intermediate keys is the processed key.
16. A method for accessing an encrypted memory portion of a memory, wherein the method comprises:
generating a plurality of signatures depending on an instruction of a plurality of instructions, wherein each of the plurality of instructions is a processor instruction for controlling a processor;
generating a processed key depending on a standard key and on the plurality of signatures; and
accessing the encrypted memory portion of the memory, wherein the processed key is employed to access the encrypted memory portion of the memory.
17. A non-transitory computer-readable medium, comprising, stored thereupon, a computer program for implementing the method of claim 16, when being executed by a computer or signal processor.