1. A method for pre-processing a digital data signal to authorize a plurality of unique descendant copies of the digital data signal, comprising:
providing the digital data signal;
identifying a plurality of candidate bits in the digital data signal that can be manipulated during embedding;
generating a digital watermark message to be embedded based on at least one predetermined criterion; and
embedding the digital watermark message in the plurality of candidate bits.
2. The method of claim 1, wherein the step of identifying candidate bits of the digital data signal to be manipulated comprises:
generating a psychoacoustic model of the digital data signal.
3. The method of claim 1, wherein the step of identifying candidate bits of the digital data signal to be manipulated comprises:
generating a psychovisual model of the digital data signal.
4. The method of claim 1, wherein the digital data signal comprises compressed digital data.
5. The method of claim 1, wherein the step of generating a digital watermark message comprises:
generating a unique digital watermark message for each authorized descendant copy.
6. The method of claim 1, wherein the criterion are selected from the group consisting of a geographical territory, a transaction identification, an individual identification, a use limitation, and a signal domain.
7. The method of claim 1, wherein the digital watermark message is encoded in a subset of the plurality of candidate bits identified.
8. The method of claim 1, wherein the plurality of candidate bits that are embedded with the digital watermark message have a relationship that creates additional uniqueness of the digital watermark message.
9. The method of claim 8, wherein the relationship is at least one of a sequential relationship, a linear relationship, and a logically-ordered relationship.
10. The method of claim 1, wherein a subset of the plurality of the candidate bits share at least one function.
11. The method of claim 10, wherein the function is selected from the group consisting of mapping, error correction, and signal processing.
12. The method of claim 1 further comprising:
selectively adding noise to the digital data signal.
13. A method for pre-processing a digital data signal to authorize a plurality of unique descendant copies of the digital data signal, comprising:
providing a digital data signal;
identifying candidate bits of the digital data signal that will be manipulated during scrambling;
generating a key on at least one predetermined criterion; and
manipulating the digital data signal at the plurality of candidate bits with the scrambling key.
14. The method of claim 13, wherein the step of identifying candidate bits of the digital data signal to be manipulated comprises:
generating a psychoacoustic model of the digital data signal.
15. The method of claim 13, wherein the step of identifying candidate bits of the digital data signal to be manipulated comprises:
generating a psychovisual model of the digital data signal.
16. The method of claim 13, wherein the step of providing a digital data signal comprises providing a digital data signal comprised of compressed digital data.
17. The method of claim 13, wherein the step of generating a scrambling key comprises:
generating a unique scrambling key for each authorized descendant copy.
18. The method of claim 13, wherein the criterion are selected from the group consisting of a geographical territory, a transaction identification, an individual identification, a use limitation, and a signal domain.
19. The method of claim 13, wherein a subset of the plurality of candidate bits identified are manipulated with the key.
20. The method of claim 13, wherein the step of manipulating the digital data signal at the plurality of candidate bits with the scrambling key comprises:
manipulating the plurality of candidate bits with a key to embed a watermark and to add noise to digital signal.
21. The method of claim 20, wherein the relationship is at least one of a sequential relationship, a linear relationship, and a logically-ordered relationship.
22. The method of claim 13, wherein a subset of the plurality of the candidate bits are selected based upon their ability to survive a predetermined test of robustness.
23. The method of claim 22, wherein the function is selected from the group consisting of mapping, error correction, and signal processing.
24. A method for creating a copy of a digital data signal, comprising:
obtaining a model for the digital data signal wherein the model describes watermarking parameters;
generating a watermark for the copy of the digital data signal based on at least one criterion; and
embedding the generated watermark based on the obtained model of the digital data signal to create the copy of the digital data signal.
25. The method of claim 24, wherein the step of obtaining a model of the digital data signal comprises:
generating the psychoacoustic model for the digital data signal.
26. The method of claim 24, wherein the step of obtaining a model of the digital data signal comprises:
retrieving a stored psychoacoustic model for the digital data signal.
27. The method of claim 24, wherein the step of obtaining a model of the digital data signal comprises:
generating the psychovisual model for the digital data signal.
28. The method of claim 24, wherein the step of obtaining a model of the digital data signal comprises:
retrieving a stored psychovisual model for the digital data signal.
29. The method of claim 24, wherein the criterion are selected from the group consisting of a geographical territory, a transaction identification, an individual identification, a use limitation, and a signal domain.
30. A method for pre-processing a digital data signal, comprising:
providing a digital signal;
identifying a plurality of candidate bits in the digital data signal that can be manipulated during embedding;
generating at least one digital watermark message to be embedded based on at least one predetermined criterion;
selecting candidate bits to manipulate; and
embedding the at least one digital watermark message in the selected candidate bits.
31. The method of claim 30, wherein the at least one predetermined criterion includes at least one characteristic of the digital signal.
32. The method of claim 30, wherein the step of selecting candidate bits to manipulate comprises:
selecting candidate bits that provide optimal locations for the digital watermark.
33. The method of claim 30, further comprising the step of:
inverting at least one watermark out of a plurality of embedded watermarks.
34. The method of claim 30, further comprising the step of:
decoding the at least one digital watermark from the digital data signal.
35. The method of claim 34, wherein the step of decoding the at least one digital watermark from the digital data signal comprises:
degrading the watermarked digital data signal responsive to an unauthorized attempt to decode the digital watermark form the digital data signal.
36. The method of claim 34, wherein the step of decoding the at least one digital watermark from the digital data signal comprises:
degrading the watermarked digital signal responsive to fewer than all embedded watermarks being decoded from the digital signal.
37. The method of claim 34, wherein the step of decoding the at least one digital watermark from the digital data signal is asymmetric.
38. The method of claim 30, wherein a key corresponding each of the at least one watermark comprises a greater number of bits than the corresponding watermark message.
39. The method of claim 30, wherein a key corresponding each of the at least one watermark comprises the same greater number of bits as the corresponding watermark message.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. Simulation method of an electronic circuit or a printed circuit, represented in the form of masks and connections, comprising:
a) defining, on one hand, inputs and outputs of circuit networks of the electronic circuit, and, on the other, internal components of each network,
b) forming a reduced model of each network comprising:
b1)\u2022forming a conductance matrix or a resistance matrix, and also forming: a susceptance matrix; a susceptance and inductance matrix; or a susceptance, inductance and reluctance matrix, of inputs and internal components of the network,
b2)\u2022forming a first reduced digital model of said conductance or resistance matrix, and of said susceptance matrix; susceptance and inductance matrix; or susceptance, inductance and reluctance matrix,
c) simulating the network using the first reduced digital model,
d) in an event of an unsatisfactory simulation result, modifying part of the masks andor connections of one or more networks, forming a second reduced digital model, and simulating with said new reduced model,
e) in an event of a satisfactory simulation result, producing the circuit,
wherein couplings between the circuit networks are low couplings, a network being subject to low coupling if the number ne of external nodes of the network is below the number ni of specific internal nodes of the network.
2. Method according to claim 1, the reduction according to step b2) being obtained by removing the connections having frequencies greater than an operating frequency of the network.
3. Method according to claim 1, the reduction according to step b2) using a projection in a reduced base.
4. Method according to claim 1, wherein forming a first reduced digital model achieves a reduction rate greater than 95%.
5. Method according to claim 1, wherein, for components other than internal components, a formed conductance or resistance matrix, susceptance and inductance matrix, or susceptance, inductance and reluctance matrix is a hollow matrix.
6. Method according to claim 5, wherein said hollow matrices are stored in memory.
7. Method according to claim 6, wherein, in the event of an unsatisfactory simulation result, said hollow matrices are modified.
8. Method according to claim 1, a network being subject to low coupling if the number ne of external nodes of the network and the number ni of specific internal nodes of the network complies with the equation: ne2<ni.
9. Method according to claim 1, comprising a storage step of geometric components of each network in memory.
10. Method according to claim 1, step d) comprising:
the indication of at least one network to be modified andor at least one node or coordinates of a node of said network,
at least one modification of the reduced model of said network.
11. Method according to claim 1, the reduced network model being an RLCK type.
12. Method according to claim 1, the circuit containing digital means.
13. Method according to claim. 1, the circuit 30 containing analogue means.
14. Method according to claim 1, the circuit being on a substrate.
15. Method according to claim 1, the circuit being in a housing.
16. Method according to claim 1, the models of several networks being stored in memory in a database.
17. Method according to claim 16, the modification of part of the masks of one or more networks, referred to as modified networks, resulting in a modification of files of said database corresponding to said modified networks.
18. Method according to claim 16, the modification of one or more networks, or of a part of the connections of one or more networks, referred to as modified networks, being a direct modification of the files of said database corresponding to said modified networks.
19. Method according to claim 1, step b) being performed hierarchically.
20. Method according to claim 19, the simulation step c) being performed in cascade according to the hierarchy of step b).
21. Method according to claim 1, the simulation step c) being performed using the reduced model and a matrix system (Yp) of external connections of the network.
22. Simulation device of an electronic circuit, represented in the form of masks and connections, comprising:
a) means for defining, on one hand, inputs and outputs of networks of the circuit, and, on the other, the internal components of said networks,
b) means for forming or calculating a reduced model of each network, comprising:
b1)\u2022means for forming or calculating a conductance matrix or a resistance matrix of the internal components, and also for forming or calculating a susceptance and inductance matrix, or a susceptance, inductance and reluctance matrix, of these inputs and internal components of the network,
b2)\u2022means for forming a first reduced digital model of the conductance or resistance matrix of the internal components, along with the susceptance and inductance or susceptance, inductance and reluctance matrix of said internal components,
c) means for simulating the network using the first reduced digital model,
d) in an event of an unsatisfactory simulation result, means for modifying part of the masks andor connections of one or more networks, to form a second reduced digital model, and to perform a simulation with said new reduced model,
wherein couplings between circuit networks are low couplings, a network being subject to low coupling if the number ne of external nodes of the network is below the number ni of specific internal nodes of the network.
23. Device according to claim 22, the reduction means b2) comprising means to eliminate connections having frequencies greater than an operating frequency of the network.
24. Device according to claim 22, the reduction means b2) comprising means to carry out a projection in a reduced base.
25. Device according to claim 22, comprising means for storing the formed or calculated conductance or resistance matrices in memory, and for storing the formed or calculated susceptance and inductance matrix or the susceptance, inductance, and reluctance matrix.
26. Device according to claim 25, the matrices stored in memory being hollow matrices.
27. Device according to claim 26, also comprising means to modify, in the event of an unsatisfactory simulation result, said hollow matrices.
28. Device according to claim 22, comprising means storing geometric coordinates of components of each network in memory.
29. Device according to claim 22, the means to modify a part of the masks andor connections of one or more networks comprising means to indicate:
at least one network to be modified andor at least one node or coordinates of a node of said network,
at least one modification of the reduced model of said network.
30. Device according to claim 22, comprising means storing geometric coordinates of components of each network in memory.
31. Device according to claim 22, the models of several networks being stored in memory in a database.
32. Device according to claim 31, the modification of part of the connections of one or more networks, referred to as modified networks, resulting in a modification of files of said database corresponding to said modified networks.
33. Device according to claim 31, the modification of part of the connections of one or more networks, referred to as modified networks, being a direct modification of files of said database corresponding to said modified networks.
34. Device to produce an electronic circuit, comprising a simulation device of an electronic circuit according to claim 22, and means to produce said circuit in the event of satisfactory simulation results.