1. A semiconductor device structure, comprising:
a substrate;
at least one via hole extending partially through the substrate;
a dielectric coating over surfaces of the at least one via hole, the dielectric coating including:
at least one adhesion material; and
a dielectric material comprising a low-K dielectric material; and
a base layer comprising an aluminum film on at least a portion of the dielectric coating.
2. The semiconductor device structure of claim 1, wherein the at least one adhesion material of the dielectric coating comprises an oxide.
3. The semiconductor device structure of claim 1, wherein the at least one adhesion material contacts surfaces of the at least one via hole.
4. The semiconductor device structure of claim 3, wherein the dielectric material coats the at least one adhesion material.
5. The semiconductor device structure of claim 4, further comprising:
another adhesion material coating the dielectric material.
6. The semiconductor device structure of claim 1, wherein the at least one adhesion material coats the dielectric material.
7. The semiconductor device structure of claim 1, wherein the at least one via hole extends through a bond pad carried by the substrate.
8. The semiconductor device structure of claim 7, wherein the dielectric coating extends onto at least a portion of an edge of the bond pad that is continuous with the at least one via hole.
9. A semiconductor device structure, comprising:
a substrate;
at least one via hole extending partially through the substrate and including at least one surface with high surface area features; and
a dielectric coating over the at least one surface.
10. The semiconductor device structure of claim 9, wherein the dielectric coating comprises a low-K dielectric material.
11. The semiconductor device structure of claim 9, wherein the at least one via hole extends through a bond pad carried by the substrate.
12. The semiconductor device structure of claim 11, wherein the dielectric coating extends onto at least a portion of an edge of the bond pad that is continuous with the at least one via hole.
13. A semiconductor device structure, comprising:
a substrate;
at least one via hole extending at least partially through the substrate;
a base material comprising aluminum on at least a portion of a surface of the at least one via hole; and
a conductive material coating the base material.
14. (canceled)
15. The semiconductor device structure of claim 14, further comprising:
a barrier material between the base material and at least the portion of the surface of the at least one via hole.
16. The semiconductor device structure of claim 15, wherein the barrier material comprises at least one of titanium, titanium nitride, tantalum, and tantalum nitride.
17. The semiconductor device structure of claim 14, wherein the conductive material comprises copper.
18. The semiconductor device structure of claim 13, wherein the at least a portion of the surface of the at least one via hole comprises high surface area features.
19. The semiconductor device structure of claim 18, wherein the at least one via hole extends through a bond pad carried by the substrate.
20. The semiconductor device structure of claim 19, wherein the bond pad comprises an unplated bond pad.
21. The semiconductor device structure of claim 20, wherein the base material contacts an unplated surface of the unplated bond pad.
22. The semiconductor device structure of claim 18, wherein the conductive material comprises nickel.
23. The semiconductor device structure of claim 13, further comprising: a void between opposed surfaces of the conductive material.
24. The semiconductor device structure of claim 23, further comprising: a dielectric filler material within the void.
25. The semiconductor device structure of claim 24, wherein a surface of the dielectric filler material is substantially coplanar with a surface of the substrate.
26. The semiconductor device structure of claim 9, further comprising an aluminum material over the dielectric coating.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method implemented on a data processing system for circuit design, the method comprising:
determining for a first design of a circuit a first temperature solution and a first power dissipation solution, the first power dissipation solution and the first temperature solution being interdependent; and
transforming the first design of the circuit into a second design of the circuit using the first temperature solution to reduce leakage power of the circuit under one or more design constraints.
2. The method of claim 1, wherein the one or more design constraints comprises a timing constraint.
3. The method of claim 1, wherein the transforming comprises:
replacing a first element of the first design of the circuit with a second element of the second design of the circuit;
wherein the first and second elements are functionally equivalent; and
wherein the second element has power dissipation lower than the first element at a same temperature, and wherein the first element has a first transistor threshold voltage; the second element has a second transistor threshold voltage; and the first transistor threshold voltage is lower than the second transistor threshold voltage.
4. The method of claim 1, further comprising:
determining a timing critical path; and
selecting a first element from a low temperature portion of the timing critical path based on at least the first temperature solution;
wherein the transforming comprises replacing the first element with a second element to improve timing on the timing critical path; and
wherein the second element has a transistor threshold voltage lower than the first element.
5. The method of claim 1, further comprising:
determining sensitivities of leakage for a plurality of transformations; and
based on the sensitivities of leakage, selecting one from the plurality of transformations to transform the first design of the circuit to the second design of the circuit.
6. A non-transitory machine readable medium containing executable computer program instructions which when executed by a digital processing system cause the system to perform operations comprising:
determining for a first design of a circuit a first temperature solution and a first power dissipation solution, the first power dissipation solution and the first temperature solution being interdependent; and
transforming the first design of the circuit into a second design of the circuit using the first temperature solution to reduce leakage power of the circuit under one or more design constraints.
7. The non-transitory machine readable medium of claim 6, wherein the one or more design constraints comprises a timing constraint.
8. The non-transitory machine readable medium of claim 6, wherein the transforming comprises:
replacing a first element of the first design of the circuit with a second element of the second design of the circuit;
wherein the first and second elements are functionally equivalent; and
wherein the second element has power dissipation lower than the first element at a same temperature.
9. The non-transitory machine readable medium of claim 6, further comprising instructions which when executed by the digital processing system cause the system to perform operations comprising determining a timing critical path; and
selecting a first element from a low temperature portion of the timing critical path based on at least the first temperature solution;
wherein the transforming comprises replacing the first element with a second element to improve timing on the timing critical path; and
wherein the second element has a transistor threshold voltage lower than the first element.
10. The non-transitory machine readable medium of claim 6, further comprising instructions which when executed by the digital processing system cause the system to perform operations comprising
determining sensitivities of leakage for a plurality of transformations; and
based on the sensitivities of leakage, selecting one from the plurality of transformations to transform the first design of the circuit to the second design of the circuit.
11. A data processing system for circuit design, comprising:
a memory; and a processor coupled to the memory, the processor configured to determine for a first design of a circuit a first temperature solution and a first power dissipation solution, the first power dissipation solution and the first temperature solution being interdependent; and
the processor configured to transform the first design of the circuit into a second design of the circuit using the first temperature solution to reduce leakage power of the circuit under one or more design constraints.
12. The data processing system of claim 11, wherein the one or more design constraints comprises a timing constraint.
13. The data processing system of claim 11, wherein the processor is further configured to:
replace a first element of the first design of the circuit with a second element of the second design of the circuit;
wherein the first and second elements are functionally equivalent; and
wherein the second element has power dissipation lower than the first element at a same temperature, and wherein the first element has a first transistor threshold voltage; the second element has a second transistor threshold voltage; and the first transistor threshold voltage is lower than the second transistor threshold voltage.
14. A method implemented on a data processing system for circuit design, the method comprising:
determining a temperature solution and a power dissipation solution for a first design of a circuit, the power dissipation solution and the temperature solution interdependent, the power dissipation solution and the temperature solution consistent with each other; and
transforming the first design of the circuit into a second design of the circuit using the temperature solution to improve performance of first design of the circuit.
15. The method of claim 9, further comprising:
selecting an element of the first design from a location with an elevated temperature according to the temperature solution;
wherein the first design is transformed into a second design through replacing a first implementation of the element with a second implementation to reduce leakage power, and
wherein the first implementation has a transistor threshold voltage lower than the second implementation.
16. The method of claim 9, further comprising:
selecting an element of the first design from a location with a low temperature according to the temperature solution;
wherein the first design is transformed into a second design through replacing a first implementation of the element with a second implementation to improve timing on a path while limiting an increase in leakage power, and wherein the second implementation has a transistor threshold voltage lower than the first implementation.
17. The method of claim 9, further comprising:
determining sensitivities of leakage and delay for a plurality of transformations; and
based on the sensitivities of leakage and delay, selecting one from the plurality of transformations to transform the first design of the circuit to the second design of the circuit.
18. The method of claim 9, further comprising:
determining sensitivities of leakage to temperature change at a plurality of locations in the circuit;
determining sensitivities of delay to temperature change at a plurality of locations in the circuit; and
based on the sensitivities of leakage to temperature change and the sensitivities of delay to temperature change, determining a transformation from the first design of the circuit to the second design of the circuit.
19. A data processing system for circuit design, the data processing system comprising:
a memory; and a processor coupled to the memory, the processor configured to determine a temperature solution and a power dissipation solution for a first design of a circuit, the power dissipation solution and the temperature solution interdependent, the power dissipation solution and the temperature solution consistent with each other; and
the processor configured to transform the first design of the circuit into a second design of the circuit using the temperature solution to improve performance of first design of the circuit.
20. The data processing system of claim 19, wherein the processor is further configured to
select an element of the first design from a location with an elevated temperature according to the temperature solution;
wherein the first design is transformed into a second design through replacing a first implementation of the element with a second implementation to reduce leakage power.