1. A process for stabilizing a product from a pledget, comprising the steps of:
providing a pledget disposed in a compression mold;
compressing said pledget in said compression mold to form a compressed pledget;
unloading said compressed pledget from said compression mold and loading said compressed pledget into a stabilization mold by a transfer member, said transfer member having an expandable portion and said stabilization mold having an interior surface defining an interior cavity;
expanding said expandable portion in said interior cavity to form a generally annular surface engagement with said interior surface of said stabilization mold;
stabilizing said compressed pledget in said stabilization mold to form a stabilized product, wherein said expandable portion of said transfer member remains expanded during the step of stabilizing said product; and
unloading said stabilized product from said stabilization mold.
2. The process according to claim 1, wherein said expandable portion is a gasket fitted circumferentially around said transfer member.
3. The process according to claim 1, further including the step of returning the expandable portion to an unexpanded state.
4. The process according to claim 1, wherein said transfer member comprises an axial channel extending longitudinally therein and configured to transfer a gas therethrough to said expandable portion.
5. The process according to claim 4, wherein said stabilized product is a tampon.
6. The process according to claim 1, wherein the step of expanding said expandable portion comprises mechanically dilating said expandable portion in an outward radial direction.
7. The process according to claim 6, wherein said transfer member includes a member for engaging and dilating said expandable portion.
8. The process according to claim 1, wherein the step of stabilizing includes applying a gas to said compressed pledget in said stabilization mold, and wherein said annular surface engagement substantially retains said gas from leaking between said transfer member and said stabilization mold during the step of stabilizing.
9. The process according to claim 1, wherein step of stabilizing includes applying microwave heat to said compressed pledget in said stabilization mold.
10. A process for producing a stabilized product from a compressed pledget, comprising the steps of:
providing a pledget;
providing a transfer member, said transfer member having an expandable portion;
providing a mold, said mold having an interior surface defining an interior cavity;
pushing said pledget into said mold with said transfer member such that said expandable portion is within said interior cavity,
expanding said expandable portion of said transfer member to form a seal with said interior surface of said mold; and
stabilizing said pledget, while said expandable portion of said transfer member remains expanded.
11. The process according to claim 10, wherein said expandable portion is a gasket fitted circumferentially around said transfer member.
12. The process according to claim 10, wherein said transfer member defines an axial channel extending longitudinally therein and configured to transfer a gas therethrough to said expandable portion.
13. The process according to claim 12, wherein said axial channel is connected to at least one radial channel extending radially from said axial channel to said expandable portion and configured to transfer a gas from said axial channel in an outward radial direction to said expandable portion.
14. The process according to claim 12, wherein the step of expanding said expandable portion comprises delivering said gas into said axial channel, thereby creating an outward radial deformation of the expandable member and forming said seal with said interior surface.
15. The process according to claim 10, wherein the step of expanding said expandable portion comprises mechanically dilating said expandable portion in an outward radial direction.
16. The process according to claim 10, wherein the step of stabilizing includes applying a gas to said pledget in said mold.
17. The process according to claim 16, wherein said seal substantially retains said gas from leaking between said transfer member and said mold during the step of stabilizing.
18. A stabilization apparatus for stabilizing a compressed tampon pledget, the apparatus comprising:
a stabilization mold, said mold having an interior surface defining an interior cavity, and said interior cavity configured for receiving and stabilizing a tampon pledget; and
a transfer member having a tip configured to advance said tampon pledget into said stabilization mold and an expandable portion fitted circumferentially around said tip and configured to enter said interior cavity and expand in an outward radial direction to form a seal with said interior surface of said stabilization mold.
19. The apparatus according to claim 18, wherein the seal is an annular seal between said expandable portion and said interior surface of the stabilization mold.
20. The apparatus according to claim 18, wherein said transfer member comprises an axial channel extending longitudinally therein and configured to transfer a gas therethrough to said expandable portion.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A one-shot circuit comprising:
circuitry comprising a set-reset (SR) latch to produce an output pulse of controlled duration in response to an input signal rising edge, the SR latch comprising a first circuit input and a second circuit input;
a circuit path to provide a signal to the first circuit input; and
a delay element connected to the circuit path and to the second circuit input.
2. The one-shot circuit of claim 1, wherein the first circuit input is a set (S) input, the second circuit input is a reset (R) input, and the one-shot circuit is configured to produce a positive output pulse.
3. The one-shot circuit of claim 1, wherein the first circuit input is a reset (R) input, the second circuit input is a set (S) input, and the one-shot circuit is configured to produce a negative output pulse.
4. The one-shot circuit of claim 1, wherein the delay element is adjustable to produce an adjustable delay.
5. The one-shot circuit of claim 1, wherein the delay element comprises one or more non-inverting delay buffers in series.
6. The one-shot circuit of claim 1, wherein the delay element comprises an even number of inverters in series.
7. The one-shot circuit of claim 1 wherein the delay element comprises a series combination of one or more non-inverting delay buffers and an even number of inverters.
8. The one-shot circuit of claim 1, wherein the first circuit input is a set (S) input Sn, the second circuit input is a reset (R) input Rn, and the one-shot circuit is configured to produce a positive output pulse (Q) Qn, Qn being an output of the SR latch, Qn\u22121 being a last state of Qn, and Qb,n\u22121 being an inverse of the last state of Qn; and
wherein the SR latch operates according to the following truth table:
Sn
Rn
Qn
1
0
1
0
1
0
0
0
Qn\u22121
1
1
Qb, n\u22121
9. The one-shot circuit of claim 8, wherein the SR latch comprises:
a multiplexer comprising a first input, a second input, a select input, and a circuit output, wherein a value of the select input determines whether the circuit output is the first input or the second input; and
a latch comprising a third input, a fourth input, and an intermediate output, wherein the first input and the third input are configured to receive a same first signal, the second input is configured to receive a second signal, the fourth input is configured to receive an inverted version of the second signal, and the intermediate output is connected to the select input;
wherein the third input is the set (S) SR latch input and the fourth input is the reset (R) SR latch input.
10. The one-shot circuit of claim 9, wherein the intermediate output is Yn, Yn\u22121 being a last state of Yn; and
wherein the latch providing the intermediate output operates according to the following truth table:
Sn
Rn
Yn
1
0
1
0
1
0
0
0
Yn\u22121
1
1
Yn\u22121
11. The one-shot circuit of claim 8, wherein the SR latch comprises:
a latch comprising a first input, a second input, a third input, and a circuit output; and
a latch comprising a fourth input, a fifth input, and an intermediate output, wherein the first input and the fourth input are configured to receive a same first signal, the second input and the fifth input are configured to receive a same second signal, and the intermediate output is connected to the third input;
wherein the first input is the set (S) SR latch input and the second input is the reset (R) SR latch input.
12. The one-shot circuit of claim 11, wherein the intermediate output is Yn, and Yb,n is an inverse of Yn;
wherein the latch providing the circuit output operates according to the following truth table:
Sn
Rn
Qn
1
0
1
0
1
0
0
0
Qn\u22121
1
1
Yb, n
wherein the latch providing the intermediate output operates according to the following truth table:
Sn
Rn
Yn
1
0
1
0
1
0
0
0
Yn\u22121
1
1
Yn\u22121
13. The one-shot circuit of claim 1, wherein the circuitry comprises:
a first latch comprising a first input, a second input, and a first output;
a second latch comprising a third input, a fourth input; and second output, the fourth input being an inverted input; and
a third latch comprising a fifth input, a sixth input, a seventh input, an eighth input, and a third output;
wherein the first input, the third input, and the sixth input are connected together to receive a first signal comprising the first circuit input;
wherein the second input, the fourth input, and the seventh input are connected together to receive a second signal comprising the second circuit input;
wherein the first output is connected to the fifth input; and
wherein the second output is connected to the eighth input.
14. The one-shot circuit of claim 13, wherein the first signal is Sn, an immediately prior version of the first signal is Sn\u22121, the second signal is Rn, an immediately prior version of the second signal is Rn\u22121, the third output is Qn, and an immediately prior version of the third output is Qn\u22121; and
wherein the SR latch operates according to the following truth table:
Sn\u22121
Rn\u22121
Sn
Rn
Qn
0
0
1
0
1
0
0
0
1
0
0
1
1
1
1
1
0
1
1
0
1
1
1
0
Qn\u22121
1
1
0
1
Qn\u22121
0
1
0
0
Qn\u22121
1
0
0
0
Qn\u22121
15. Automatic test equipment (ATE) comprising:
a pattern generator for generating a test pattern to send to a device under test (DUT);
a timing generator to receive the test pattern and to generate timing for a signal to send to the DUT based on the test pattern; and
pin electronics to receive the signal and to send the signal to the DUT;
wherein the timing generator comprises a one-shot circuit, the one-shot circuit to produce an output pulse of controlled duration in response to an input signal rising edge, the one-shot circuit comprising:
circuitry comprising a set-reset (SR) latch, the circuitry comprising a first circuit input and a second circuit input;
a circuit path to provide a signal to the first circuit input; and
a delay element connected to the circuit path and to the second circuit input.
16. The ATE of claim 15, wherein the SR latch comprises:
a multiplexer comprising a first input, a second input, a select input, and a circuit output, wherein a value of the select input determines whether the circuit output is the first input or the second input; and
a latch comprising a third input, a fourth input, and an intermediate output, wherein the first input and the third input are configured to receive a same first signal, the second input is configured to receive a second signal, the fourth input is configured to receive an inverted version of the second signals, and the intermediate output is connected to the select input;
wherein the third input is the first circuit input and the fourth input is the second circuit input.
17. The ATE circuit of claim 15, wherein the SR latch comprises:
a first latch comprising a first input, a second input, and a first output;
a second latch comprising a third input, a fourth input; and second output, the fourth input being an inverted input; and
a third latch comprising a fifth input, a sixth input, a seventh input, an eighth input, and a third output;
wherein the first input, third input, and the sixth input are connected together to receive a first signal comprising the first circuit input;
wherein the second input, the fourth input, and the seventh input are connected together to receive a second signal comprising the second circuit input;
wherein the first output is connected to the fifth input; and
wherein the second output is connected to the eighth input.
18. The one-shot circuit of claim 15, wherein the SR latch comprises:
a latch comprising a first input, a second input, a third input, and a circuit output, wherein, in at least one case, a value of the third input determines whether the circuit output is the first input or the second input; and
a latch comprising a fourth input, a fifth input, and an intermediate output, wherein the first input and the fourth input are configured to receive a same first signal, the second input and the fifth input are configured to receive a same second signal, and the intermediate output is connected to the third input;
wherein the fourth input comprises the first circuit input and the fifth input comprises the second circuit input.