1. An active rectifier circuit comprising:
(a) a first transistor having a first current-carrying electrode coupled by a first input conductor to a first input voltage and a second current-carrying electrode coupled to an output conductor for conducting a rectified output voltage, and a second transistor having a first current-carrying electrode coupled by a second input conductor to a second input voltage and a second current-carrying electrode coupled to the output conductor;
(b) a first amplifier having a first input coupled to the first input conductor, a second input coupled to the output conductor, and an output coupled to a gate of the first transistor, and a second amplifier having a first input coupled to the second input conductor, a second input coupled to the output conductor, and an output coupled to a gate of the second transistor;
(c) a third transistor having a first current-carrying electrode coupled to a first reference voltage, a second current-carrying electrode coupled to the first input conductor, and a gate coupled to the output of the second amplifier, and a fourth transistor having a first current-carrying electrode coupled to the first reference voltage, a second current-carrying electrode coupled to the second input conductor, and a gate coupled to the output of the first amplifier; and
(d) the first and second amplifiers each having an input offset voltage to limit or prevent backflow of current from the output conductor to either of the first and second input conductors when either of the first and second input voltages, respectively, is nearly equal to the output voltage.
2. The active rectifier circuit of claim 1 wherein each of the first current-carrying electrodes can be either a source or a drain, depending on operation of the active rectifier circuit, and wherein each of the second current-carrying electrodes can be either a source or a drain, depending on operation of the active rectifier circuit.
3. The active rectifier circuit of claim 1 wherein the input offset voltage of each of the first and second amplifiers has a magnitude of approximately +5 to +10 millivolts to cause the first andor second input voltage to exceed the output voltage output during operation of the active rectifier circuit.
4. The active rectifier circuit of claim 3 wherein the first amplifier operates to maintain a difference between the first input voltage and the output voltage equal to the input offset voltage of the first amplifier, and wherein the second amplifier operates to maintain a difference between the second input voltage and the output voltage equal to the input offset voltage of the second amplifier.
5. The active rectifier circuit of claim 1, wherein the first and second input voltages are AC voltages and wherein each can have an amplitude as low as approximately 200 millivolts.
6. The active rectifier circuit of claim 1 wherein the first amplifier includes first and second input transistors having sources coupled to the first input conductor and the output conductor, respectively, drains coupled to corresponding current sources, respectively, and gates connected to the drain of the second input transistor, and wherein the second amplifier includes third and fourth input transistors having sources coupled to the second input conductor and the output conductor, respectively, drains coupled to corresponding current sources, respectively, and gates connected to the drain of the fourth input transistor.
7. The active rectifier circuit of claim 1 wherein the first, second, third, and fourth transistors are N-channel transistors.
8. The active rectifier circuit of claim 1 wherein the first and second transistors are P-channel transistors.
9. The active rectifier circuit of claim 6 including first and second passive rectifier circuits for rectifying the first and second input voltages, respectively, under low supply voltage conditions wherein the first and second amplifiers are inoperable.
10. The active rectifier circuit of claim 6 wherein the frequency of the first and second input voltages is in the range from 0 to approximately 2000 Herz.
11. The active rectifier circuit of claim 6 wherein the first and second input voltages have magnitudes that are substantially less than a second reference voltage which supplies power to the first and second amplifiers.
12. The active rectifier circuit of claim 11 wherein the first and second input voltages can have magnitudes that are substantially greater than the second reference voltage.
13. The active rectifier circuit of claim 1 including
(1) a fifth transistor having a first current-carrying electrode coupled to the first input conductor and a second current-carrying electrode coupled to the output conductor, and a sixth transistor having a first current-carrying electrode coupled to the second input conductor and a second current-carrying electrode coupled to the output conductor;
(2) a third amplifier having a first input coupled to the output conductor, a second input coupled to the first input conductor, and an output coupled to a gate of the fifth transistor, and a fourth amplifier having a first input coupled to the output conductor, a second input coupled to the second input conductor, and an output coupled to a gate of the sixth transistor.
14. The active rectifier circuit of claim 1 wherein the input offset voltages are internal built-in input offset voltages of the first and second amplifiers, respectively.
15. A method for rectifying a low voltage AC input signal that is equal to a first input voltage minus a second input voltage to produce a rectified output voltage, the method comprising:
(a) coupling the first input voltage to a first current-carrying electrode of a first transistor having a second current-carrying electrode coupled to an output conductor for conducting the rectified output voltage, and coupling the second input voltage to a first current-carrying electrode of a second transistor having a second current-carrying electrode coupled to the output conductor;
(b) controlling a first voltage on a gate of the first transistor by means of a first amplifier to maintain a predetermined offset voltage of the first amplifier between the first input voltage and the rectified output voltage while the first input voltage exceeds the rectified output voltage, and controlling a second voltage on a gate of the second transistor by means of a second amplifier to maintain a predetermined offset voltage of the second amplifier between the second input voltage and the rectified output voltage while the first input voltage exceeds the rectified output voltage;
(c) the predetermined offset voltages limiting or preventing backflow of current from either of the second current-carrying electrodes to a corresponding first current-carrying electrode when either of the first and second input voltages, respectively, is nearly equal to the rectified output voltage.
16. The method of claim 15 including coupling a first current-carrying electrode of a third transistor to a first reference voltage, coupling a second current-carrying electrode of the third transistor to the first current-carrying electrode of the first transistor, and coupling a gate of the third transistor to the gate of the second transistor, and coupling a first current-carrying electrode of a fourth transistor to the first reference voltage, coupling a second current-carrying electrode of the fourth transistor to the first current-carrying electrode of the second transistor, and coupling a gate of the fourth transistor to the gate of the first transistor.
17. The method of claim 15 including providing the input offset voltages of the first and second amplifiers equal to approximately +5 to +10 millivolts.
18. The method of claim 15 including operating the first amplifier to maintain a difference between the first input voltage and the output voltage equal to the input offset voltage of the first amplifier, and operating the second amplifier to maintain a difference between the second input voltage and the output voltage equal to the input offset voltage of the second amplifier.
19. The method of claim 15 including operating first and second passive rectifier circuits to rectify the first and second input voltages, respectively, under a low supply voltage condition at which the first and second amplifiers are inoperable.
20. An active rectifier for rectifying a low voltage AC input signal that is equal to a first input voltage minus a second input voltage to produce a rectified output voltage, the method comprising:
(a) means for coupling the first input voltage to a first current-carrying electrode of a first transistor having a second current-carrying electrode coupled to an output conductor for conducting the rectified output voltage, and means for coupling the second input voltage to a first current-carrying electrode of a second transistor having a second current-carrying electrode coupled to the output conductor;
(b) first amplifier means for controlling a first voltage on a gate of the first transistor to maintain a predetermined offset voltage of the first amplifier between the first input voltage and the rectified output voltage while the first input voltage exceeds the rectified output voltage, and second amplifier means for controlling a second voltage on a gate of the second transistor to maintain a predetermined offset voltage of the second amplifier between the second input voltage and the rectified output voltage while the first input voltage exceeds the rectified output voltage;
(c) the predetermined offset voltages limiting or preventing backflow of current from either of the second current-carrying electrodes to a corresponding first current-carrying electrode when either of the first and second input voltages, respectively, is nearly equal to the rectified output voltage.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An ex vivo method for preparing induced paraxial mesoderm progenitor (iPAM) cells, said method comprising a step of culturing pluripotent cells in an appropriate culture medium comprising an effective amount of an activator of a Wnt signaling pathway.
2. An ex vivo method for preparing induced paraxial mesoderm progenitor (iPAM) cells, said method comprising a step of culturing pluripotent cells in an appropriate culture medium comprising an effective amount of an activator of a Wnt signaling pathway and an effective amount of an inhibitor of a Bone Morpho genetic Protein (BMP) signaling pathway.
3. The ex vivo method according to claim 1, wherein said Wnt signaling pathway is a canonical Wntbeta catenin signaling pathway andor a WntPCP signaling pathway.
4. The ex vivo method according to claim 1, wherein the activator of said Wnt signaling pathway is a member of an R-spondin family.
5. The ex vivo method according to claim 4, wherein said member of the R-spondin family is selected from the group consisting of R-spondin 3, R-spondin2, and a combination of said R-spondin 3 and R-spondin 2.
6. The ex vivo method according to claim 5, wherein said R-spondin-3 is a human R-spondin-3 of sequence SEQ ID NO 1 or a human R-spondin-3 isoform 2 of sequence SEQ ID NO 5.
7. The ex vivo method according to claim 5, wherein said R-spondin-2 is a human R-spondin-2 of sequence SEQ ID No 3, a human R-spondin-2 isoform 2 of sequence SEQ ID NO 6, or a human R-spondin-2 isoform 3 of sequence SEQ ID NO 7.
8. The ex vivo method according to claim 2, wherein said inhibitor of the BMP signaling pathway is selected from the group consisting of Noggin, Chordin, Chordin-like 1-3, Follistatin, Follistatin-like 1-5, a member of a Dan family and variants and fragments thereof which inhibit the BMP signaling pathway.
9. The ex vivo method according to claim 8, wherein said inhibitor of BMP signaling pathway is Noggin.
10. The ex vivo method according to claim 8, wherein said inhibitor of the BMP signaling pathway is a chemical inhibitor of BMP signaling.
11. The ex vivo method according to claim 1, wherein the activator of said Wnt signaling pathway is an inhibitor of GSK-3B.
12. The ex vivo method according to claim 1, wherein said appropriate culture medium further comprises DMSO.
13. The method according to claim 1, wherein the pluripotent stem cells are mouse or human embryonic stem cells or iPS cells.
14. A culture medium which comprises a Wnt activator and an inhibitor of BMP signaling pathway to improve the differentiation of pluripotent cells into induced Paraxial Mesoderm progenitor (iPAM) cells.
15. The culture medium according to claim 14, wherein the Wnt activator is R-spondin-3 and the BMP signaling pathway is Noggin.
16. The culture medium according to claim 15, which further comprises DMSO.
17. A population comprising induced paraxial mesoderm progenitor (iPAM) cells obtained from the method according to claim 1.
18. The population according to claim 17, wherein at least 10% of the cells in said population, exhibit a high expression of biomarker characteristic of paraxial mesoderm progenitor cells.
19. A method for preparing populations comprising skeletal muscle, bone, cartilage, dermal cell, adipocytes or endothelial cells lineages, said method comprising steps of
(a) providing a population comprising induced paraxial mesoderm progenitor (iPAM) cells prepared according to claim 1; and
(b) culturing said population comprising induced paraxial mesoderm progenitor (iPAM) cells, under appropriate conditions for their differentiation into the desired cell lineages selected from the group consisting of paraxial mesoderm derivatives which include skeletal muscle, bone, cartilage, dermal cell, adipocytes or endothelial cells lineages.
20. The method according to claim 19, for preparing populations comprising skeletal muscle cell lineages, said method comprising the steps of
(a) providing a population comprising induced paraxial mesoderm progenitor (iPAM) cells prepared by culturing pluripotent cells in an appropriate culture medium comprising an effective amount of an activator of a Wnt signaling pathway;
(b) culturing said population comprising induced paraxial mesoderm progenitor (iPAM) cells in the presence of a differentiation medium comprising at least the following components:
i. an extracellular matrix material; and
ii. compounds activating or inhibiting the signaling pathways known to control of the differentiation of said lineages which include retinoic acid, BMP, TGFB (Transforming Growth FactorB), Hedgehog, Notch, FGF, Wnt, myostatin, insulin, PDGF, VEGF, MAPK, PI3K; and
(c) optionally, culturing said population obtained from step (b) in a second differentiation medium comprising at least one or more compounds activating or inhibiting the Wnt, FGF, HGF (Hepatocyte growth factor), Activin, EGF (Epidermal growth factor), insulin, and IGF signaling pathways or compounds which promote myogenic differentiation,
thereby obtaining a population comprising skeletal muscle cell lineages, that can be identified by markers of Desmin, or Myosin Heavy Chain.
21. The method according to claim 19 for preparing a population comprising dermal cell lineages, said method comprising the steps of culturing a population comprising induced paraxial mesoderm progenitor (iPAM) cells prepared by culturing pluripotent cells in an appropriate culture medium comprising an effective amount of an activator of a Wnt signaling pathway in the presence of an efficient amount of at least one or more compounds activating or inhibiting the BMP, TGFB, Wnt, FGF, EGF, retinoic acid, Notch and Hedgehog pathways.
22. The method according to claim 19 for preparing a population comprising bone or cartilage cell lineages, comprising the step of culturing a population comprising induced paraxial mesoderm progenitor (iPAM) cells prepared by culturing pluripotent cells in an appropriate culture medium comprising an effective amount of an activator of a Wnt signaling pathway in the presence of an efficient amount of at least one or more compounds activating or inhibiting retinoic acid, Wnt, Hedgehog, pTHRP, TGFB, BMP pathways, or compounds which promote bone or cartilage differentiation.