1. A method for large scale integration of quartz-based devices with an electronic host wafer comprising the steps of:
selecting a plurality of quartz-based devices according to their possession of desired characteristics, wherein each selected quartz-based device is attached to an individual handle wafer;
attaching the quartz-based devices with the individual handle wafer to the electronics host wafer to form an array of quartz-based devices on the electronics host wafer;
bonding the quartz-based devices to the electronics host wafer; and then
removing the individual handle wafer from the each of the quartz-based devices.
2. The method according to claim 1 further comprising the step of dicing and electrically characterizing and tuning the quartz-based devices prior to the step of selecting the plurality of quartz-based devices.
3. The method according to claim 1 in which the quartz-based devices are resonators and the step of selecting the plurality of quartz-based devices according to their possession of desired characteristics comprises the step of selecting the resonators according to their resonant frequencies or equivalent circuit parameters.
4. The method according to claim 1 in which the step of attaching comprises picking and placing.
5. The method according to claim 1 in which the step of attaching comprises placing the quartz-based devices in contact with the electronics host wafer serially to form the array of quartz-based devices on the electronics host wafer.
6. The method according to claim 1 in which the step of attaching comprises the steps of attaching each of the plurality of quartz-based devices to a group handle and then moving the group handle in order to contact the quartz-based devices to the electronics host wafer to form a predetermined array of quartz-based devices on the electronics host wafer.
7. The method according to claim 6 in which the step of attaching comprises the steps of attaching each of the individual handles of each of the plurality of quartz-based devices to the group handle and then moving the group handle in order to contact the quartz-based devices to the electronics host wafer to form the predetermined array of quartz-based devices on the electronics host wafer.
8. The method according to claim 6 further comprising the step of removing the group handle after the step of bonding the quartz-based devices to the electronics host wafer.
9. The method according to claim 7 further comprising the step of removing the group handle after the step of bonding the quartz-based devices to the electronics host wafer.
10. The method according to claim 1 in which the steps of attaching and bonding are carried out with a multi-chip die bonder.
11. The method according to claim 1 in which the step of bonding comprises applying a conductive epoxy to the bonding sites and curing the conductive epoxy.
12. The method according to claim 1 in which the step of bonding comprises heating the electronic host wafer to a preselected temperature.
13. The method according to claim 1 in which the step of bonding further comprises individually compressing the quartz-based devices to the electronics host wafer.
14. The method according to claim 1 in which each of the quartz-based devices has a surface with at least one electrode and the step of bonding comprises causing a low temperature compression bond between the electrode and an electrode on the electronics host wafer.
15. The method according to claim 14 in which the low temperature compression bond is chosen from the group consisting of AuIn, AuSn, and CuSn bonds.
16. A method for large scale integration of quartz-based resonators with an electronics host wafer comprising the steps of:
providing a plurality of quartz-based resonators possessing desired resonant frequencies, each of the resonators having at least one electrode formed on a first surface of the quartz-based resonator and being attached to an individual handle wafer;
placing the plurality of quartz-based resonators in contact with the electronics host wafer to form an array of quartz-based resonators on a surface of the electronics host wafer wherein at least one electrode of each quartz-based resonator is in electrical communication with an electrode disposed on the surface of the electronics host wafer;
bonding the plurality of quartz-based resonators to the electronics host wafer; and
removing the individual handle wafers from the plurality of quartz-based resonators.
17. The method according to claim 16 in which the step of bonding comprises bonding the at least one electrode of the quartz-based resonator to the electrode disposed on the surface of the electronics host wafer.
18. The method according to claim 16 in which the step of placing is done serially with a pick and place device.
19. The method according to claim 16 further comprising the following steps prior to placing the plurality of quartz-based resonators, each attached to the individual handle wafer, in contact with the electronics host wafer:
providing a group handle with pre-arranged depressions for receiving the plurality of quartz-based resonators; and
placing the plurality of quartz-based resonators into the depressions on the group handle.
20. The method according to claim 19 in which the step of placing the quartz-based resonators in contact with the electronics host wafer to form the array of quartz-based resonators on the electronics host wafer comprises using a pick and place device in cooperation with the group handle.
21. The method according to claim 20 further comprising the step of removing the group handle from the quartz-based resonators.
22. The method according to claim 21 wherein each individual handle wafer of each quartz-based resonator is detached from the group handle following the step of bonding to the electronics host wafer.
23. The method according to claim 19 in which the group handle is a wafer.
24. The method according to claim 23 in which the group handle is made of silicon.
25. The method according to claim 16 in which the individual handle wafer is made of silicon.
26. The method according to claim 16 in which the individual handle wafer has a cavity formed therein for receiving at least a part of the quartz-based resonator.
27. The method according to claim 26 further comprising the step of removing the individual handle wafers follows the step of bonding to the electronics host wafer.
28. The method according to claim 16 in which the individual handle wafer is engaged to pick up and place the quartz-based resonator on the electronics host wafer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An inspection system comprising:
a prism having a first end and a second end, where an inspection item is placed a predetermined distance from the first end of the prism and the second end provides an image of the inspection item; and
an image data system disposed at the second end of the prism, the image data system generating two or more sets of two-dimensional image data of different surface areas of the inspection item.
2. The system of claim 1 further comprising an area inspection system coupled to the image data system, the area inspection system receiving two-dimensional image data from one of a plurality of areas of a field of view area.
3. The system of claim 1 further comprising a prism rotation controller coupled to the prism, the prism rotation controller setting a rotation speed of the prism.
4. The system of claim 1 further comprising an image data acquisition control coupled to the image data system, the image data acquisition control setting an image capture rate.
5. The system of claim 1 further comprising an area analysis system receiving the image data and generating inspection item area image data.
6. The system of claim 1 further comprising an inspection item identification system receiving the image data and generating inspection item image data.
7. The system of claim 1 further comprising a component identification system receiving the image data and generating component image data.
8. The system of claim 1 further comprising a component inspection system receiving the image data and generating component passfail data.
9. The system of claim 1 wherein the image data system comprises means for generating two or more pixel arrays of image data from a prism within a field of view.
10. The system of claim 1 further comprising means for identifying component edges from image data generated by the prism.
11. The system of claim 1 further comprising means for setting an image capture rate.
12. A method for inspection comprising:
receiving image data of a first area of an inspection item from a prism;
generating first area two-dimensional image data using an electronic image data system;
receiving image data of a second area of the inspection item from the prism;
generating second area two-dimensional image data using the electronic image data system;
receiving image data of a third area of the inspection item from the prism;
generating third area two-dimensional image data using the electronic image data system;
receiving image data of a fourth area of the inspection item from the prism;
generating fourth area two-dimensional image data using the electronic image data system; and
wherein the inspection items is inspected using the first area image data, the second area image data, the third area image data, and the fourth area image data.
13. The method of claim 12 wherein the item is a semiconductor package.
14. The method of claim 12 wherein the first area image data corresponds to a first area of a semiconductor package, the second area image data corresponds to a second area of the semiconductor package, the third area image data corresponds to a third area of the semiconductor package, and a fourth area image data corresponds to a fourth area of the semiconductor package.
15. A method for inspecting components comprising:
receiving image data of a first area of an assembly from a prism;
generating first area two dimensional image data that includes a first section of the assembly using an electronic image data system;
receiving image data of a second area of the assembly from the prism;
generating second area two dimensional image data that includes a second section of the assembly using the electronic image data system.
16. The method of claim 15 wherein the first section and the second section are each areas of semiconductor packages, and the prism generates image data of different areas of the semiconductor packages.
17. The method of claim 15 further comprising generating a plurality of two-dimensional set of image data, each set including one of a plurality of areas of the assembly.
18. The method of claim 17 further comprising identifying different non-linear areas of the assembly in the image data.
19. The method of claim 15 further comprising analyzing the second area image data based on a predetermined angular relationship to the first area image data.