1. Apparatus for processing data, said apparatus comprising:
at least one trace data source operable to generate an individual trace data stream including trace data signals and trace source identifying signals;
a trace bus coupled to said at least one trace data source and including trace data signal lines operable to carry trace data signals and trace source identifying signal lines operable to carry trace source identifying signals;
a plurality of trace data sources operable to generate respective individual trace data streams each including trace data signals and trace source identifying signals;
a trace data stream combiner operable to receive and to combine said individual trace data streams to form a combined trace data stream including trace data signals and trace source identifying signals, wherein a plurality of trace buses, each including said trace data signal lines and said trace source identifying signal lines, respectively couple said trace data sources to said trace data stream combiner and carry said combined trace data stream from said trace data stream combiner.
2. Apparatus as claimed in claim 1, wherein said trace data bus includes one or more data size indicating signal lines operable to carry one or more size indicating signals indicative of how many of said trace data signal lines are carrying trace data signals.
3. Apparatus as claimed in claim 1, wherein said combined trace data stream is coupled as an input to a further trace data stream combiner to be combined with one or more further trace data streams.
4. Apparatus as claimed in claim 1, comprising a trace data filter operable to perform trace data filtering in dependence upon said trace source identifying signals.
5. Apparatus as claimed in claim 1, wherein said trace source comprises a software triggered trace data generator operable such that a software controlled write to one or more predetermined memory location triggers generation of a trace data stream by said software triggered trace data generator.
6. Apparatus as claimed in claim 1, wherein said trace data source includes one of:
a processor core;
a digital signal processor; and
a memory bus monitor.
7. Apparatus as claimed in claim 1, wherein said apparatus comprises an integrated circuit.
8. Apparatus as claimed in claim 1, wherein said trace bus includes a trace data valid signal line operable to carry a valid signal generated by said trace data source and indicative of said trace data source being active to generate said trace data signals.
9. Apparatus as claimed in claim 1, wherein said trace bus includes a trace data receiver ready signal line operable to carry a ready signal generated by a trace data receiver coupled to said data bus and indicative of said trace data receiver being active to receive said trace data signals.
10. Apparatus for processing data, said apparatus comprising:
at least one trace data source operable to generate an individual trace data stream including trace data signals and trace source identifying signals;
a trace bus coupled to said at least one trace data source and including trace data signal lines operable to carry trace data signals and trace source identifying signal lines operable to carry trace source identifying signals; and
a trace data stream replicator operable to receive a single input trace data stream as an input and to replicate said single trace data stream to form a plurality of output trace data streams.
11. Apparatus as claimed in claim 10, wherein said plurality of output trace data streams are subject to different post-replication trace data stream processing.
12. Apparatus as claimed in claim 11, wherein said apparatus is an integrated circuit and one of said output trace data streams is directed to an off-chip output port and one of said output trace data streams is directed to an on-chip trace data buffer memory.
13. Apparatus for processing data, said apparatus comprising:
at least one trace data source operable to generate an individual trace data stream including trace data signals and trace source identifying signals;
a trace bus coupled to said at least one trace data source and including trace data signal lines operable to carry trace data signals and trace source identifying signal lines operable to carry trace source identifying signals;
a trace data stream replicator operable to receive a single input trace data stream as an input and to replicate said single trace data stream to form a plurality of output trace data streams, wherein said plurality of output trace data streams are subject to different post-replication trace data stream processing, wherein said apparatus is an integrated circuit and one of said output trace data streams is directed to an off-chip output port and one of said output trace data streams is directed to an on-chip trace data buffer memory; and
a trace data filter operable to perform trace data filtering upon trace data directed to said off-chip data port to form low bandwidth trace data.
14. Apparatus for processing data, said apparatus comprising:
at least one trace data source operable to generate an individual trace data stream including trace data signals and trace source identifying signals; and
a trace bus coupled to said at least one trace data source and including trace data signal lines operable to carry trace data signals and trace source identifying signal lines operable to carry trace source identifying signals, wherein a change in trace data source upon said trace bus is accompanied by a change in said trace source identifying signals and a trace data header is output upon said trace data signal lines at a predetermined time following a change in trace data source, whereby a change in trace source identifying signals serves as a marker indicative of a position of a trace data header.
15. A method of processing data, said method comprising the steps of:
generating at least one individual trace data stream including trace data signals and trace source identifying signals using a respective trace data source;
carrying trace data signals upon trace data signal lines of a trace data bus;
carrying trace source identifying signals upon trace source identifying signal lines of said trace bus
generating a plurality of individual trace data streams each including trace data signals and trace source identifying signals with respective trace data sources; and
combining said individual trace data streams to form a combined trace data stream including trace data signals and trace source identifying signals upon a combined stream trace data bus.
16. A method as claimed in claim 15, comprising carrying one or more size indicating signals lines upon data size indicating signal lines of said trace bus, said size indicating signals being indicative of how many of said trace data signal lines are carrying trace data signals.
17. A method as claimed in claim 15, wherein said combined trace data stream is combined with one or more further trace data streams.
18. A method as claimed in claim 15, comprising filtering trace data in dependence upon said trace source identifying signals.
19. A method as claimed in claim 15, wherein a software controlled write to one or more predetermined memory location triggers generation of a trace data stream by a software triggered trace data generator.
20. A method as claimed in claim 15, wherein said trace data source includes one of:
a processor core;
a digital signal processor; and
a memory bus monitor.
21. A method as claimed in claim 15, wherein said method is performed upon an integrated circuit.
22. A method as claimed in claim 15, comprising carrying a valid signal upon a trace data valid signal line of said trace data bus, said valid signal being indicative of said trace data source being active to generate said trace data signals.
23. A method as claimed in claim 15, comprising carrying a trace data receiver ready signal upon a trace data receiver ready signal line of said trace data bus, said trace data receiver ready signal being indicative of said trace data receiver being active to receive said trace data signals.
24. A method of processing data, said method comprising the steps of:
generating at least one individual trace data stream including trace data signals and trace source identifying signals using a respective trace data source;
carrying trace data signals upon trace data signal lines of a trace data bus;
carrying trace source identifying signals upon trace source identifying signal lines of said trace bus, and
replicating a single trace data stream to form a plurality of output trace data streams.
25. A method as claimed in claim 24, wherein said plurality of output trace data streams are subject to different post-replication trace data stream processing.
26. A method as claimed in claim 25, wherein said method is performed upon an integrated circuit and one of said output trace data streams is directed to an off-chip output port and one of said output trace data streams is directed to an on-chip memory.
27. A method of processing data, said method comprising the steps of:
generating at least one individual trace data stream including trace data signals and trace source identifying signals using a respective trace data source;
carrying trace data signals upon trace data signal lines of a trace data bus;
carrying trace source identifying signals upon trace source identifying signal lines of said trace bus,
replicating a single trace data stream to form a plurality of output trace data streams, wherein said plurality of output trace data streams are subject to different post-replication trace data stream processing,
filtering trace data directed to said off-chip data port to form low bandwidth trace data, wherein said method is performed upon an integrated circuit and one of said output trace data streams is directed to an off-chip output port and one of said output trace data streams is directed to an on-chip memory.
28. A method of processing data, said method comprising the steps of:
generating at least one individual trace data stream including trace data signals and trace source identifying signals using a respective trace data source;
carrying trace data signals upon trace data signal lines of a trace data bus;
carrying trace source identifying signals upon trace source identifying signal lines of said trace bus, wherein a change in trace data source upon said trace bus is accompanied by a change in said trace source identifying signals and a trace data header is output upon said trace data signal lines at a predetermined time following a change in trace data source, whereby a change in trace source identifying signals serves as a marker indicative of a position of a trace data header.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
Having thus described our invention, what is claimed is:
1) Apparatus for decoding a lock having a rotatably mounted cylindrical plug having an elongated key receiving slot interactive with a series of slideable members urged by identical coil springs orthogonally toward said slot and having different travel distances relative to flush fit with the cylindrical surface of said plug, said flush fit establishing a shear line which permits rotation of the plug, said springs undergoing linear compression by said key by an amount equal to said travel distance, and producing a resistive force proportionate to said travel distance, said apparatus comprising:
a) a probe device having the general contour of a key expected to fit within said key-receiving slot and having:
1) a straight shank elongated between forward and rearward extremities and bounded by opposed side surfaces and upper and lower edge surfaces, and terminating in a tip portion having an oblique ramp surface extending forwardly and downwardly from said upper edge surface,
2) a series of spaced apart force sensors associated with said upper edge surface, said sensors being capable of changing their electrical resistance in response to force applied thereto,
3) a head portion associated with the rearward extremity of said shank to facilitate manipulation of the probe device, and equipped with electrical terminals, and
4) electrical conductor means extending from each sensor to said electrical terminals,
b) electronic monitoring and display means interactive with said sensors by way of said terminals and serving to indicate the combined force attributed to the effect of said spring and the weight of said slideable members for each slideable member of said series, and
c) a source of low voltage direct current adapted to flow through said sensors and electronic monitoring and display means.
2) The apparatus of claim 1 wherein said lock is a wafer lock.
3) The apparatus of claim 1 wherein said lock is a tumbler lock.
4) The apparatus of claim 1 wherein said force sensors are adhered to the upper edge surface of said shank.
5) The apparatus of claim 1 wherein the slideable members of said lock number between 5 and 10 and are disposed in separate chambers in a uniformly spaced array.
6) The apparatus of claim 1 wherein the force generated by compaction of said springs by 1 to 3 millimeters is significantly greater than the weight of the associated slideable member.
7) The apparatus of claim 1 wherein the length of said shank, measured between said forward and rearward extremities is between 25 and 50 millimeters, its width, measured between said upper and lower edge surfaces, is between 5 and 10 millimeters, and its thickness, measured between said opposed side surfaces is between 1 and 2 millimeters.
8) The apparatus of claim 1 wherein said force sensor is a strain gauge.
9) The apparatus of claim 8 wherein said strain gauge is of sputtered thin film construction.
10) The apparatus of claim 9 wherein said strain gauge is capable of measuring forces up to 12 pounds at a deflection of 0.015 inch, producing up to a 2.0 millivolt output based upon a 10 volt excitation current.
11) The apparatus of claim 5 wherein the spacing of said sensors on said shank is consistent with the spacing of the chambers holding said slideable members.