1461166959-1617820e-59e6-4162-a088-1b18892d6b8d

1. A catalyst for treating an organic acid-containing exhaust gas, which comprises at least one catalyst component (A) selected from the group consisting of metals selected from the group consisting of La, Ce, Pr and W, an oxide of the metal, and a complex oxide of the metals; and at least one noble metal component (B) selected from the group consisting of Pt, Pd, Rh, Ru, Ir and Au.
2. The catalyst for treating an organic acid-containing exhaust gas according to claim 1, wherein said catalyst for treating an organic acid-containing exhaust gas comprises a layer of a refractory inorganic oxide supported on a refractory three-dimensional structure body, and said catalyst component (A) and said noble metal component (B) are substantially uniformly present in a layer of the refractory inorganic oxide supported on the refractory three-dimensional structure body.
3. The catalyst for treating an organic acid-containing exhaust gas according to claim 1, wherein said catalyst component (A) is only Ce, only W, a combination of W and La, or a combination of W and Ce.
4. The catalyst for treating an organic acid-containing exhaust gas according to claim 1, wherein said noble metal component (B) is only Pt, or a combination of Pt and Pd.
5. The catalyst for treating an organic acid-containing exhaust gas according to claim 1, wherein said refractory inorganic oxide is at least one member selected from the group consisting of Si, Al, Ti and Zr, an oxide of the metal, and a complex oxide of the metals.
6. A method for producing the catalyst for treating an organic acid-containing exhaust gas set forth in claim 2, which comprises:
mixing a refractory inorganic oxide with a catalyst component (A) to obtain a slurry;
coating a refractory three-dimensional structure body with the resulting slurry to form a refractory inorganic oxide layer on the refractory three-dimensional structure body; and
supporting a noble metal component (B) on the refractory inorganic oxide in said layer.
7. The method for producing the catalyst for treating an organic acid-containing exhaust gas according to claim 6, wherein the supporting of the noble metal component (B) on the refractory inorganic oxide is carried out by impregnating the refractory three-dimensional structure body having the refractory inorganic oxide layer formed thereon into an aqueous solution of a noble metal-containing compound, and then calcining the impregnated structure.
8. A method for treating an organic acid-containing exhaust gas which comprises contacting an organic acid-containing exhaust gas with the catalyst set forth in claim 1.
9. The method for treating an organic acid-containing exhaust gas according to claim 8, wherein said organic acid is a carboxylic acid having 1 to 6 carbon atoms.
10. The method for treating an organic acid-containing exhaust gas according to claim 9, wherein said organic acid is acetic acid.
11. The method for treating an organic acid-containing exhaust gas according to claim 8, wherein the exhaust gas is contacted with the catalyst at a temperature in the range of 250 to 700\xb0 C.
12. The catalyst for treating an organic acid-containing exhaust gas according to claim 2, wherein said catalyst component (A) is only Ce, only W, a combination of W and La, or a combination of W and Ce.
13. The catalyst for treating an organic acid-containing exhaust gas according to claim 2, wherein said noble metal component (B) is only Pt, or a combination of Pt and Pd.
14. The catalyst for treating an organic acid-containing exhaust gas according to claim 3, wherein said noble metal component (B) is only Pt, or a combination of Pt and Pd.
15. The catalyst for treating an organic acid-containing exhaust gas according to claim 12, wherein said noble metal component (B) is only Pt, or a combination of Pt and Pd.
16. The catalyst for treating an organic acid-containing exhaust gas according to claim 2, wherein said refractory inorganic oxide is at least one member selected from the group consisting of Si, Al, Ti and Zr, an oxide of the metal, and a complex oxide of the metals.
17. The catalyst for treating an organic acid-containing exhaust gas according to claim 3, wherein said refractory inorganic oxide is at least one member selected from the group consisting of Si, Al, Ti and Zr, an oxide of the metal, and a complex oxide of the metals.
18. The catalyst for treating an organic acid-containing exhaust gas according to claim 4, wherein said refractory inorganic oxide is at least one member selected from the group consisting of Si, Al, Ti and Zr, an oxide of the metal, and a complex oxide of the metals.
19. The catalyst for treating an organic acid-containing exhaust gas according to claim 12, wherein said refractory inorganic oxide is at least one member selected from the group consisting of Si, Al, Ti and Zr, an oxide of the metal, and a complex oxide of the metals.
20. The catalyst for treating an organic acid-containing exhaust gas according to claim 13, wherein said refractory inorganic oxide is at least one member selected from the group consisting of Si, Al, Ti and Zr, an oxide of the metal, and a complex oxide of the metals.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for minimizing power consumption in graphics frame processing, the method comprising:
initiating graphics frame processing to be cooperatively performed by a central processing unit (CPU) and a graphics processing unit (GPU);
receiving CPU activity data and GPU activity data;
determining a set of available dynamic clock and voltagefrequency scaling (DCVS) levels for the GPU and the CPU; and
selecting from the set of available DCVS levels an optimal combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during the graphics frame processing.
2. The method of claim 1, wherein the CPU activity data and the GPU activity data are received from a respective activity profiler associated with the CPU and the GPU.
3. The method of claim 1, wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.
4. The method of claim 1, further comprising:
receiving temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
receiving quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the optimal combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.
5. The method of claim 1, wherein the graphics frame processing comprises a CPUGPU serialized workload.
6. The method of claim 5, wherein the optimal combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPUGPU frequency space that minimizes the combined power consumption of the CPU and the GPU during the CPUGPU serialized workload while meeting a frame deadline.
7. The method of claim 1, wherein the graphics frame processing comprises a CPUGPU parallelized workload.
8. The method of claim 7, further comprising:
optimizing processing of common hardware resources to increase an associated idle time; and
synchronizing the common hardware resource processing and the parallel CPU and GPU workloads using a vertical synchronization signal received from a display driver.
9. A system for minimizing power consumption in graphics frame processing, the system comprising:
means for initiating graphics frame processing to be cooperatively performed by a central processing unit (CPU) and a graphics processing unit (GPU);
means for receiving CPU activity data and GPU activity data;
means for determining a set of available dynamic clock and voltagefrequency scaling (DCVS) levels for the GPU and the CPU; and
means for selecting from the set of available DCVS levels an optimal combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during the graphics frame processing.
10. The system of claim 9, wherein the CPU activity data and the GPU activity data are received from a respective activity profiler associated with the CPU and the GPU.
11. The system of claim 9, wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.
12. The system of claim 9, further comprising:
means for receiving temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
means for receiving quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the optimal combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.
13. The system of claim 9, wherein the graphics frame processing comprises a CPUGPU serialized workload.
14. The system of claim 13, wherein the optimal combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPUGPU frequency space that minimizes the combined power consumption of the CPU and the GPU during the CPUGPU serialized workload while meeting a frame deadline.
15. The system of claim 9, wherein the graphics frame processing comprises a CPUGPU parallelized workload.
16. The system of claim 15, further comprising:
means for optimizing processing of common hardware resources to increase an associated idle time; and
means for synchronizing the common hardware resource processing and the parallel CPU and GPU workloads using a vertical synchronization signal received from a display driver.
17. A computer program embodied in a computer-readable medium and executed by a processor for minimizing power consumption in graphics frame processing, the computer program comprising logic configured to:
initiate graphics frame processing to be cooperatively performed by a central processing unit (CPU) and a graphics processing unit (GPU);
receive CPU activity data and GPU activity data;
determine a set of available dynamic clock and voltagefrequency scaling (DCVS) levels for the GPU and the CPU; and
select from the set of available DCVS levels an optimal combination of a GPU DCVS level and a CPU DCVS level, based on the CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during the graphics frame processing.
18. The computer program of claim 17, wherein the CPU activity data and the GPU activity data are received from a respective activity profiler associated with the CPU and the GPU.
19. The computer program of claim 17, wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.
20. The computer program of claim 17, further comprising logic configured to:
receive temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
receive quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the optimal combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.
21. The computer program of claim 17, wherein the graphics frame processing comprises a CPUGPU serialized workload.
22. The computer program of claim 21, wherein the optimal combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPUGPU frequency space that minimizes the combined power consumption of the CPU and the GPU during the CPUGPU serialized workload while meeting a frame deadline.
23. The computer program of claim 17, wherein the graphics frame processing comprises a CPUGPU parallelized workload.
24. The computer program of claim 23, further comprising logic configured to:
optimize processing of common hardware resources to increase an associated idle time; and
synchronize the common hardware resource processing and the parallel CPU and GPU workloads using a vertical synchronization signal received from a display driver.
25. A system for minimizing power consumption in graphics frame processing, the system comprising:
a system on chip (SoC) comprising a central processing unit (CPU), a graphics processing unit (GPU), and a dynamic clock and voltagefrequency scaling (DCVS) controller in communication with the GPU and the CPU; and
a CPUGPU DCVS co-optimization module configured to determine an optimal combination of a GPU DCVS level and a CPU DCVS level for the DCVS controller, based on CPU and GPU activity data, which minimizes a combined power consumption of the CPU and the GPU during graphics frame processing.
26. The system of claim 25, wherein the CPUGPU DCVS co-optimization module comprises logic configured to:
determine a set of available dynamic clock and voltagefrequency scaling (DCVS) levels for the GPU and the CPU; and
determine the optimal combination of the GPU DCVS level and the CPU DCVS level from the set of available DCVS levels.
27. The system of claim 25, wherein the CPU and GPU activity data comprise data specifying one or more of a processor workload, an active time, an idle time, and a waiting time.
28. The system of claim 25, wherein the CPUGPU DCVS co-optimization module comprises logic configured to:
receive temperature data from one or more of at least one CPU temperature sensor and at least one GPU temperature sensor; and
receive quiescent state supply current leakage (IDDQ) data associated with one or more of the GPU and the CPU;
wherein the optimal combination of the GPU and CPU DCVS levels are selected based on the CPU and GPU activity data and one or more of the temperature data and the IDDQ data.
29. The system of claim 25, wherein the graphics frame processing comprises a CPUGPU serialized workload.
30. The system of claim 29, wherein the optimal combination of the GPU DCVS level and the CPU DCVS level comprises an operating point in a CPUGPU frequency space that minimizes the combined power consumption of the CPU and the GPU during the CPUGPU serialized workload while meeting a frame deadline.