1. A method for enhancing the cooling of a chip stack of semiconductor chips, comprising:
creating a first chip with circuitry on a first side;
creating a second chip with circuitry on a first side that is electrically and mechanically coupled to the first chip by a grid of connectors;
placing a thermal interface material pad between the first chip and the second chip, wherein the thermal interface material pad includes nanofibers aligned parallel to mating surfaces of the first chip and the second chip; and
creating a heat removal device thermally connected to the thermal interface material pad.
2. The method of claim 1, wherein the heat removal device comprises a heat sink.
3. The method of claim 2, wherein the heat sink is on one side of the chip stack.
4. The method of claim 3, wherein the heat sink is on top of the chip stack.
5. The method of claim 1, wherein the nanofibers aligned parallel to mating surfaces of the first chip and the second chip draw heat from the first chip and the second chip to the edges of the thermal interface material pad and to the heat removal device and nanofibers aligned perpendicular to mating surfaces of the first chip and the second chip creates a vertical heat transmission channel between the mating surfaces of the first chip and the second chip to the heat removal device.
6. The method of claim 5, wherein the vertical heat transmission block is created by cutting into pieces a thermal interface material with nanofibers aligned along the long axis of the thermal interface material, and assembling the pieces of the thermal interface material into the thermal interface material pad.
7. The method of claim 1, wherein the nanofibers are arranged such that two opposite sides of the thermal interface material pad conduct heat in one direction parallel with the sides of the thermal interface material pad and to the heat removal device and another two on opposite sides conduct heat in a second direction perpendicular to the first direction and still parallel with the sides of the thermal interface material pad and to a second heat removal device.
8. The method of claim 7, wherein the first chip has etching gaps on a second side and the thermal interface material pad has etched channels and ridges that mate with the first chip, and wherein the nanofibers are aligned parallel to the etched gaps of the first chip.
9. The method of claim 1, wherein the nanofibers are nanotubes.
10. A method for creating an enhanced thermal interface material pad for cooling of a semiconductor chip, comprising:
creating a first chip with circuitry on a first side;
etching gaps into the first chip on a second side;
creating the enhanced thermal interface material pad, wherein the enhanced thermal interface material pad includes nanofibers aligned parallel with each other and to mating surfaces of the first chip and enhanced thermal interface material pad;
etching channels into the enhanced thermal interface material pad mating to the gaps etched on the first chip, wherein the nanofibers are aligned parallel with gaps etched on the first chip; and
creating a heat removal device thermally connected to the enhanced thermal interface material pad.
11. The method of claim 10, wherein the heat removal device comprises a heat sink.
12. The method of claim 11, wherein the heat sink is on one side of the chip stack.
13. The method of claim 12, wherein the heat sink is on top of the chip stack.
14. The method of claim 10, wherein the nanofibers draw heat from the first chip to the edges of the thermal interface material pad and to the heat removal device and nanofibers aligned perpendicular to mating surfaces of the first chip creates a vertical heat transmission channel between the mating surfaces of the first chip to the heat removal device.
15. The method of claim 14, wherein the vertical heat transmission block is created by cutting into pieces a thermal interface material with nanofibers aligned along the long axis of the thermal interface material, and assembling the pieces of the thermal interface material into the thermal interface material pad.
16. The method of claim 15, wherein the nanofibers are arranged such that two opposite sides of the thermal interface material pad conduct heat in one direction parallel with the sides of the thermal interface material pad and to the heat removal device and another two on opposite sides conduct heat in a second direction perpendicular to the first direction and still parallel with the sides of the thermal interface material pad and to a second heat removal device.
17-20. (canceled)
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A molecular memory system, comprising:
a first electrode structure;
a second electrode structure having a substantially planar protective surface exposed for contact with a probe tip and comprising an array of spaced-apart electrodes separated by electrically insulating material; and
a recording medium having a molecular recording layer disposed between the first electrode structure and the second electrode structure.
2. The molecular memory system of claim 1, wherein the molecular recording layer comprises a switchable molecular species.
3. The molecular memory system of claim 2, wherein the molecular recording layer comprises a rotaxane molecular species.
4. The molecular memory system of claim 1, wherein the first electrode structure comprises metal layer disposed over a substrate.
5. The molecular memory system of claim 1, wherein the second electrode structure comprises an array of spaced-apart metal electrodes separated by a metal oxide.
6. The molecular memory system of claim 5, wherein the metal electrodes are formed from aluminum and the metal oxide is aluminum oxide.
7. The molecular memory system of claim 1, further comprising a probe tip configured to contact the exposed substantially planar protective surface of the second electrode structure.
8. The molecular memory system of claim 7, wherein the probe tip comprises a carbon nanotube.
9. The molecular memory system of claim 1, further comprising a scanning assembly comprising an array of probe tips, each configured to contact the exposed substantially planar protective surface of the second electrode structure.
10. The molecular memory system of claim 9, further comprising an actuator coupled to the array of probe tips and configured to adjust the position of the probe tips to maintain contact between each probe tip and the exposed substantially planar surface of the second electrode structure.
11. The molecular memory system of claim 9, wherein the scanning assembly is configured to scan the probe tip array across the exposed substantially planar protective surface of the second electrode structure.
12. The molecular memory system of claim 11, further comprising a readwrite controller configured to control the application of voltage signals through the scanning assembly probe tips and between the first electrode structure and the electrodes of the second electrode structure.
13. The molecular memory system of claim 12, wherein the molecular recording layer has a memory property selectively holding first and second memory states with different current-voltage characteristics and exhibits transition between the first and second memory states upon application of a state-changing voltage across the recording layer.
14. The molecular memory system of claim 13, wherein the readwrite controller is configured to control application of a sensing voltage for determining a local memory state of the molecular recording layer and to control the application of a state-changing voltage for changing a local memory state of the molecular recording layer.
15. The molecular memory system of claim 1, further comprising a lubricant disposed over the exposed substantially planar protective surface of the second electrode structure.
16. A molecular memory method, comprising:
providing a first electrode structure;
disposing over the first electrode structure a recording medium having a molecular recording layer; and
disposing over the recording medium a second electrode structure having a substantially planar protective surface exposed for contact with a probe tip and comprising an array of spaced-apart electrodes separated by electrically insulating material.
17. A molecular memory method, comprising:
providing a molecular memory system comprising
a first electrode structure,
a second electrode structure having an exposed substantially planar protective surface and comprising an array of spaced-apart electrodes separated by electrically insulating material, and
a recording medium having a molecular recording layer disposed between the first electrode structure and the second electrode structure;
contacting a probe array against the exposed substantially planar protective surface of the second electrode structure; and
scanning the contacting probe tip array across the exposed substantially planar protective surface of the second electrode structure.
18. The molecular memory method of claim 17, wherein the probe tip array comprises an array of carbon nanotubes.
19. The molecular memory method of claim 17, wherein the molecular recording layer has a memory property selectively holding first and second memory states with different current-voltage characteristics and exhibits transition between the first and second memory states upon application of a state-changing voltage across the recording layer.
20. The molecular memory method of claim 19, further comprising applying across the molecular recording layer a sensing voltage for determining a local memory state of the molecular recording layer.
21. The molecular memory method of claim 19, further comprising applying across the molecular recording layer a state-changing voltage for changing a local memory state of the molecular recording layer.