1. A distributed acquisition apparatus, comprising:
a sampler component configured to receive a signal under test;
a plurality of analog-to-digital converters (ADCs) operationally coupled to the sampler component and configured to produce digitized samples of the signal under test;
a time-interleaved acquisition processing network including a plurality of interconnected distributed acquisition components, each distributed acquisition component including:
an acquisition memory configured to store a portion of the digitized samples; and
a first summer configured to de-interleave the digitized samples between the distributed acquisition components; and
a last distributed acquisition component associated with the interleaved processing network of distributed acquisition components, the last distributed acquisition component including an acquisition memory to store a portion of the digitized samples and a second summer configured to de-interleave the digitized samples, wherein the last distributed acquisition component is configured to receive the de-interleaved digitized samples from the plurality of distributed acquisition components and output a recombined coherent waveform.
2. The distributed acquisition apparatus of claim 1, further comprising:
a digital down-converter (DDC) section associated with the last distributed acquisition component, wherein the DDC section includes:
a mixer component configured to receive and multiply the recombined coherent waveform with a complex sinusoidal waveform, and to produce a mixed signal having mathematical real and imaginary parts;
a decimating filter coupled to the mixer component and configured to receive and filter the mixed signal; and
a down-sampler coupled to the decimating filter and configured to down-sample the mixed signal,
wherein the DDC section is configured to produce coherent down-converted complex in-phase and quadrature (IQ) data.
3. The distributed acquisition apparatus of claim 2, wherein the digital down-converter section includes a plurality of down-samplers and a plurality of decimating filters, wherein the plurality of down-samplers are interspersed between the plurality of decimating filters.
4. The distributed acquisition apparatus of claim 2, wherein the DDC section is configured to receive the recombined coherent waveform from the second summer of the last distributed acquisition component.
5. The distributed acquisition apparatus of claim 1, wherein the acquisition memory of the distributed acquisition components is configured to store real data samples.
6. The distributed acquisition apparatus of claim 1, wherein each of the distributed acquisition components includes an up-sampler coupled to the acquisition memory, and configured to up-sample the digitized samples by a factor M, wherein M is the total number of distributed acquisition components including the last acquisition component.
7. The distributed acquisition apparatus of claim 1, wherein each of the distributed acquisition components includes:
a digital down-converter (DDC) section, wherein each DDC section includes:
a mixer component configured to receive and multiply the corresponding portion of the digitized samples with a complex sinusoidal waveform, and to produce a mixed signal having mathematical real and imaginary parts;
a decimating filter coupled to the mixer component and configured to receive and filter the mixed signal; and
a down-sampler coupled to the decimating filter and configured to down-sample the mixed signal,
wherein each DDC section is configured to produce down-converted complex in-phase and quadrature (IQ) data.
8. The distributed acquisition apparatus of claim 7, wherein the digital down-converter section includes a plurality of down-samplers and a plurality of decimating filters, wherein the plurality of down-samplers are interspersed between the plurality of decimating filters.
9. The distributed acquisition apparatus of claim 7, wherein:
the first summer of each of the distributed acquisition components is coupled to an output of each corresponding DDC section, wherein the first summer is configured to de-interleave the down-converted data received from the DDC sections.
10. The distributed acquisition apparatus of claim 1, wherein each of the distributed acquisition components includes:
a mixer component coupled to an input of the corresponding acquisition memory, and configured to receive and multiply the corresponding portion of the digitized samples with a complex sinusoidal waveform, and to produce a mixed signal having mathematical real and imaginary parts;
a polyphase interpolation filter coupled to an output of the acquisition memory and configured to receive and filter the mixed signal; and
a down-sampler coupled to the corresponding polyphase interpolation filter and configured to down-sample the filtered signal.
11. The distributed acquisition apparatus of claim 10, wherein the polyphase interpolation filter includes a filter having the following frequency responses expressed as a z-transform:
H
m
\u2061
(
z
)
=
z
m
M
\xb7
H
\u2061
(
z
M
)
,
\u2062
m
\u2208
0
\u2062
:
\u2062
M
–
1
where H(z) is the desired digital down-conversion filter response for a given bandwidth span and target sample rate, m is the relative polyphase phase selected from 0 to M\u22121 for a given parallel branch of the polyphase filter, and M is the total number of distributed acquisition components in the interleaved processing network of distributed acquisition components including the last acquisition component.
12. The distributed acquisition apparatus of claim 11, further comprising a delay stage to compensate for the relative sampling phase offsets between distributed acquisition components.
13. The distributed acquisition apparatus of claim 11, wherein the filter has the overall frequency response expressed as the z-transform for cases where L is greater than or equal to M, where L is the down-sample factor for a given bandwidth span and associated sample rate.
14. The distributed acquisition apparatus of claim 1, wherein each of the distributed acquisition components includes:
an acquisition DDC section coupled to an input of the acquisition memory, wherein each acquisition DDC section includes:
a mixer component configured to receive and multiply the corresponding portion of the digitized samples with a complex sinusoidal waveform, and to produce a mixed signal having mathematical real and imaginary parts;
a decimating filter coupled to the mixer component and configured to receive and filter the mixed signal; and
a down-sampler coupled to the decimating filter and configured to down-sample the mixed signal by a factor of LM, wherein M is the total number of distributed acquisition components in the interleaved processing network of distributed acquisition components including the last acquisition component, and L is the down-sample factor for a given bandwidth span and associated sample rate; and
a complex finite impulse response (FIR) filter section coupled to an output of the corresponding acquisition memory, wherein each complex FIR filter section includes a fractional time-shift filter.
15. The distributed acquisition apparatus of claim 14, wherein the digital down-converter section includes a plurality of down-samplers and a plurality of decimating filters, wherein the plurality of down-samplers are interspersed between the plurality of decimating filters.
16. The distributed acquisition apparatus of claim 14, further comprising a second complex FIR filter coupled to the second summer of the last distributed acquisition component, wherein the second complex FIR filter is configured to produce filtered complex IQ data samples.
17. The distributed acquisition apparatus of claim 14, wherein the complex FIR filter section comprises a single complex FIR filter that combines a fractional time-shift and an arbitrary complex FIR filter in each section.
18. The distributed acquisition apparatus of claim 14, wherein each of the distributed acquisition components further includes a spin DDC section coupled to an output of the corresponding acquisition memory and to an input of the corresponding complex FIR filter section, wherein the acquisition DDC section is configured to operate in real-time prior to storing acquisition data to the corresponding acquisition memory, and wherein the spin DDC section is configured to process information received from the acquisition memory.
19. The distributed acquisition apparatus of claim 1, further comprising:
a spin DDC section coupled to the second summer of the last distributed acquisition component; and
a frequency transform section coupled to the spin DDC section, wherein the frequency transform section is configured to produce complex spectral samples in the frequency domain.
20. The distributed acquisition apparatus of claim 1, further comprising:
an acquisition buffer coupled to the second summer of the last distributed acquisition component; and
a frequency transform section coupled to the acquisition buffer, wherein the frequency transform is configured to produce complex spectral samples in the frequency domain.
21. The distributed acquisition apparatus of claim 1, wherein each of the distributed acquisition components includes:
an acquisition DDC section coupled to an input of the acquisition memory, wherein the acquisition DDC section includes:
a mixer component configured to receive and multiply the corresponding portion of the digitized samples with a complex sinusoidal waveform, and to produce a mixed signal having mathematical real and imaginary parts;
a decimating filter coupled to the mixer component and configured to receive and filter the mixed signal;
a down-converter coupled to the one or more decimating filters and configured to down-sample the mixed signal by a factor of LM, wherein M is the total number of distributed acquisition components in the interleaved processing network of distributed acquisition components including the last acquisition component, and L is the down-sample factor for a given bandwidth span and associated sample rate; and
a frequency transform section coupled to an output of the corresponding acquisition memory, wherein each frequency transform section is configured to produce complex spectral samples in the frequency domain.
22. The distributed acquisition apparatus of claim 21, wherein the digital down-converter section includes a plurality of down-samplers and a plurality of decimating filters, wherein the plurality of down-samplers are interspersed between the plurality of decimating filters.
23. The distributed acquisition apparatus of claim 21, wherein:
the first summer of each of the distributed acquisition components is coupled to an output of each corresponding frequency transform section, wherein the first summer is configured to de-interleave the complex spectral samples received from the frequency transform sections.
24. The distributed acquisition apparatus of claim 21, further comprising:
a spin DDC section coupled to an output of the acquisition memory and to an input of the frequency transform section.
25. The distributed acquisition apparatus of claim 1, further comprising:
a spin DDC section coupled to the second summer of the last distributed acquisition component; and
a complex FIR filter section coupled to the spin DDC section, wherein the complex FIR filter section includes a complex finite impulse response (FIR) filter to produce filtered complex IQ data samples.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An in-mold label, comprising:
a substrate;
a printed layer, formed on a first surface of the substrate for displaying printed content;
a heat-sealable layer, formed on a second surface of the substrate, and a plurality of interlaced and continuous-arranged micro-protrusions formed on the heat-sealable layer by a heating-embossing-cooling process for forming a plurality of blister-exhausting paths;
wherein, while the in-mold label is combined with surface of an article, the interlaced and continuous-arranged micro-protrusions on the heat-sealable layer effectively exhaust the blisters.
2. The in-mold label of claim 1, wherein the substrate is a base layer made of a thermoplastic resin material.
3. The in-mold label of claim 1, wherein the heat-sealable layer is made of a thermoplastic resin material.
4. The in-mold label of claim 3, wherein the interlaced and continuous-arranged micro-protrusions are formed by the heating-embossing-cooling process using a roller with surface structure.
5. The in-mold label of claim 1, wherein the in-mold label has a thickness of from 60 micrometer to 120 micrometer.
6. The in-mold label of claim 5, wherein the in-mold label has a density of from 0.50 gcm3 to 1.05 gcm3.
7. The in-mold label of claim 6, wherein the micro-protrusions are formed by various interlaced and continuous-arranged holes.
8. The in-mold label of claim 7, wherein the hole has a depth of from 8 micrometer to 14 micrometer.
9. The in-mold label of claim 8, wherein spacing among the holes is from 10 micrometer to 1000 micrometer.
10. The in-mold label of claim 9, wherein diameter of each micro-protrusion is from 1000 micrometer to 1600 micrometer.
11. A method for producing the in-mold label according to the claim 1, the method comprising:
providing a thermoplastic resin substrate;
applying a thermoplastic resin material on surface of the thermoplastic resin substrate;
providing an embossing apparatus with surface structure;
driving the embossing apparatus to perform a heating-embossing-cooling process, and form a plurality of interlaced and continuous-arranged micro-protrusions on the heat-sealable resin layer by the embossing apparatus with the surface structure; and
forming a printed layer, the thermoplastic resin substrate, and the heat-sealable resin layer, which are combined to form the in-mold label, on the thermoplastic resin substrate.
12. The producing method of claim 11, wherein the process of providing the thermoplastic resin substrate further comprises:
driving an extrusion machine to perform an extrusion process, including a heating process;
driving a cooling-molding wheel apparatus to perform a cooling process;
driving a longitudinal stretching apparatus to perform a longitudinal stretching process;
driving a transverse stretching apparatus to perform a transverse stretching process; and
driving a corona-treatment apparatus to perform a corona-treatment process;
whereby, the above processes are performed to produce the in-mold label substrate.
13. The method of claim 11, wherein the heating-embossing-cooling process is performed to form the in-mold label, and the interlaced and continuous-arranged micro-protrusions are formed by various interlaced and continuous-arranged holes.
14. The method of claim 13, wherein the hole has a depth of from 8 micrometer to 14 micrometer.
15. The method of claim 14, wherein spacing among the holes is from 10 micrometer to 1000 micrometer.
16. The method of claim 15, wherein diameter of each micro-protrusion is from 1000 micrometer to 1600 micrometer.