Author: claimsbot

1. A seat structure for a vehicle including a rear seat which is disposed in front of a load compartment at a vehicle rear, comprising:
a seat cushion;
a seat back;
a cover member to be disposed at a back side of said seat back,
wherein said seat cushion and said seat back are configured so as to be separate from each other, and said cover member is pivotally connected to a vehicle floor at the vicinity of a rear end of said seat cushion at a lower end thereof and to said seat back at an upper end thereof, around respective axes extending in a vehicle width direction,
whereby said seat back can be supported by said cover member so as to move forward and be located in a rising position thereof in front of said seat cushion and behind a front seat located before said rear seat according to a forward rotation of said cover member via the lower end pivotal connection to the vehicle floor, and said cover member is configured so as to cover substantially an upper face of said seat cushion and provide a substantially flat and horizontal face at the vehicle rear in cooperation with a floor of the load compartment when said seat back has moved forward.
2. The seat structure for a vehicle of claim 1, further comprising a guide member which is provided at a side face of said seat back so as to extend in a longitudinal direction of the seat back, wherein the upper end of said cover member to be pivotally connected to said seat back is configured so as to slide along said guide member with respect to said seat back.
3. The seat structure for a vehicle of claim 2, further comprising a link member which is pivotally connected to said seat back at one end thereof and to said cover member at other end thereof, whereby said seat back is configured so as to be held in said rising position thereof by said link member interconnecting said seat back with said cover member.
4. The seat structure for a vehicle of claim 3, wherein said seat back comprises a cushion member and a holding member to be provided so as to hold said cushion member and include said guide member, and said cover member includes a support frame to support said seat back so as to hold a passenger sitting.
5. The seat structure for a vehicle of claim 2, further comprising a support member which is pivotally connected to the vehicle floor at one end thereof and to said seat back at other end thereof so as to support said seat back along with said cover member.
6. The seat structure for a vehicle of claim 5, further comprising a link member which is pivotally connected to said support member at one end thereof and to said cover member at other end thereof, whereby said seat back is configured so as to be held in said rising position thereof by said support member with said cover member.
7. The seat structure for a vehicle of claim 6, wherein said seat back comprises a cushion member and a holding member to be provided so as to hold said cushion member and include said guide member, and said cover member includes a support frame to support said seat back so as to hold a passenger sitting.
8. The seat structure for a vehicle of claim 2, further comprising a biasing member to be interposed between said seat back and said cover member so as to resiliently bias away each other, and a fixing member to releasably fix said seat back to a sitting position for the passenger, whereby when said fixing member is released, said seat back can be rotated by said biasing member around the pivotal axis at the upper end of said cover member and supported by said cover member and said biasing member so as to move forward and be located in said rising position thereof.
9. The seat structure for a vehicle of claim 2, further comprising a biasing member to be interposed between said seat back and said cover member so as to resiliently bias away each other, and a fixing member to releasably fix said seat back to a sitting position for the passenger,
whereby when said fixing member is released, said seat back can be rotated by said biasing member around the pivotal axis at the upper end of said cover member and supported by said cover member and said biasing member so as to move forward and be located in said rising position thereof,
wherein said biasing member is configured of an expanding member which is pivotally connected to a back face of said seat back at an upper end thereof and to said vehicle floor near the rear end of said seat cushion at a lower end thereof, around respective axes extending in the vehicle width direction, and biases said seat back forward and upward.
10. The seat structure for a vehicle of claim 9, wherein said seat back comprises a cushion member and a holding member to be provided so as to hold said cushion member and include said guide member, and said cover member includes a support frame to support said seat back so as to hold a passenger sitting.
11. The seat structure for a vehicle of claim 2, further comprising a biasing member to be interposed between said seat back and said cover member so as to resiliently bias away each other, and a fixing member to releasably fix said seat back to a sitting position for the passenger,
whereby when said fixing member is released, said seat back can be rotated by said biasing member around the pivotal axis at the upper end of said cover member and supported by said cover member and said biasing member so as to move forward and be located in said rising position thereof,
wherein said biasing member is configured of a biasing piece which is pivotally connected to a back face of said seat back at one end thereof around an axis extending in the vehicle width direction and pushes against a face of the cover member which faces to the back face of said seat back by the other end thereof with a sliding contact therewith so as to bias said seat back forward.
12. The seat structure for a vehicle of claim 11, wherein said biasing piece is configured of a U-shaped frame, an open-end portion of which is pivotally connected to the back face of said seat back and a closed-end portion of which pushes against and slides over the face of the cover member which faces to the back face of said seat back.
13. The seat structure for a vehicle of claim 12, wherein said seat back comprises a cushion member and a holding member to be provided so as to hold said cushion member and include said guide member, and said cover member includes a support frame to support said seat back so as to hold a passenger sitting.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A touch panel device integrated with a liquid crystal display panel device, comprising:
a liquid crystal display panel;
a polarizer formed at a top surface of the liquid crystal display panel; and
a touch panel formed on the polarizer, the touch panel including a lower plate having, a separation tag extending outwardly from one side of the lower plate, such that when an upward force is applied on the separation tag, the touch panel separates from at least one side of the polarizer.
2. The touch panel device according to claim 1, wherein the touch panel includes:
a first electrode layer on an upper substrate of a upper plate;
a second electrode layer on the lower plate; and
a spacer formed between the upper plate and the lower plate.
3. The touch panel device according to claim 2, wherein the separation tag and the lower substrate are integrally formed.
4. The touch panel device according to claim 3, wherein the separation tag includes polyethylene terephthalate.
5. The touch panel device according to claim 2, wherein the first and the second electrode layers are formed of a transparent electrode and silver formed on the transparent electrode.
6. The touch panel device according to claim 1, wherein the liquid crystal display panel includes:
an upper plate bonded with the polarizer;
a lower plate facing the upper plate; and
a spacer for maintaining a specific gap between the upper plate and the lower plate.
7. The touch panel device according to claim 6, wherein the upper plate includes:
an upper substrate;
a black matrix formed on the upper substrate;
a color filter formed on the upper substrate where the black matrix is formed;
a common electrode formed on the color filter; and
a first alignment film formed covering the common electrode.
8. The touch panel device according to claim 6, wherein the polarizer is formed between the upper plate of the liquid crystal display panel and the lower plate of the touch panel.
9. The touch panel device according to claim 6, comprising:
a first adhesive formed between the polarizer and the lower plate of the touch panel; and
a second adhesive formed between the polarizer and the upper plate of the liquid crystal display panel.
10. The touch panel device according to claim 6, wherein the lower plate of the liquid crystal display panel includes:
a lower substrate;
a gate line formed on the lower substrate;
a data line formed crossing the gate line;
a thin film transistor formed at an intersection of the gate line and the data line;
a pixel electrode connected to the thin film transistor; and
a second alignment film formed covering the pixel electrode.
11. A method of fabricating a touch panel integrated liquid crystal display panel, comprising the steps of:
forming a liquid crystal display panel;
forming a polarizer at a top surface of the liquid crystal display panel; and
forming a touch panel on the polarizer, the touch panel including a lower plate having a separation tag extending outwardly from one side of the lower plate, such that when an upward force is applied on the separation tag, the touch panel separates from at least one side of the polarizer.
12. The method according to claim 11, further comprising the steps of:
forming a first electrode layer on an upper substrate of an upper plate of the touch panel;
forming a second electrode layer on the lower plate of the touch panel; and
forming a spacer between the upper plate and the lower plate.
13. The method according to claim 12, wherein the separation tag is formed of a same material as the lower substrate.
14. The method according to claim 13, wherein the separation tag includes polyethylene terephthalate.
15. The method according to claim 12, wherein the first and the second electrode layers are formed of a transparent electrode and silver Ag is formed on the transparent electrode.
16. The method according to claim 11, wherein the liquid crystal display panel includes:
an upper plate bonded with the polarizer;
a lower plate facing the upper plate; and
a spacer for maintaining a specific gap between the upper plate and the lower plate.
17. The method according to claim 16, wherein the upper plate of the liquid crystal display panel includes:
an upper substrate;
a black matrix formed on the upper substrate;
a color filter formed on the upper substrate where the black matrix is formed;
a common electrode formed on the color filter; and
a first alignment film formed covering the common electrode.
18. The method according to claim 17, wherein the lower plate of the liquid crystal display panel includes:
a lower substrate;
a gate line formed on the lower substrate;
a data line formed crossing the gate line;
a thin film transistor formed at an intersection of the gate line and the data line;
a pixel electrode connected to the thin film transistor; and
a second alignment film formed covering the pixel electrode.
19. The method according to claim 16, wherein the polarizer is formed between the upper plate of the liquid crystal display panel and the lower plate of the touch panel.
20. The method according to claim 16, comprising:
forming a first adhesive between the polarizer and the lower plate of the touch panel; and
forming a second adhesive between the polarizer and the upper plate of the liquid crystal display panel.

1. A plasma display apparatus comprising:
a plasma display panel having a scan electrode and a sustain electrode; and
a driver for overlapping a peak voltage portion of at least one of sustain pulses supplied to the scan electrode with a peak voltage portion of at least one of sustain pulses supplied to the sustain electrode,
wherein the driver ensures that a last sustain pulse supplied to the scan electrode and a last sustain pulse supplied to the sustain electrode overlap with each other, and wherein a width of the last sustain pulse supplied to the scan electrode is different from a width of the last sustain pulse supplied to the sustain electrode.
2. The plasma display apparatus as claimed in claim 1, wherein the driver controls a number of sustain pulses that are overlapped with each other based on a reference average picture level (APL) of one frame.
3. The plasma display apparatus as claimed in claim 1, wherein the sustain pulses are overlapped with each other, when a number of cells in an on state is 20% or less of all of the cells in one frame.
4. The plasma display apparatus as claimed in claim 1, wherein the width of the last sustain pulse supplied to the scan electrode is greater than the width of the last sustain pulse supplied to the sustain electrode.
5. The plasma display apparatus as claimed in claim 1, wherein the width of the last sustain pulse supplied to the scan electrode is 1.2 to 1.8 times greater than the width of the last sustain pulse supplied to the sustain electrode.
6. The plasma display apparatus as claimed in claim 1, wherein a length of a period when the last sustain pulse supplied to the scan electrode and the last sustain pulse supplied to the sustain electrode overlap with each other is 0.2 to 0.3 times smaller than the width of the last sustain pulse supplied to the scan electrode.
7. A plasma display apparatus comprising:
a plasma display panel having a scan electrode and a sustain electrode; and
a driver for overlapping a peak voltage portion of a last sustain pulse applied to the sustain electrode with a peak voltage portion of a last sustain pulse applied to the scan electrode in a sustain period,
wherein a width of the last sustain pulse applied to the scan electrode is different from a width of the last sustain pulse applied to the sustain electrode.
8. The plasma display apparatus as claimed in claim 7, wherein the width of the last sustain pulse applied to the scan electrode is greater than the width of the last sustain pulse applied to the sustain electrode.
9. The plasma display apparatus as claimed in claim 7, wherein a lowest voltage of the last sustain pulse is applied to the scan electrode while the highest voltage of the last sustain pulse is applied to the sustain electrode.
10. A driving method of a plasma display apparatus, comprising:
supplying a scan pulse to a scan electrode in an address period; and
causing a peak voltage portion of at least one sustain pulse supplied to the scan electrode and a peak voltage portion of at least one sustain pulse supplied to a sustain electrode in a sustain period subsequent to the address period to overlap with each other,
wherein a last sustain pulse supplied to the scan electrode and a last sustain pulse supplied to the sustain electrode overlap with each other, and wherein a width of the last sustain pulse supplied to the scan electrode is substantially same as a width of the last sustain pulse supplied to the sustain electrode.
11. The driving method as claimed in claim 10, wherein a number of sustain pulses that are overlapped with each other is controlled based on a reference average picture level (APL) of one frame.
12. The driving method as claimed in claim 10, wherein the sustain pulses are overlapped with each other, when a number of cells in an on state is 20% or less of all of the cells in one frame.
13. The driving method as claimed in claim 10, wherein a width of the last sustain pulse supplied to the scan electrode is greater than a width of the last sustain pulse supplied to the sustain electrode.
14. The driving method as claimed in claim 10, wherein a width of the last sustain pulse supplied to the scan electrode is 1.2 to 1.8 times greater than a width of the last sustain pulse supplied to the sustain electrode.
15. The driving method as claimed in claim 10, wherein a length of a period when the last sustain pulse supplied to the scan electrode and the last sustain pulse supplied to the sustain electrode overlap with each other is 0.2 to 0.3 times smaller than a width of the last sustain pulse supplied to the scan electrode.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A semiconductor package comprising a lower package and an upper package stacked on the lower package, wherein the lower package includes:
a package substrate having upper and lower surfaces;
a semiconductor chip disposed on the upper surface of the package substrate;
a mold layer encapsulating the semiconductor chip; and
a residual stress layer disposed on the semiconductor chip, wherein the residual stress layer includes a plastically deformed surface,
wherein the residual stress layer has a residual stress to counterbalance warpage of the lower package.
2. The semiconductor package of claim 1, wherein the semiconductor chip includes an exposed surface not covered by the mold layer, and the residual stress layer is in contact with the exposed surface of the semiconductor chip.
3. The semiconductor package of claim 2, wherein the plastically deformed surface of the residual stress includes a plurality of first dents.
4. The semiconductor package of claim 3, wherein the plastically deformed surface of the residual stress layer has first roughness, and an upper surface of the mold layer has second roughness less than the first roughness.
5. The semiconductor package of claim 3, wherein the upper surface of the mold layer includes a plurality of second dents.
6. The semiconductor package of claim 5, wherein the plastically deformed surface includes first roughness caused by the plurality of first dents, and the upper surface of the mold layer includes second roughness caused by the plurality of second dents, and the second roughness is greater than the first roughness.
7. The semiconductor package of claim 2, wherein the upper surface of the mold layer is substantially coplanar with the exposed surface of the semiconductor chip, and the residual stress layer further extends onto the upper surface of the mold layer.
8. The semiconductor package of claim 1, wherein a lower surface of the package substrate includes a plurality of third dents.
9. The semiconductor package of claim 8, wherein the package substrate further comprises a pad, wherein a surface of the pad is a part of the lower surface of the package substrate.
10. The semiconductor package of claim 9, wherein roughness of the surface in the pad is less than roughness of the lower surface other than the surface of the pad.
11. A semiconductor package comprising:
a lower package including a lower semiconductor chip, a lower package substrate and a lower mold layer, wherein the lower semiconductor chip is mounted on the lower package substrate and the lower mold layer encapsulates the lower semiconductor chip;
an upper package stacked on the lower package, wherein the upper package includes an upper semiconductor chip, an upper package substrate and an upper mold layer and wherein the upper semiconductor chip is mounted on the upper package substrate and the upper mold layer encapsulates the upper semiconductor chip; and
a residual stress layer having a residual stress to counterbalance warpage of the lower package, wherein the residual stress layer is in contact with the lower package, and wherein the residual stress layer includes a plurality of first dents.
12. The semiconductor package of claim 11, wherein the residual stress layer is interposed between the lower package and the upper package.
13. (canceled)
14. The semiconductor package of claim 12, wherein the lower semiconductor chip includes an exposed surface, wherein the exposed surface of the lower semiconductor chip is not covered by the lower mold layer and faces the upper package, and wherein the residual layer covers the exposed surface of the lower semiconductor chip.
15. The semiconductor package of claim 14, wherein the lower mold layer includes an upper surface substantially coplanar with the exposed surface of the lower semiconductor chip, and wherein the residual stress layer further covers at least a portion of the upper surface of the lower mold layer.
16.-18. (canceled)
19. The semiconductor package of claim 14, wherein the upper surface of the lower mold layer includes a plurality of second dents, and wherein roughness of the upper surface of the lower mold layer is greater than roughness of a surface of the residual stress layer, wherein the surface of the residual stress layer faces the upper package.
20.-36. (canceled)
37. A semiconductor package comprising:
a lower package;
an upper package stacked on the lower package, wherein the lower package includes a surface having a plurality of dents.
38. The semiconductor package of claim 37, wherein the lower package includes a lower semiconductor chip, a lower package substrate and a lower mold layer,
wherein the lower semiconductor chip is mounted on an upper surface of the lower package substrate and the lower mold layer encapsulates the lower semiconductor chip,
wherein the plurality of dents is formed on an upper surface of the lower semiconductor chip and an upper surface of the lower mold layer, and
wherein the plurality of dents faces the upper package.
39. The semiconductor package of claim 37, wherein the lower package include a metal layer, a lower semiconductor chip, a lower package substrate and a lower mold layer,
wherein the lower semiconductor chip is mounted on an upper surface of the lower package substrate and the lower mold layer encapsulates the lower semiconductor chip,
wherein the metal layer is in contact with the lower semiconductor chip,
wherein the plurality of dents is formed on an upper surface of the metal layer, and wherein the plurality of dents faces the upper package.
40. The semiconductor package of claim 39, wherein the plurality of dents is further formed on an upper surface of the lower mold layer.
41. The semiconductor package of claim 39, wherein the plurality of dents is further formed on a lower surface of the lower semiconductor substrate.