Author: claimsbot

What is claimed is:

1. A process for preparing a compound of formula (3)
99
wherein
R1 is selected from the group consisting of hydrogen, an amino protecting group, and OR2;
R2 is hydrogen or a hydroxy protecting group;
L1 is O or N(R3), wherein R3 is hydrogen or an amino protecting group;
and
X is O or S,
the process comprising:

(a) reacting a compound of formula (2)
100
wherein
R4 is a carboxyl protecting group,
with a reducing agent to provide a first reaction mixture;
and
(b) adjusting the pH of the first reaction mixture to about 2 to about 6;
and
(c) isolating the compound of formula (3).
2. The process of claim 1 further comprising reacting a compound of formula (1)
101
a base, and a reagent selected from the group consisting of phosgene, thiophosgene, triphosgene, carbonyldiimidazole, thiocarbonyldiimidazole, and a dialkyl carbonate.
3. The process of claim 1, wherein the compound of formula (3) is (4R)-4-(hydroxymethyl)-1,3-oxazolidin-2-one.
4. A process for preparing a compound of formula (5-a)
102
or
a compound of formula (5-b)
103
wherein
Q1 is selected from the group consisting of halide, methanesulfonate, and trifluoromethanesulfonate;
Y is nitrogen or C(H);
R6 is selected from the group consisting of alkoxy, alkoxyalkyl, alkyl, aminosulfonyl, aminosulfonylalkyl, aryl, arylalkyl, cyano, cyanoalkyl, halo, haloalkyl, (heterocycle)oxy, (heterocycle)oxyalkyl, hydroxy, hydroxyalkyl, phenylalkoxy, phenylalkoxyalkyl phenoxy, phenoxyalkyl, perfluoroalkoxy, perfluoroalkoxyalkyl, perfluorothioalkoxy, perfluorothioalkoxyalkyl, sulfinyl, sulfinylalkylsulfonyl, sulfonylalkyl, thioalkoxy, and thioalkoxyalkyl;
and
L2 is O or S,
the process comprising:

(a) activating the hydroxyl of the compound of formula (3)
104
(b) reacting the product of step (a), a compound of formula (4)
105
and base to provide the compound of formula (5-a)
106
(c) optionally oxidizing the product of step (b);
and
(d) optionally reacting the product of step (b) or step (c) and a compound of formula (6)
107
wherein
Q2 is selected from the group consisting of trialkylstannanes, boronic acid, boronic esters, magnesium halides, zinc halides, and silyl(alkyl)cyclobutanes,
and a coupling catalyst.
5. The process of claim 4, wherein the compound of formula (5-a) is (4R)-4-((4-bromophenoxy)methyl)-1,3-oxazolidin-2-one and the compound of formula (5-b) is (4R)-4-(((4-(trifluoromethoxy)(1,1-biphenyl)-4-yl)oxy)methyl)-1,3-oxazolidin-2-one.
6. A process for preparing a compound of formula (5-c)
108
the process comprising:
(a) reacting a compound of formula (7)
109
wherein
R4 is alkyl,
a compound of formula (4)
110
and base to provide a compound of formula (8)
111
(b) optionally reacting the product from step (a) and an oxidant;
(c) reacting the product of step (a) or step (b), hydrogen, and a hydrogenation catalyst to provide a compound of formula (9)
112
(d) reacting the product from step (c) and base to provide a compound of formula (10)
113
(e) reacting the product from step (d) and a compound of formula H2NOR2, or a salt thereof,
wherein
R2 is a hydroxyl protecting group,
under dehydrating conditions to provide a compound of formula (11)
114
(f) reacting the product of step (e) under Mitsunobu conditions to provide a compound of formula (12)
115
(g) reacting the product from step (f) and base to provide a compound of formula (13)
116
and
(h) reacting the product from step (g) and azide under dehydrating conditions.
7. The process of claim 6, wherein the compound of formula (5-c) is (5R)-1-(benzyloxy)-5-((4-bromophenoxy)methyl)-2-imidazolidinone.
8. A process for preparing a compound of formula (15)
117
wherein
R5 is Q1 or
118
the process comprising:

(a) reacting a compound of formula (5)
119
and base.
9. The process of claim 8, wherein the compound of formula (15) is selected from the group consisting of
(2S)-2-amino-3-((4-(trifluoromethoxy)(1,1-biphenyl)-4-yl)oxy)-1-propanol,
(2S)-2-amino-3-(4-bromophenoxy)-1-propanol,
and
(2R)-2-((benzyloxy)amino)-3-(4-bromophenoxy)-1-propanamine.
10. A process for preparing of a compound of formula (20),
120
or a salt thereof,
wherein
R7 and R8, together with the atoms to which they are attached, form a heterocycle selected from the group consisting of 5,5-dimethyl-1,3-oxazolidine-2,4-dionyl; 1-methyl-2,4-imidazolidinedionyl; 1,5,5-trimethyl-2,4-imidazolidinedionyl; 2,4-imidazolidinedionyl; 5,5-dimethyl-2,4-imidazolidinedionyl; 1,2-dimethyl-1,2,4-triazolidine-3,5-dionyl; 4,4-dimethyl-2,6-piperidinedione; 8-azaspiro(4.5)decane-7,9-dionyl; 3a,6-dihydro-1H-benzo(de)isoquinoline-1,3(2H)-dionyl; 2,4(1H,3H)-quinazolinedionyl; 1-methyl-2,4(1H,3H)-pyrimidinedionyl;
and 1,1-dioxo-1,2-benzisothiazol-3(2H)-onyl,
the process comprising:

(a) reacting a compound of formula (15-a)
121
and a compound of formula R9CHO,
wherein
R9 is optionally substituted aryl,
to provide a compound of formula (16)
122
(b) reacting the product of step (a) and a compound of formula (17) under Mitsunobu conditions
123
to provide a compound of formula (18)
124
(c) reacting the product of step (b) and an oxaziridine forming agent to provide a compound of formula (19)
125
(d) reacting the product of step (c) and a compound of formula H2NOR2, or a salt thereof, and base;
and
(e) optionally deprotecting the product of step (d).
11. The process of claim 10, wherein the compound of formula (20) is selected from the group consisting of
3-((2S)-2-(hydroxyamino)-3-((4-(trifluoromethoxy)(1,1-biphenyl)-4-yl)oxy)propyl)-5,5-dimethyl-2,4-imidazolidinedione
and
3-((2S)-3-(4-bromophenoxy)-2-(hydroxyamino)propyl)-5,5-dimethyl-2,4-imidazolidinedione.
12. A process for preparing of a compound of formula (20-b)
126
or a salt thereof
the process comprising:
(a) reacting the compound of formula (20-a)
127
the coupling catalyst, and the compound of formula (6)
128
13. The process of claim 12, wherein the compound of formula (20-b) is 3-((2S)-2-(hydroxyamino)-3-((4-(trifluoromethoxy)(1,1-biphenyl)-4-yl)oxy)propyl)-5,5-dimethyl-2,4-imidazolidinedione.
14. A process for preparing of a compound of formula (20-c)
129
or a salt thereof,
the process comprising:
(a) reacting a compound of formula (15-b)
130
and a compound of formula (21)
131
to provide a compound of formula (22)
132
and
(b) reacting the product from step (a) and acid.
15. The process of claim 14, wherein the compound of formula (20-c) is 3-((2R)-2-((benzyloxy)amino)-3-(4-bromophenoxy)propyl)-5,5-dimethyl-2,4-imidazolidinedione.
16. A process for preparing a compound of formula (23)
133
the process comprising:
(a) N-formylating the compound of formula (20);
and
(b) optionally deprotecting the product of step (a).
17. The process of claim 16, wherein the compound of formula (23) is selected from the group consisting of
(1S)-2-(4,4-dimethyl-2,5-dioxo-1-imidazolidinyl)-1-(((4-(trifluoromethoxy)(1,1-biphenyl)-4-yl)oxy)methyl)ethyl(hydroxy)formamide
and
benzyloxy((1R)-2-(4-bromophenoxy)-1-((4,4-dimethyl-2,5-dioxo-1-imidazolidinyl)methyl)-ethyl)formamide.
18. A process for preparing a compound of formula (23-b)
134
the process comprising:
(a) reacting a compound of formula (23-a)
135
the coupling catalyst, and the compound of formula (6)
136
and
(b) optionally deprotecting the product of step (a).
19. The process of claim 18, wherein the compound of formula (23-b) is 4-(((2R)-2-((benzyloxy)(formyl)amino)-3-(4,4-dimethyl-2,5-dioxo-1-imidazolidinyl)-propyl)oxy)-4-(trifluoromethoxy)-1,1-biphenyl.
20. A process for preparing a compound of formula (23-b)
137
the process comprising:
(a) reacting a compound of formula (1)
138
a base, and a reagent selected from the group consisting of phosgene, thiophosgene, triphosgene, carbonyldiimidazole, thiocarbonyldiimidazole, and a dialkyl carbonate to provide a compound of formula (2);
139
(b) reacting the product of step (a) with a reducing agent to provide a compound of formula (3);
140
(c) activating the hydroxyl of the product of step (b);
(d) reacting the product of step (c) with base and a compound of formula (4)
141
to provide a compound of formula (5-a),
142
(e) optionally oxidizing the product of step (d);
(f) reacting the product of step (d) or step (e), a coupling catalyst, and a compound of formula (6)
143
to provide a compound of formula (5-b),
144
(g) reacting the product of step (f) with base to provide a compound of formula (15),
145
(h) reacting the product of step (g) with a compound of formula R9CHO, to provide a compound of formula (16),
146
(i) reacting the product of step (h) with a compound of formula (17)
147
to provide a compound of formula (18)
148
(j) reacting the product of step (i) and an oxaziridine forming agent to provide a compound of formula (19)
149
(k) reacting the product of step (j) with H2NOR2, or a salt thereof, and base to provide a compound of formula (20-b);
150
(l) N-formylating the product from step (k) to provide a compound of formula (23-b);
151
and
(m) optionally deprotecting the product of step (l).
21. A process for the preparation of a compound of formula (23-b)
152
the process comprising:
(a) reacting a compound of formula (1)
153
a base, and a reagent selected from the group consisting of phosgene, thiophosgene, triphosgene, carbonyldiimidazole, thiocarbonyldiimidazole, and a dialkyl carbonate, to provide a compound of formula (2);
154
(b) reacting the product of step (a) with a reducing agent to provide a compound of formula (3);
155
(c) activating the hydroxyl of the product of step (b);
(d) reacting the product of step (c) with base and a compound of formula (4)
156
to provide a compound of formula (5-a),
157
(e) optionally oxidizing the product of step (d);
(f) reacting the product of step (e) with base to provide a compound of formula (15),
158
wherein
R5 is Q1;
(g) reacting the product of step (f) with a compound of formula R9CHO to provide a compound of formula (16),
159
wherein
R5 is Q1;
(h) reacting the product of step (g) with a compound of formula (17)
160
to provide a compound of formula (18)
161
wherein R5 is Q1;

(i) reacting the product of step (h) with an oxaziridine forming agent to provide a compound of formula (19)
162
wherein
R5 is Q1;
(j) reacting the product of step (i) with H2NOR2, or a salt thereof, and base to provide a compound of formula (20);
163
wherein
R5 is Q1;
(k) reacting the product of step (j) with a coupling catalyst and a compound of formula (6)
164
to provide a compound of formula (20),
165
wherein
R5 is
166
(l) N-formylating the product from step (k) to provide a compound of formula (23)
167
wherein
R5 is
168
and
(m) optionally deprotecting the product of step (l).
22. A process for the preparation of a compound of formula (23)
169
wherein
R2 is hydrogen;
and
170
R5 is
the process comprising:

(a) reacting a compound of formula (7)
171
a compound of formula (4)
172
and base to provide a compound of formula (8)
173
(b) optionally oxidizing the product from step (a);
(c) hydrogenating the product of step (a) or step (b) to provide a compound of formula (9)
174
(d) reacting the product from step (c) with base to provide a compound of formula (10)
175
(e) reacting the product from step (d) with H2NOR2 or a salt thereof, wherein R2 is a a hydroxyl protecting group, under dehydrating conditions to provide a compound of formula (11)
176
wherein
R2 is a hydroxyl protecting group;
(f) reacting the product of step (e) under Mitsunobu conditions to provide a compound of formula (12)
177
wherein
R2 is a hydroxyl protecting group;
(g) reacting the product from step (f) with base to provide a compound of formula (13)
178
(h) activating the product from step (g) with azide to provide a compound of formula (5-c);
179
wherein
R2 is a hydroxyl protecting group;
(i) reacting the product from step (h) with base to provide a compound of formula (15)
180
wherein
R1 is OR2;
R2 is a hydroxyl protecting group;
R5 is Q1;
and
L1 is NH;
(j) reacting the product from step (i) with a compound of formula (21)
181
to provide a compound of formula (22)
182
wherein
R2 is a hydroxyl protecting group;
(k) reacting the product from step (j) with acid to provide a compound of formula (20-c)
183
wherein
R2 is a hydroxyl protecting group;
(l) N-formylating the product from step (k) to provide a compound of formula (23)
184
wherein
R2 is a hydroxyl protecting group;
(m) reacting the product from step (l) with a coupling catalyst and a compound of formula (6)
185
to provide a compound of formula (23)
186
wherein
R2 is a hydroxyl protecting group R5 is
187
and
(n) deprotecting the product of step (m).

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An image denoising method, comprising the steps of:
sequentially selecting a pixel in an image as a current pixel, wherein pixels around the current pixel are defined as neighborhood pixels;
dynamically determining a current search block enclosing the current pixel and a strength parameter, and determining a comparison block for each of the pixels in the current search block, wherein the comparison block encloses the each pixel;
pre-denoising the comparison blocks for the pixels in the current search block;
comparing the pre-denoised comparison blocks for the neighborhood pixels with the pre-denoised comparison block for the current pixel to obtain a similarity between each of the neighborhood pixels and the current pixel in the current search block;
determining a weighting for each of the neighborhood pixels related to the current pixel according to the strength parameter, the similarity and a distance between the each neighborhood pixel and the current pixel in the current search block; and
weighted averaging each of the neighborhood pixels and the current pixel in the current search block according to the weighting to obtain a reconstruction value of the current pixel,
wherein the step of dynamically determining comprises:
determining a maximal search block enclosing the current pixel and a comparison block for each of the pixels in the maximal search block, wherein the comparison block encloses the each pixel;
calculating the ratios of the edge pixels for the sub-search blocks in the maximal search block; and
selecting the sub-search block that has the smallest ratio of the edge pixels as the current search block and determining the strength parameter according to the ratio of the edge pixels of the current search block.
2. The image denoising method as claimed in claim 1, wherein the step of calculating the ratios of the edge pixels for the sub-search blocks in the maximal search block comprises:
pre-denoising the comparison blocks for the pixels in the maximal search block;
calculating a sum of the absolute values of the differences between the pixels in the comparison blocks not to be pre-denoised for the pixels in the maximal search block and the corresponding pixels in the pre-denoised comparison blocks;
determining the pixel to be an edge pixel when the sum of the absolute values of the differences is greater than a predetermined threshold value; and
calculating the ratios of the edge pixels for the sub-search blocks in the maximal search block according to the determined result.
3. The image denoising method as claimed in claim 2, wherein the pre-denoising is performed by a mean filter or a neighborhood filter.
4. The image denoising method as claimed in claim 2, wherein the sub-search blocks have sizes of (n\u22122m)\xd7(n\u22122m), n is the side length of the maximal search block and n is zero or an integer.
5. The image denoising method as claimed in claim 4, wherein the smallest sub-search block has a size of 3\xd73 and the largest sub-search block is equal to the maximal search block.
6. The image denoising method as claimed in claim 1, wherein the largest sub-search block has a size of 7\xd77.
7. The image denoising method as claimed in claim 1, wherein when the ratio of edge pixels is higher, the strength parameter is smaller, and when the ratio of edge pixels is lower, the strength parameter is larger.
8. The image denoising method as claimed in claim 1, wherein the current search block and comparison block have a shape of square, rectangle, rhombus, circle or ellipse.
9. The image denoising method as claimed in claim 1, further comprising:
determining whether reconstruction values for all the pixels in the image have been obtained.
10. The image denoising method as claimed in claim 1, wherein the similarity is a sum of the squared differences between the pixels in the pre-denoised comparison block for the neighborhood pixel and the corresponding pixels in the pre-denoised comparison block for the current pixel.

1. A system for detecting motion and providing an audible alert to a location being monitored by a video camera, the system comprising:
a central processing unit (CPU);
at least one video camera in communication with the CPU, each video camera monitoring an area and transmitting a video signal of the area to the CPU; and
at least one audio output device (AOD) in communication with the CPU, each AOD producing an output and providing the output to at least one of the areas;
wherein the CPU is programmed to analyze at least one of the video signals from the at least one video camera to detect whether there is motion in at least one of the areas and transmits an audio file to the at least one AOD producing an output to the at least one of the areas in which motion is detected.
2. The system according to claim 1, wherein:
the CPU is a digital video recorder.
3. The system according to claim 1, wherein:
the CPU is a personal computer.
4. The system according to claim 1, wherein:
the CPU detects motion by analyzing pixels of the video signal of the at least one video camera for changes.
5. The system according to claim 1, wherein:
the CPU is programmed to store in memory the video signal of the at least one video camera.
6. The system according to claim 1, wherein the system comprises:
a plurality of video cameras; and
each video camera monitors an area that does not overlap with the area monitored by any other video camera.
7. The system according to claim 1, wherein:
the at least one AOD is a speaker.
8. The system according to claim 1, wherein:
the audio file is amplified.
9. The system according to claim 1, wherein:
the audio file is a .wav file.
10. The system according to claim 1, wherein:
the audio file is a warning message that the area is under camera surveillance.
11. The system according to claim 1, wherein:
the audio file is a message about product on display in the area.
12. The system according to claim 1, wherein:
the CPU includes a second AOD; and
the CPU is programmed to output a second audio file via the second AOD when the CPU detects that there is motion in at least one of the areas.
13. The system according to claim 12, wherein:
the second audio file is a .wav file.
14. The system according to claim 12, wherein:
the second audio file is a tone.
15. The system according to claim 12, wherein:
the second audio file is a message that motion has been detected in the area.
16. The system according to claim 1, wherein:
the CPU is programmed to energize a visual display device in at least one of the areas when the CPU detects motion in at least one of the areas.
17. The system according to claim 15, wherein:
the visual display device is a strobe light.
18. A system for detecting motion and providing an audible alert to a location being monitored by a video camera, the system comprising:
at least one video camera, each video camera having an internal central processing unit (CPU), each of the cameras monitoring an area and producing a video signal of the area;
at least one audio output device (AOD) in communication with a corresponding one of the at least one video camera, each AOD capable of producing an output and providing the output to the area monitored by the corresponding one of the at least one video camera;
wherein the CPU is programmed to analyze at least one of the video signals to detect whether there is motion in at least one of the areas and transmits an audio file to at least one of the AODs producing an output to the at least one of the areas in which motion is detected.
19. The system according to claim 18, wherein:
the CPU detects motion by analyzing pixels of at least one of the video signals for changes.
20. The system according to claim 18, wherein:
the CPU is programmed to store in memory at least one of the video signals.
21. The system according to claim 18, wherein the system comprises:
a plurality of video cameras; and
each video camera monitors an area that does not overlap with the area monitored by any other video camera.
22. The system according to claim 18, wherein:
the at least one AOD is a speaker.
23. The system according to claim 18, wherein:
the audio file is amplified.
24. The system according to claim 18, wherein:
the audio file is a .wav file.
25. The system according to claim 18, wherein:
the audio file is a warning message that the area is under camera surveillance.
26. The system according to claim 18, wherein:
the audio file is a message about a product on display in the area.
27. The system according to claim 18, wherein:
each camera has an internal AOD; and
the CPU is programmed to output a second audio file via the internal AOD when the CPU detects that there is motion in at least one of the areas monitored by at least one of the video cameras.
28. The system according to claim 27, wherein:
the second audio file is a .wav file.
29. The system according to claim 27, wherein:
the second audio file is a tone.
30. The system according to claim 25, wherein:
the second audio file is a message that motion has been detected in the area.
31. The system according to claim 18, wherein:
the CPU is programmed to energize a visual display device in at least one of the areas when the CPU detects motion in at least one of the areas.
32. The system according to claim 31, wherein:
the visual display device is a strobe light.
33. A method of monitoring a location and providing an audible alert, comprising:
monitoring at least one area using one or more video cameras;
transmitting at least one video signal of the at least one area to a central processing unit (CPU);
providing at least one audio output device (AOD) in the at least one area;
detecting motion in the at least one area; and
outputting an audio file over the at least one AOD the at least one area when motion is detected in the at least one area.
34. The method according to claim 33, wherein:
the CPU is a digital video recorder.
35. The method according to claim 33, wherein:
the CPU is a personal computer.
36. The method according to claim 33, wherein:
the CPU is located inside the video cameras.
37. The method according to claim 33, wherein:
the at least one AOD is a speaker.
38. The method according to claim 33, wherein:
the step of detecting motion is performed by analyzing pixels of the at least one video signal for changes.
39. The method according to claim 33, further comprising:
storing at least one of the video signals in memory.
40. The method according to claim 33, wherein:
the audio file is a .wav file.
41. The method according to claim 33, wherein:
the audio file is a warning message that the at least one area is under camera surveillance.
42. The method according to claim 33, wherein:
the audio file is a message about product on display in the at least one area.
43. The method according to claim 33, further comprising:
providing a second AOD that is housed with the CPU; and
outputting a second audio file via the second AOD when motion is detected in the at least one area.
44. The method according to claim 43, wherein:
the second audio file is a .wav file.
45. The method according to claim 43, wherein:
the second audio file is a tone.
46. The method according to claim 43, wherein:
the second audio file is a message that motion has been detected in the area.
47. The method according to claim 33, further comprising:
providing a light visible in the at least one area; and
energizing a visual display device located in the at least one area when motion is detected in the at least one area.
48. The method according to claim 44, wherein:
the visual display device is a strobe light.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A circuit comprising a first circuit portion (52) controllable by first and second inputs, and a second circuit portion (54) for generating the second input, characterized in that
the first circuit portion (52) has first operating characteristics when the second input (invPn) is provided as control input, and second operating characteristics when the second input (invPn) is not provided as control input, and wherein the second circuit portion (54) is adapted to cease functioning through ageing before the end of the lifetime of the first circuit portion (52) thereby to switch the first circuit portion from the first to the second operating characteristics.
2. A circuit as claimed in claim 1, wherein the first input comprises a first clocked power supply line (Pn) and the second input (invPn) comprises an inverted version of the first clocked power supply line (Pn), wherein the second circuit portion (54) comprises an inverter (70,72) for generating the inverted version of the first clocked power line voltage.
3. A shift register circuit comprising a plurality of stages provided on a common substrate, each stage being controlled by the first clocked power supply line (Pn) and the inverted version (invPn) of the first clock power supply line, wherein each stage comprises a circuit as claimed in claim 2, and wherein the circuit is adapted to pass selected high clock phases of the first clocked power supply line to the output.
4. A shift register circuit as claimed in claim 3, wherein each stage comprises:
a first input (Rn\u22121) connected to the output of a preceding stage;
a drive transistor (Tdrive) for coupling a first clocked power line voltage (Pn) to the output (Rn) of the stage;
a compensation capacitor (C1) for compensating for the effects of a parasitic capacitance of the drive transistor and connected at one terminal to an inverted version (invPn) of the first clocked power line voltage; and
a first bootstrap capacitor (C2) connected between the gate of the drive transistor and the output (Rn) of the stage,
wherein the inverter is formed on the common substrate.
5. A circuit as claimed in claim 4, wherein the inverter comprises a pull up transistor (70) connected between the inverter output and a high voltage rail and a pulldown transistor (72) connected between the inverter output and a low voltage rail.
6. A circuit as claimed in claim 5, wherein the pulldown transistor (72) is gated by the first clocked power line voltage.
7. A circuit as claimed in claim 5, wherein the pull up and pulldown transistors operate with approximately 50% duty cycle.
8. A circuit as claimed in claim 5, wherein the pulldown transistor (72) is larger than the pull up transistor (70).
9. A circuit as claimed in claim 5, wherein the pull up and pull down transistors are designed to cease functioning through ageing at approximately the same time (78).
10. A circuit as claimed in 5, wherein after the inverter ceases functioning (78), a portion of the first clocked power line voltage is coupled to the output through a parasitic capacitance (CGD) of the pulldown (72) transistor, which is dominant over a parasitic capacitance of the pull up transistor.
11. A circuit as claimed in claim 4, wherein each stage further comprises:
an input transistor (Tin1) for charging the first bootstrap capacitor (C2) and controlled by the first input (Rn\u22121).
12. A circuit as claimed in claim 4, wherein each stage further comprises an input section (10) coupled to the output (Rn\u22122) of the stage two or more stages before the stage, and wherein the input section comprises a second bootstrap capacitor (C3) connected between the gate of the input transistor (Tin1) and the first input (Rn\u22121).
13. A circuit as claimed in claim 12, wherein the input section is coupled to the output (Rn\u22122) of the stage two stages before the stage.
14. A circuit as claimed in claim 4, wherein each stage further comprises a second input (Rn+1) connected to the output of the next stage.
15. A circuit as claimed in claim 4, wherein the compensation capacitor (C1) of each stage is connected between the gate of the drive transistor and the inverted version (invPn) of the first clocked power line voltage.
16. A circuit as claimed in claim 1, implemented using amorphous silicon technology.
17. An active matrix display device, comprising:
an array of active matrix display pixels;
row driver circuitry comprising a shift register circuit as claimed in claim 3.
18. An active matrix display device as claimed in claim 17, comprising an active matrix liquid crystal display device.
19. A method of operating a circuit comprising:
using a second circuit portion (54) to generate from a first input (Pn) a second input (invPn);
controlling a first circuit portion (52) using the first and second inputs to provide first operating characteristics;
characterized by ceasing functioning of the second circuit portion (54) through ageing of the second circuit portion, before the end of the lifetime of the first circuit portion (52), thereby controlling the first circuit portion without the second input, and thereby providing second operating characteristics.
20. A method of generating multiple stage shift register circuit outputs, comprising, for each stage of the shift register circuit, using the method of claim 19,
wherein the method comprises using the output of the stage one or more stages before the stage to charge the gate of a drive transistor (Tdrive) through an input transistor (Tin1) and to charge a first bootstrap capacitor (C2) storing the gate-source voltage of the drive transistor; and
coupling a first clocked power supply line voltage (Pn) to the output of the stage through the drive transistor, the first clocked power supply line voltage comprising the first input,
and wherein the second input comprises an inverted version (invPn) of the first clocked power line voltage, the second circuit portion comprising an inverter (70,72) for generating the inverted version of the first clocked power line voltage, and wherein the second input (invPn) is coupled through a compensation capacitor (C1) to the gate of the drive transistor.
21. A method as claimed in claim 20, wherein the ceasing use comprises operating the inverter (70,72) for a time period sufficient that ageing of the components of the inverter result in failure of the inverter function.
22. A method as claimed in claim 20, further comprising using the output (Rn\u22122) of the stage two or more stages before the stage to charge the gate of an input transistor (Tin1), and storing the gate-source voltage on a second bootstrap capacitor (C3).