Author: claimsbot

1. A workout device comprising:
a frame;
an activating assembly having a pedal connected to the frame;
an activating arm connected to the pedal at one end and connected to a support arm at the opposite end;
a guide rail connected to the frame;
the support arm slidably mounted to the guide rail; and
a stop mechanism connected to the support arm such that when weights are placed on the support arm the stop mechanism prevents movement of the support arm.
2. The device of claim 1 further comprising a support member connected to the support arm.
3. The device of claim 1 wherein the pedal locks in position.
4. The device of claim 1 wherein the activating assembly is biased towards a position.
5. (canceled)
6. A workout device comprising:
a frame;
an activating assembly having a pedal connected to the frame;
an activating arm connected to the pedal at one end and connected to an activating member at the opposite end; and
a support arm pivotally mounted to the frame and positioned such that the activating member engages the support arm.
7. The device of claim 6 wherein the pedal locks in position.
8. The device of claim 6 further comprising a support member connected to the support arm.
9. The device of claim 8 wherein an arcuate member extends from the support member.
10. The device of claim 8 wherein the support member is removable.
11. The device of claim 8 wherein the support member is rotatable.
12. The device of claim 8 wherein a holding device is connected to the support member.
13. The device of claim 6 wherein the activating assembly is biased towards a position.
14. The device of claim 6 further comprising a stop mechanism connected to the support arm.
15. The device of claim 6 further comprising a stop device connected to the frame.
16. The device of claim 14 wherein when weights are placed on the support arm the stop mechanism prevents movement of the support arm.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An inverter apparatus which converts input voltage to AC driving voltage to supply it to a load, the inverter apparatus comprising:
an output transformer of which secondary coil are connected to the load;
a main transformer of which secondary coil are connected to a primary coil of the output transformer; and
a driving circuit which applies switching voltage alternately repeating the input voltage and a predetermined fixed voltage to a primary coil of the main transformer.
2. The inverter apparatus according to claim 1, wherein
the driving circuit includes:
a switching circuit which includes a plurality of transistors connected to the primary coil of the main transformer and supplies switching voltage alternately showing the input voltage and the fixed voltage on the primary coil of the main transformer corresponding to a turn-on and a turn-off of the plurality of transistors;
a plurality of pulse transformers which are provided for every plurality of transistors and have each secondary coil connected to control terminals of corresponding transistors; and
a control circuit which supplies pulse voltage to primary coils of the plurality of pulse transformers.
3. The inverter apparatus according to claim 1, wherein
the output transformers are plural and have each primary coil connected in series to the secondary coil of the main transformer to form a loop.
4. The inverter apparatus according to claim 1, wherein
the main transformer and the driving circuit are disposed on a first substrate, the output transformer is disposed on a second substrate, and the secondary coil of the main transformer on the first substrate and the primary coil, of the output transformer on the second substrate being connected through a cable.
5. The inverter apparatus according to claim 2, wherein
the plurality of transistors are MOSFET (metal oxide semiconductor field effect transistor) and each secondary coil of the plurality of pulse transformers is provided on a path from gates to sources of the corresponding plurality of transistors.
6. The inverter apparatus according to claim 2, wherein
the control circuit supplies the pulse voltage to primary coils of the plurality of pulse transformers so that current flowing in the load approaches a desired current value.
7. A power supply apparatus which includes a primary side-region and a secondary side-region that should be electrically insulated from each other, the power supply apparatus comprising:
an ACDC converter which is disposed in the primary side-region and converts input commercial AC voltage into DC voltage; and
an inverter apparatus according to claim 1 which receives the DC voltage output from the ACDC converter, as input voltage, and converts it into AC voltage to supply it to a load disposed in the secondary side-region.
8. A power supply apparatus which includes a primary side-region and a secondary side-region that should be electrically insulated from each other, the power supply apparatus comprising:
an ACDC converter which is disposed in the primary side-region and converts input commercial AC voltage into DC voltage; and
an inverter apparatus according to claim 2 which receives DC voltage output from the ACDC converter, as input voltage, and converts it into AC voltage to supply it to load disposed in the secondary side-region, wherein
the switching circuit, secondary coils of the plurality of pulse transformers, and primary coil of the main transformer of the inverter apparatus are disposed in the primary side-region, and the control circuit, primary coils of the plurality of pulse transformers, secondary coil of the main transformer, and the output transformer of the inverter apparatus are disposed in the secondary side-region.
9. A light-emitting apparatus, comprising:
a fluorescent lamp; and
a power supply apparatus according to claim 7 which supplies AC driving voltage having the fluorescent lamp that is a load.
10. The light-emitting apparatus according to claim 9,
wherein
the fluorescent lamp is a cold cathode fluorescent lamp.
11. The light-emitting apparatus according to claim 9,
wherein
the fluorescent lamp is an external electrode fluorescent lamp,
12. A picture display apparatus, comprising:
a liquid crystal panel; and
a light-emitting apparatus according to claim 9 disposed on a rear surface of the liquid crystal panel as a backlight.

1. A method for optimising transistor performance in an integrated circuit, comprising:
providing an integrated circuit having at least two cells, each cell having a logic function defined by the interconnection between active regions, non-active regions and power rails, each cell having an edge defined by a non-active regions each cell having a connection between an active diffusion region and a power rail;
identifying at least two adjacent cells each having a corresponding connection between an active region to the same power rail; and
joining the respective active regions associated with each corresponding connection of each cell with an additional diffusion area across the boundary between the cells forming the connected diffusion of the two adjacent cells.
2. The method of claim 1 wherein the active regions comprise a positive diffusion area, a negative diffusion area and a gate area.
3. The method of claim 2 wherein the connected diffusion is the negative diffusion area.
4. The method of claim 2 wherein the connected diffusion is the positive diffusion area.
5. The method of claim 2 wherein each negative diffusion area of each adjacent cell are connected and each positive diffusion area of each adjacent cell are connected.
6. The method of claim 1 wherein the corresponding connection is positioned along the edge of the cell forming a boundary between the two cells and the two corresponding connections.
7. The method of claim 1 further comprising reorientating a cell having a corresponding connection positioned along an edge, the cell being reoriented with the edge having the corresponding connection adjacent to and forming the boundary between the two cells for joining the diffusion areas.
8. The method of claim 1 wherein the non-active area is shallow trench isolation (STI) region.
9. The method of claim 1 wherein the active areas and non-active areas are comprised of materials having different physical properties.
10. The method of claim 1 wherein the joining step comprises applying a growshrink procedure to join the diffusion areas of each cell.
11. The method of claim 1 wherein the integrated circuit is an application specific integrated circuits (ASIC) having the cells arranged using synthesis and place and route tools into rows interconnected to effect the ASIC’s function.
12. The method of claim 1 wherein the cells are standard cells.
13. The method of claim 1 wherein the integrated circuit is an application specific integrated circuits (ASIC) having cells arranged and interconnected using custom placement tools to effect the ASIC’s function.
14. The method of claim 1 wherein the cells are custom transistor-level layout cells.
15. A method for building an integrated circuit having a connected diffusion cell architecture, comprising:
providing a logic cell library having at least one cell, each cell having a logic function defined by the interconnection between active regions, non-active regions and power rails, each cell having an edge defined by a non-active region, each cell having a connection between an active region and a power rail;
placing cells from the logic cell library into the integrated circuit;
identifying at least two adjacent cells in the integrated circuit each having a corresponding connection between an active region to the same power rail; and
joining the respective active regions associated with each corresponding connection of each cell with an additional diffusion area across the boundary between the cells forming the connected diffusion of the two adjacent cells.
16. The method of claim 15 wherein the active regions comprise a positive diffusion area, a negative diffusion area and a gate area.
17. The method of claim 16 wherein the connected diffusion is the negative diffusion area.
18. The method of claim 16 wherein the connected diffusion is the positive diffusion area.
19. The method of claim 16 wherein each negative diffusion area of each adjacent cell are connected and each positive diffusion area of each adjacent cell are connected.
20. The method of claim 15 wherein the corresponding connection is positioned along the edge of the cell forming a boundary between the two cells and the two corresponding connections.
21. The method of claim 15 further comprising reorientating a cell having a corresponding connection positioned along an edge, the cell being reoriented with the edge having the corresponding connection adjacent to and forming the boundary between the two cells for joining the diffusion areas.
22. The method of claim 15 wherein the non-active area is shallow trench isolation (STI) region.
23. The method of claim 15 wherein the active areas and non-active areas are comprised of materials having different physical properties.
24. The method of claim 15 wherein the joining step comprises applying a growshrink procedure to join the diffusion areas of each cell.
25. The method of claim 15 wherein the integrated circuit is an application specific integrated circuits (ASIC) having the cells arranged using synthesis and place and route tools into rows interconnected to effect the ASIC’s function.
26. The method of claim 15 wherein the cells are standard cells.
27. The method of claim 15 wherein the integrated circuit is an application specific integrated circuits (ASIC) having cells arranged and interconnected using custom placement tools to effect the ASIC’s function.
28. The method of claim 15 wherein the cells are custom transistor-level layout cells.
29. The method of claim 15 wherein the joining step comprises applying an abutment algorithm to join the diffusion areas of each cell.
30. An integrated circuit having a connected diffusion cell architecture, comprising:
at least two adjacent cells, each cell having a logic function defined by the interconnection between active regions, non-active regions and power rails, each cell having an edge defined by a non-active region, each cell having a connection between an active region and a power rail;
additional diffusion area across the boundary between the cells joining the respective active diffusion region associated with the corresponding connection of each cell forming the connected diffusion of the two adjacent cells.
31. The integrated circuit of claim 30 wherein the active regions comprise a positive diffusion area, a negative diffusion area and a gate area.
32. The integrated circuit of claim 31 wherein the connected diffusion is the negative diffusion area.
33. The integrated circuit of claim 31 wherein the connected diffusion is the positive diffusion area.
34. The integrated circuit of claim 31 wherein each negative diffusion area of each adjacent cell are connected and each positive diffusion area of each adjacent cell are connected.
35. The integrated circuit of claim 30 wherein the non-active area is shallow trench isolation (STI) region.
36. The integrated circuit of claim 30 wherein the active areas and non-active areas are comprised of materials having different physical properties.
37. The integrated circuit of any one of claim 30 wherein the cells are standard cells.
38. The integrated circuit of any one of claim 30 wherein the cells are custom transistor-level layout cells.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An adjustable hinge for a cushion and a seat body on a sofa, the adjustable hinge comprising:
an insertion tube adapted to attached to the cushion and having a distal end and multiple notches defined in the distal end; and
a tube holder with a hole adapted to embed inside the seat body, rotatably receiving the insertion tube and having a bar formed inside the hole to correspondingly engage paired two of the multiple notches for positioning.
2. The adjustable hinge as claimed in claim 1, wherein the insertion tube has multiple ribs longitudinally formed on an outer periphery of the insertion tube;
the tube holder has multiple grooves longitudinally defined on an inner periphery of the tube holder.