Author: claimsbot

1. A telepresence system comprising:
a memory configured to store computer executable instructions; and
one or more processors coupled to the memory, the processors configured, when executing the instructions, to:
receive a video stream from a client via a video cable, the video stream including an image generated by the client;
determine that the image includes a matrix barcode;
decode the matrix barcode into text, the text specifying user credentials of a user associated with the client; and
provision the telepresence system for the client in response to a determination that the user credentials are valid.
2. A method, comprising:
receiving, by an endpoint from a client, an image generated by the client;
determining, by the endpoint, that the image generated by the client includes a matrix barcode;
decoding, by the endpoint, the matrix barcode to determine one or more instructions associated with text encoded within the matrix barcode; and
performing the one or more instructions associated with the encoded text;
receiving a video stream from the client, the video stream including the image generated by the client; and
wherein the video stream is received over a Video Graphics Array (VGA), Digital Visual Interface (DVI), or High-Definition Multimedia Interface (HDMI) video cable coupled between the endpoint and the client.
3. The method of claim 2, wherein the video stream is received from the client while the video stream is displayed by the client.
4. The method of claim 2, wherein determining that the image generated by the client includes a matrix barcode comprises determining that the image includes a Quick Response (QR) code.
5. The method of claim 2, wherein the text encoded within the matrix barcode is one or more user credentials of a user associated with the client.
6. The method of claim 5, wherein the performing the one or more instructions associated with the encoded text includes:
verifying the user credentials with a login server connected to the endpoint through a network; and
providing the client with access to one or more functions of the endpoint in response to the verification of the user credentials.
7. The method of claim 5, wherein the performing the one or more instructions associated with the encoded text includes customizing the endpoint according to one or more customization parameters associated with the login information.
8. The method of claim 2, further comprising:
displaying a prompt querying whether the one or more instructions should be performed; and
wherein the one or more instructions are performed after receiving a positive response to the displayed prompt.
9. The method of claim 2, wherein the image is a first image and the method further comprises:
capturing a second image generated by the client;
determining that the second image generated by the client does not include a matrix barcode; and
capturing the first image upon waiting a predetermined period of time after the second image is captured or after the determination that the second image generated by the client does not include a matrix barcode.
10. The method of claim 2, wherein the performing the one or more instructions associated with the encoded text includes establishing a communication session with one or more users that are distinct from a user of the client.
11. The method of claim 2, wherein the endpoint is a computing system that includes a processor capable of facilitating a videoconference session with another endpoint.
12. One or more computer readable tangible media comprising logic that when executed is operable to:
receive, from a client, an image generated by the client;
determine that the image generated by the client includes a matrix barcode;
decode the matrix barcode to determine one or more instructions associated with text encoded within the matrix barcode; and
perform the one or more instructions associated with the encoded text;
wherein the image is received in a video stream from the client; and
wherein the video stream is received over a Video Graphics Array (VGA), Digital Visual Interface (DVI), or High-Definition Multimedia Interface (HDMI) video cable coupled between the endpoint and the client.
13. The media of claim 12, wherein determining that the image generated by the client includes a matrix barcode comprises determining that the image includes a Quick Response (QR) code.
14. The media of claim 12, wherein the text encoded within the matrix barcode is one or more user credentials of a user associated with the client.
15. The media of claim 12, wherein the logic is further configured to receive the image by capturing a photo or video of a display of the client.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A light fixture (2), comprising:
a metallic frame (14) including a central planar section (40) and first and second wings (42) extending angularly downward from said center section;
a first plurality of light emitting diodes (12) mounted and thermally coupled to said central planar section of said frame (14);
first and second reflectors (20) mounted to said frame so as to substantially cover downward-facing sides of said first and second wings, respectively; and
a sealed housing enclosing said frame, said first and second reflectors, and said first plurality of light emitting diodes; whereby
said frame draws heat away from said plurality of light emitting diodes; and
said first and second reflectors focus and concentrate light emitted by said first plurality of light emitting diodes and reflect heat radiated by said first and second wings.
2. The light fixture of claim 1 further comprising:
a first gap (53) disposed between said first reflector and said first wing; and
a second gap (53) disposed between said second reflector and said second wing; whereby said first and second gaps act as insulators.
3. The light fixture of claim 1 further comprising:
a printed circuit board (28) carrying said plurality of light emitting diodes;
a thermally conductive interface (65) disposed between and in contact with said printed circuit board and said frame, said interface being operative to wet a first surface area of said frame and a second surface area of said printed circuit board so as to maximize heat transfer from said printed circuit board to said frame.
4. The light fixture of claim 1 further comprising:
an electrical enclosure (52) disposed within said sealed housing.
5. The light fixture of claim 4 wherein:
said electrical enclosure is formed in part by at least a portion of said frame.
6. The light fixture of claim 4 further comprising:
a power supply circuit (18) disposed within said electrical enclosure.
7. The light fixture of claim 4 further comprising:
a battery (24) disposed within said electrical enclosure.
8. The light fixture of claim 1 further comprising:
a second plurality of light emitting diodes (22);
first and second power supply circuits (18) coupled to said first and second pluralities of light emitting diodes, respectively;
a first wiring arrangement (60) connected to said first power supply (18) and designed and arranged for connecting said first power supply (18) to a first source of electrical power; and
a second wiring arrangement connected to said second power supply (18) and designed and arranged for connecting to a second source of power that is independent of said first source of power; wherein
said second plurality of light emitting diodes are enabled to illuminate when said first source of power is lost.
9. The light fixture of claim 8 wherein:
said second source of power includes a battery (24) disposed within said sealed housing.
10. The light fixture of claim 8 further comprising:
a first printed circuit board (28) carrying said first plurality of light emitting diodes; and
a second printed circuit board (28) carrying said second plurality of light emitting diodes.
11. The light fixture of claim 8 further comprising:
a printed circuit board (28) carrying said first and second pluralities of light emitting diodes.

1. A method for correcting a formatting data error in a flash memory, said method comprising:
discovering a formatting error in a first formatting data of a first flash memory, wherein said first formatting data includes a first partition table information of said first flash memory;
extracting from a second flash memory storing second data a second formatting data and transferring said second formatting data to a formatting modification storage unit, wherein said second formatting data includes a second partition table information of said second flash memory, wherein said first partition table information is nonidentical to said second partition table information before a formatting data error is present in said first flash memory;
replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data, without requiring redundant copies of said first formatting data; and
storing first data in said first flash memory with said formatting data modified within said formatting modification unit using said template information derived from said second formatting data, wherein said first data is different from said second data, wherein said formatting data error is an error in said first flash memory that stores partition table information.
2. The method of claim 1, further comprising the step of generating a copy of said second formatting data of said second flash memory.
3. The method of claim 2, wherein the step of generating a copy of said second formatting data of said second flash memory further comprises the step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit.
4. The method of claim 3, wherein said step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit further comprises the step of copying a binary image of said second formatting data of said second flash memory onto a formatting modification storage unit in a memory controller.
5. The method of claim 1, wherein said step of discovering a formatting error in a first formatting data of a first flash memory further comprises:
verifying a first header in said first flash memory;
verifying a first partition table offset in said first flash memory;
verifying a first validity of a partition name in said first flash memory; and
verifying a first partition table size in said first flash memory.
6. The method of claim 1, wherein said step of replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data further comprises the step of modifying said second formatting data of said second flash memory to construct a modification of said first formatting data of said first flash memory.
7. The method of claim 1, wherein said step of extracting from said second flash memory storing second data said second formatting data further comprises extracting a second header, a second partition table offset, a second partition name, and a second partition table size from said second flash memory.
8. A system for correcting a formatting data error in a flash memory, said system comprising:
at least one processing unit;
at least one memory coupled to said at least one processing unit;
a memory controller coupled to said at least one memory, wherein said memory controller includes a formatting modification storage unit; and
wherein said at least one memory stores executable code for:
discovering a formatting error in a first formatting data of a first flash memory, wherein said first formatting data includes a first partition table information of said first flash memory;
extracting from a second flash memory storing second data a second formatting data and transferring said second formatting data to a formatting modification storage unit, wherein said second formatting data includes a second partition table information of said second flash memory, wherein said first partition table information is nonidentical to said second partition table information before a formatting data error is present in said first flash memory;
replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data, without requiring redundant copies of said first formatting data; and
storing first data in said first flash memory with said formatting data modified within said formatting modification unit using said template information derived from said second formatting data, wherein said first data is different from said second data, wherein said formatting data error is an error in said first flash memory that stores partition table information.
9. The system of claim 8, wherein said at least one memory stores executable code for generating a copy of said second formatting data of said second flash memory.
10. The system of claim 9, wherein said executable code for generating a copy of said second formatting data of said second flash memory further comprises executable code for copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit.
11. The system of claim 10, wherein said executable code for copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit further comprises executable code for copying a binary image of said second formatting data of said second flash memory onto a formatting modification storage unit in a memory controller.
12. The system of claim 8, wherein said executable code for discovering a formatting error in a first formatting data of a first flash memory further comprises:
executable code for verifying a first header in said first flash memory;
executable code for verifying a first partition table offset in said first flash memory;
executable code for verifying a first validity of a partition name in said first flash memory; and
executable code for verifying a first partition table size in said first flash memory.
13. The system of claim 8, wherein said executable code for replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data further comprises executable code for modifying said second formatting data of said second flash memory to construct a modification of said first formatting data of said first flash memory.
14. The system of claim 8, wherein said executable code for extracting from said second flash memory storing second data said second formatting data further comprises executable code for extracting a second header, a second partition table offset, a second partition name, and a second partition table size from said second flash memory.
15. A tangible machine-readable storage medium having a plurality of instructions processable by at least one processing unit contained within a machine embodied therein, wherein said plurality of instructions, when processed by said at least one processing unit, causes said machine to perform a method for correcting a formatting data error in a flash memory comprising:
discovering a formatting error in a first formatting data of a first flash memory, wherein said first formatting data includes a first partition table information of said first flash memory;
extracting from a second flash memory storing second data a second formatting data and transferring said second formatting data to a formatting modification storage unit, wherein said second formatting data includes a second partition table information of said second flash memory, wherein said first partition table information is nonidentical to said second partition table information before a formatting data error is present in said first flash memory;
replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data, without requiring redundant copies of said first formatting data; and
storing first data in said first flash memory with said formatting data modified within said formatting modification unit using said template information derived from said second formatting data, wherein said first data is different from said second data, wherein said formatting data error is an error in said first flash memory that stores partition table information.
16. The tangible machine-readable storage medium of claim 15, said method further comprising the step of generating a copy of said second formatting data of said second flash memory.
17. The tangible machine-readable storage medium of claim 16, wherein the step of generating a copy of said second formatting data of said second flash memory further comprises the step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit.
18. The tangible machine-readable storage medium of claim 17, wherein said step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit further comprises the step of copying a binary image of said second formatting data of said second flash memory onto a formatting modification storage unit in a memory controller.
19. The tangible machine-readable storage medium of claim 15, wherein said step of discovering a formatting error in a first formatting data of a first flash memory further comprises:
verifying a first header in said first flash memory;
verifying a first partition table offset in said first flash memory;
verifying a first validity of a partition name in said first flash memory; and
verifying a first partition table size in said first flash memory.
20. The tangible machine-readable storage medium of claim 15, wherein said step of replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data further comprises the step of modifying said second formatting data of said second flash memory to construct a modification of said first formatting data of said first flash memory.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of forming a planar field effect transistor comprising:
forming a semiconductor layer with a plurality of first sections and a plurality of second sections such that said second sections traverse said first sections and such that said first sections and said second sections are separated by spaces;
patterning a gate conductor on said semiconductor layer such that said gate conductor extends across said first sections and said spaces, such that said gate conductor has first portions above each of said first sections and second portions above each of said spaces, and such that a first length of said first portions is greater than a second length of said second portions; and
forming a plurality of contacts to said second sections such that said contacts are between said first sections and opposite said second portions.
2. The method of claim 1, further comprising before said patterning of said gate conductor and said forming of said contacts, predetermining said first length, said second length and a pitch between said contacts in order to simultaneously maximize transistor density, minimize leakage power and maintain parasitic capacitance below a preset level.
3. The method of claim 1, wherein said gate conductor is formed such that said first length is approximately 1.2 to 2.5 times longer than said second length.
4. The method of claim 1, further comprising doping said second sections to form sourcedrain diffusion regions.
5. A method of forming a non-planar field effect transistor comprising:
forming a plurality of semiconductor fins and a plurality of semiconductor mesas on an insulator layer such that said semiconductor mesas traverse said semiconductor fins and such that said semiconductor fins and said semiconductor mesas are separated by spaces;
patterning a gate conductor above said semiconductor fins such that said gate conductor extends across said semiconductor fins and said spaces, such that said gate conductor has first portions above said semiconductor fins and second portions above said spaces, and such that a first length of said first portions is greater than a second length of said second portions; and
forming a plurality of contacts to said semiconductor mesas such that said contacts are between said semiconductor fins and opposite said second portions.
6. The method of claim 5, further comprising before said patterning of said gate conductor and said forming of said contacts, predetermining said first length, said second length and a pitch between said contacts in order to simultaneously maximize transistor density, minimize leakage power and maintain parasitic capacitance below a preset level.
7. The method of claim 5, wherein said gate conductor is formed such that said first length is approximately 1.2 to 2.5 times longer than said second length.
8. The method of claim 5, further comprising doping said second sections to form sourcedrain diffusion regions.
9. A method of forming a planar field effect transistor comprising:
forming a semiconductor layer with a plurality of first sections and a plurality of second sections such that said second sections traverse said first sections and such that said first sections and said second sections are separated by spaces;
patterning a gate conductor on said semiconductor layer such that said gate conductor extends across said first sections and said spaces, such that said gate conductor has first portions above each of said first sections and second portions above each of said spaces, and such that a first length of said first portions is greater than a second length of said second portions; and
forming a plurality of contacts to said second sections such that said contacts are between said first sections and opposite said second portions;
further comprising before said patterning of said gate conductor and said forming of said contacts, predetermining said first length, said second length and a pitch between said contacts in order to simultaneously maximize transistor density, minimize leakage power and maintain parasitic capacitance below a preset level.
10. The method of claim 9, wherein said gate conductor is formed such that said first length is approximately 1.2 to 2.5 times longer than said second length.
11. The method of claim 10, further comprising doping said second sections to form sourcedrain diffusion regions.