1460757091-c4ff1ebd-a2a1-4963-8b5f-d6efea594f41

1-14. (canceled)
15. An assembly comprising:
a door leaf;
at least two hinges each comprising a door-side and a wall-side hinge part, each having a longitudinal bore;
at least two hinge pins onto which the hinge parts can be plugged, characterized in that the door leaf has at least two undercut blind holes; and
at least two expanding plugs which each have a distal expanding element and a proximal retaining and abutment element, and expander means for expanding the expanding plugs are provided, as also are fastening means for fastening the hinge to the door leaf.
16. The assembly according to claim 15, characterized in that the proximal expanding element of the expanding plug is in the form of a body having expanding hooks which is provided with an inside thread.
17. The assembly according to claim 15, characterized in that the proximal retaining and abutment element of the expanding plug is in the form of a multi-sided screw head.
18. The assembly according to claim 15, characterized in that the expanderfastening means have a screwed pin and a nut.
19. The assembly according to claim 18, characterized in that the screwed pin has a polygonal socket.
20. The assembly according to claim 15, characterized in that the hinge part has a through-hole, preferably a slotted hole.
21. The assembly according to claim 15, characterized in that the expanderfastening means have an assembling part which is able to be fixed in the door leaf and which has a bore to receive a screw having a shank and a head, by which screw the assembling part can be screwed to the expanding plug.
22. The assembly according to claim 21, characterized in that the bore in the assembling part is eccentric.
23. The assembly according to claim 21, characterized in that the head of the screw and the bore in the assembling part are tapered.
24. The assembly according to claim 21, characterized in that a blind hole to receive the assembling part is provided in the hinge part.
25. The assembly according to claim 24, characterized in that the assembling part can be fixed in the hinge part by a clamping screw which can be screwed into a bore in the hinge part.
26. The assembly according to Clam 15, characterized in that the hinge pin has a circumferential projection.
27. The assembly according to claim 15, characterized in that the door leaf is composed of a mineral or plastics material.
28. A shower stall comprising:
one or more side-walls;
and one or more assemblies, each assembly comprising:
a door leaf;
at least two hinges each comprising a door-side and a wall-side hinge part, each having a longitudinal bore;
at least two hinge pins onto which the hinge parts can be plugged, characterized in that the door leaf has at least two undercut blind holes; and
at least two expanding plugs which each have a distal expanding element and a proximal retaining and abutment element, and expander means for expanding the expanding plugs are provided, as also are fastening means for fastening the hinge to the door leaf.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A read device for a semiconductor memory that comprises a memory cell and a first reference cell for outputting a voltage at a first reference level to be compared with the output voltage of said memory cell, said device reading out the stored data of said memory cell by comparing the output voltage of said memory cell with the output voltage of said first reference cell, said device comprising:
a judging section for judging as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels; and
a comparing section for comparing the output voltage of said memory cell with the output voltage of said first reference cell in accordance with the result of judgment by said judging section, and outputting the comparison result as said stored data of said memory cell.
2. The device according to claim 1, wherein said memory further comprises:
a second reference cell for outputting a voltage at a second reference level higher than said first reference level; and
a third reference cell for outputting a voltage at a third reference level lower than said first reference level, and
said judging section compares the output voltage of said first reference cell with the output voltage of said second reference cell and with the output voltage of said third reference cell, for judging, on the basis of the comparison results, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
3. The device according to claim 2, wherein said judging section comprises:
a first latch section for storing the comparison result of the output voltage of said first reference cell with the output voltage of said second reference cell; and
a second latch section for storing the comparison result of the output voltage of said first reference cell with the output voltage of said third reference cell, and,
when reading out the data stored in said memory cell, said first and second latch sections are initialized at the beginning of the reading operation, and, after elapse of a predetermined period of time, when the comparison results stored in said first and second latch sections change from their initialized values, it is judged that the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
4. The device according to claim 2, wherein the voltage at said second reference level is equal to or lower than a voltage at a reference level for verifying in a data writing operation of said semiconductor memory, and the voltage at said third reference level is equal to or higher than a voltage at a reference level for verifying in a data erasing operation of said semiconductor memory.
5. The device according to claim 2, wherein the threshold voltage of said second reference cell is higher than that of said first reference cell, and the threshold voltage of said third reference cell is lower than that of said first reference cell.
6. The device according to claim 2, wherein the rising time of the gate voltage of said second reference cell is longer than that of said first reference cell, and the rising time of the gate voltage of said third reference cell is shorter than that of said first reference cell.
7. The device according to claim 1, wherein said memory further comprises a second reference cell for outputting a voltage at a second reference level different from said first reference level, and
said judging section compares the output voltage of said first reference cell with the output voltage of said second reference cell, for judging, on the basis of the comparison result, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
8. The device according to claim 1, wherein said memory further comprises:
a second reference cell for outputting a voltage at a second reference level different from said first reference level; and
a third reference cell for outputting a voltage of a third reference level different from either of said first and second reference levels, and
said judging section compares the output voltage of said second reference cell with the output voltage of said third reference cell, for judging, on the basis of the comparison result, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
9. The device according to claim 1, wherein said memory cell stores any of N values (N is a natural number other than one), and said memory comprises:
first reference cells for outputting voltages at (N1) first reference levels to be compared with the output voltage of said memory cell;
second reference cells for outputting voltages at (N1) second reference levels each of which is higher than the corresponding one of said (N1) first reference levels; and
third reference cells for outputting voltages at (N1) third reference levels each of which is lower than the corresponding one of said (N1) first reference levels; and
said judging section compares the output voltage of each of said (N1) first reference cells with the output voltage of the corresponding one of said second reference cells and with the output voltage of the corresponding one of said third reference cells, for judging, on the basis of the comparison results, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
10. The device according to claim 9, wherein the voltage at each of said second reference levels is equal to or lower than a voltage at a reference level for verifying in writing the data value that is to be read out with the corresponding one of said first reference cells, and the voltage at each of said third reference levels is equal to or higher than a voltage at a reference level for verifying in erasing the data value that is to be read out with the corresponding one of said first reference cells.
11. A read method for a semiconductor memory that comprises a memory cell and a first reference cell for outputting a voltage at a first reference level to be compared with the output voltage of said memory cell, the stored data of said memory cell being read out by comparing the output voltage of said memory cell with the output voltage of said first reference cell, said method comprising the steps of:
judging as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels;
comparing the output voltage of said memory cell with the output voltage of said first reference cell in accordance with the judgment result; and
outputting the comparison result as said stored data of said memory cell.
12. The method according to claim 11, wherein said memory further comprises:
a second reference cell for outputting a voltage at a second reference level higher than said first reference level; and
a third reference cell for outputting a voltage at a third reference level lower than said first reference level, and
the output voltage of said first reference cell is compared with the output voltage of said second reference cell and with the output voltage of said third reference cell, for judging, on the basis of the comparison results, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
13. The method according to claim 12, wherein
a first latch section is provided for storing the comparison result of the output voltage of said first reference cell with the output voltage of said second reference cell,
a second latch section is provided for storing the comparison result of the output voltage of said first reference cell with the output voltage of said third reference cell, and,
when reading out the data stored in said memory cell, said first and second latch sections are initialized at the beginning of the reading operation, and, after elapse of a predetermined period of time, when the comparison results stored in said first and second latch sections change from their initialized values, it is judged that the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
14. The method according to claim 12, wherein the voltage at said second reference level is equal to or lower than a voltage at a reference level for verifying in a data writing operation of said semiconductor memory, and the voltage at said third reference level is equal to or higher than a voltage at a reference level for verifying in a data erasing operation of said semiconductor memory.
15. The method according to claim 11, wherein said memory further comprises a second reference cell for outputting a voltage at a second reference level different from said first reference level, and
the output voltage of said first reference cell is compared with the output voltage of said second reference cell, for judging, on the basis of the comparison result, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
16. The method according to claim 11, wherein said memory further comprises:
a second reference cell for outputting a voltage at a second reference level different from said first reference level; and
a third reference cell for outputting a voltage of a third reference level different from either of said first and second reference levels, and
the output voltage of said second reference cell is compared with the output voltage of said third reference cell, for judging, on the basis of the comparison result, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
17. The method according to claim 11, wherein said memory cell stores any of N values (N is a natural number other than one), and said memory comprises:
first reference cells for outputting voltages at (N1) first reference levels to be compared with the output voltage of said memory cell;
second reference cells for outputting voltages at (N1) second reference levels each of which is higher than the corresponding one of said (N1) first reference levels; and
third reference cells for outputting voltages at (N1) third reference levels each of which is lower than the corresponding one of said (N1) first reference levels; and
the output voltage of each of said (N1) first reference cells is compared with the output voltage of the corresponding one of said second reference cells and with the output voltage of the corresponding one of said third reference cells, for judging, on the basis of the comparison results, as to whether or not the output voltages of said memory cell and said first reference cell have reached their respective comparable levels.
18. The method according to claim 17, wherein the voltage at each of said second reference levels is equal to or lower than a voltage at a reference level for verifying in writing the data value that is to be read out with the corresponding one of said first reference cells, and the voltage at each of said third reference levels is equal to or higher than a voltage at a reference level for verifying in erasing the data value that is to be read out with the corresponding one of said first reference cells.

1460757083-07e5bcf9-88e1-49e7-821e-e659fc55bbcd

1. An information recording medium comprising at least a substrate, and a recording layer,
wherein said substrate is formed with a read only area and a recordingreproducing area, and wherein said read only area and said recordingreproducing area do not overlap with each other, and
wherein said recordingreproducing area is composed of a groove and a land, and
wherein a reflectivity of said recording layer is more than 10%, and
wherein said recording layer and said resin layer are formed continuously over at least two areas of said read only area and said recordingreproducing area, and
wherein a push-pull signal output T1 reproduced from said read only area is more than 0.1 and another push-pull signal output T2 reproduced from said recordingreproducing area is more than 0.1, and wherein 1.5\u2267T1T2\u22670.5, and
wherein said groove is wobbled in a width of wobbling within a range of 0.009 \u03bcm to 0.017 \u03bcm.
2. A reproducing method for reproducing an information recording medium comprising at least a substrate, and a recording layer,
wherein said substrate is formed with a read only area and a recordingreproducing area, and wherein said read only area and said recordingreproducing area do not overlap with each other, and
wherein said recordingreproducing area is composed of a groove and a land, and
wherein a reflectivity of said recording layer is more than 10%, and
wherein said recording layer and said resin layer are formed continuously over at least two areas of said read only area and said recordingreproducing area, and
wherein a push-pull signal output T1 reproduced from said read only area is more than 0.1 and another push-pull signal output T2 reproduced from said recordingreproducing area is more than 0.1, and wherein 1.5\u2267T1T2\u22670.5, and
wherein said groove is wobbled in a width of wobbling within a range of 0.009 \u03bcm to 0.017 \u03bcm,
said reproducing method characterized in that
reproducing is conducted by irradiating a laser beam on said recording layer.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1-33. (canceled)
34. Apparatus for storing energy, comprising:
a high pressure storage vessel for receiving a high pressure gas, the high pressure storage vessel comprising a high pressure heat store for receiving thermal energy from the high pressure gas;
wherein the high pressure storage vessel is configured for connection to a gas store for storing pressurised gas after exposure to the high pressure heat store or to gas processing equipment for receiving pressurised gas after exposure to the high pressure heat store;
wherein the apparatus further comprises:
a low pressure storage vessel comprising a low pressure heat store for receiving thermal energy from a low pressure gas, the low pressure storage vessel being selectively connectable to the high pressure storage vessel; and
gas transfer equipment for transferring gas at low pressure between the high pressure storage vessel and the low pressure storage vessel, wherein stored thermal energy is transferred between the high pressure heat store and the low pressure heat store by passing the low pressure gas between the high pressure storage vessel and the low pressure storage vessel.
35. (canceled)
36. Apparatus according to claim 34, further comprising an expander for reducing pressure of gas stored in the high pressure storage vessel prior to connection to the low pressure storage vessel, and wherein the energy of expansion is recoverable by the apparatus.
37. (canceled)
38. Apparatus according to claim 34, wherein the apparatus is configured to increase the pressure of gas stored in the high pressure storage vessel after disconnection of the high pressure storage vessel from the low pressure storage vessel.
39. Apparatus according to claim 34, wherein the apparatus comprises a further high pressure storage vessel for receiving high pressure gas, the further high pressure storage vessel being connectable to the gas store or the gas processing equipment via a connection between the high pressure storage vessel and the gas store and comprising a further high pressure heat store for receiving thermal energy from gas.
40. Apparatus according to claim 39, wherein the first-mentioned high pressure storage vessel and further high pressure storage vessel are configured to be alternately chargeable.
41. Apparatus according to claim 40, wherein the apparatus is configured to substantially continuously supply gas to the alternately chargeable first-mentioned high pressure storage vessel and further high pressure storage vessel.
42. Apparatus according to claim 34, wherein the apparatus comprises a further low pressure storage vessel comprising a further low pressure heat store for receiving thermal energy from gas.
43. Apparatus according to claim 42, wherein the further low pressure storage vessel is selectively connectable to at least one of the first-defined or the further high pressure storage vessel.
44. Apparatus according to claim 42, wherein the apparatus is configured to charge the first-mentioned and further low pressure heat store in series.
45. Apparatus according to claim 42, wherein the apparatus is configured to charge the first-mentioned and further low pressure heat store in parallel.
46. Apparatus according to claim 42, wherein the first-mentioned low pressure storage vessel maintains gas at a first pressure and the further low pressure storage vessel maintains gas at a second pressure different to the first pressure.
47-50. (canceled)
51. Apparatus according to claim 39, wherein the apparatus comprises at least two yet further high pressure storage vessels for receiving high pressure gas, each yet further high pressure storage vessel being connectable to the gas store or the gas processing equipment via the connection and comprising a yet further high pressure heat store for receiving thermal energy from gas.
52. Apparatus according to claim 51, wherein the apparatus is operable in a charging mode in which at any one time: one of the high pressure storage vessels is being charged with gas; one of the high pressure storage vessels contains gas having its pressure reduced; one of the high pressure storage vessels contains gas being transferred between the high pressure storage vessel and the low pressure storage vessel by the gas transfer equipment; and one of the high pressure storage vessels contains gas having its pressure increased.
53. Apparatus according to claim 52, wherein the apparatus comprises at least one yet further high pressure storage vessel for receiving high pressure gas, the at least one yet further high pressure storage vessel being connectable to the gas store or the gas processing equipment via the connection and comprising a yet further high pressure heat storage means store for receiving thermal energy from gas.
54. Apparatus according to claim 53, wherein the apparatus is operable in a charging mode to transfer low pressure gas from the first-mentioned and further high pressure storage vessels at the same time, each at a lower rate of transfer than the apparatus is configured to receive high pressure gas.
55. Apparatus according to claim 53, wherein the apparatus is operable in a discharging mode to transfer low pressure gas to the first-mentioned and further high pressure storage vessels at the same time, each at a lower rate of transfer than the apparatus is configured to discharge high pressure gas.
56. (canceled)
57. Apparatus according to claim 34, wherein the first-mentioned low pressure storage vessel or further low pressure storage vessel stores gas at substantially atmospheric pressure.
58. A method of storing and subsequently retrieving energy, comprising:
during a charge phase:
receiving a heated high pressure gas
transferring the high pressure gas to a gas store or gas processing equipment via a high pressure storage vessel comprising a high pressure heat store for receiving thermal energy from the gas;
transferring gas from the high storage vessel at low pressure between the high pressure storage vessel and a low pressure storage vessel comprising a low pressure heat store for receiving thermal energy from gas, wherein thermal energy stored by the high pressure heat store is transferred to the low pressure heat store by low pressure gas passing between the high pressure storage vessel and the low pressure storage vessel; and
during a discharge phase:
transferring gas between the low pressure storage vessel and the high pressure storage vessel at low pressure, wherein thermal energy stored by the low pressure heat store is transferred to the high pressure heat storage means store by low pressure gas passing between the low pressure storage vessel and the high pressure storage vessel;
subsequently passing gas at high pressure through the high pressure storage vessel to expose the high pressure gas to the high pressure heat store; and
expanding the heated high pressure gas.
59. A method according to claim 58, wherein gas is transferred cyclically between the high pressure storage vessel and the low pressure storage vessel during the charge phase, or is transferred cyclically between the low pressure storage vessel and the high pressure storage vessel during the discharge phase.
60. (canceled)
61. A method of storing and subsequently retrieving energy, comprising:
during a charge phase;
receiving a heated low pressure gas;
passing the low pressure gas through a low pressure storage vessel comprising a low pressure heat store for receiving thermal energy from the gas; and
during a discharge phase:
transferring gas from the low pressure storage vessel at low pressure between the low pressure storage vessel and a high pressure storage vessel comprising a high pressure store for receiving thermal energy from the gas, wherein thermal energy stored by the low pressure heat store is transferred to the high pressure heat store by low pressure gas passing between the low pressure storage vessel and the high pressure storage vessel;
subsequently passing gas at high pressure through the high pressure storage vessel to expose the gas to the high pressure heat store; and
expanding the heated high pressure gas.