1460755311-d2e7e043-0a5e-4566-a3d6-cc51693663de

1. A method for determining the distance of a movable object from an immobile object and determining the speed of the movable object with respect to the immobile object comprising the steps of,
(a) generating a pulse train at an immobile object at first location for a first fixed-period-of-time, wherein said pulse train is composed of a predetermined number of pulses having a known width and period;
(b) modulating the pulse train with a high frequency carrier radio wave during said first fixed-period-of-time;
(c) transmitting said high frequency carrier radio wave to a movable object at a second location during said first fixed-period-of-time;
(d) receiving said high frequency carrier radio wave at said movable object during said first fixed-period-of-time;
(e) demodulating said pulse train at said movable object while generating said pulse train during said first fixed-period-of-time;
(f) remodulating said pulse train at said movable object with a second high frequency carrier radio wave during said first fixed-period-of-time;
(g) transmitting said second high frequency carrier radio wave from said movable object to said immobile object during said first fixed-period-of-time, wherein said pulse train remains unchanged as to the number of pulses, pulse width and period;
(h) receiving at said immobile object that portion of said second high frequency carrier radio wave that can be received during said first fixed-period-of-time;
(i) demodulating the pulse train received at the immobile object in that portion of said second high frequency carrier radio wave;
(j) counting the number of pulses in the pulse train in that portion of said second high frequency carrier radio wave;
(k) determining the number of missing pulses from that portion of the pulse train in relation to the number of pulses generated in the first fixed-period-of time;
(l) dividing the number of missing pulses by two to obtain an average number of pulses traveling between the immobile object and the movable object;
(m) calculating the delay time by dividing said first fixed-period-of-time by the predetermined number of pulses and multiplying the result by said average number of pulses;
(n) determining a first distance between said immobile object and said movable object by multiplying said delay time by the radio wave propagation velocity;
(o) repeating steps (a) through (n) for a second fixed-period-of-time equal to the first fixed period of time to determine a second distance; and,
(p) determining the speed of the movable object with respect to the immobile object by taking the difference between the first distance and the second distance and dividing the result by the time between the termination of the first fixed-period-of-time and the start of the second fixed-period-of-time.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An imaging system, comprising:
at least one bus line;
a row and column array of active pixels, each of which has an associated pitch and is periodically reset to a known state, said pixel producing a reset level which includes noise components, and a signal level which includes signal and noise components, in response to respective control signals;
a plurality of column buffers, each of which conveys the outputs of a respective column of pixels, in turn, to one of said at least one bus lines, each of said column buffers comprising:
\u2018odd row\u2019 and \u2018even row\u2019 sample and hold(S&H)correlated double sampling (CDS) circuits which are switchably connected to said pixels and arranged to process the pixel outputs of odd and even rows, respectively, each S&HCDS circuit further arranged to subtract the reset level from the signal level of the pixel to which it is connected to suppress correlated noise components present in said signal level and produce a net output signal; and
a buffer amplifier arranged to receive said net output signal and convey it to one of said at least one bus lines,
each of said column buffers having a pitch which is equal to or less than said pixel pitch;

each of said bus lines conveying the outputs of a plurality of said buffer amplifiers; and
at least one gain amplifier external to said column buffer, said at least one gain amplifier coupled at an input to a respective one of said bus lines such that said gain amplifier amplifies the outputs of a plurality of column buffers.
2. The imaging system of claim 1, wherein said at least one gain amplifier external to said column buffer is a capacitance transimpedance amplifier (CTIA).
3. The imaging system of claim 2, wherein said at least one bus line comprises a first bus line which conveys the outputs of the buffer amplifiers in the column buffers located in the system’s \u2018odd\u2019 columns and a second bus line which conveys the outputs of the buffer amplifiers in the column buffers located in the system’s \u2018even\u2019 columns, and wherein said at least one gain amplifier comprises first and second gain amplifiers coupled at respective inputs to said first and second bus lines, respectively.
4. The imaging system of claim 1, wherein said pixel pitch is less than or equal to 2 \u03bcm.
5. The imaging system of claim 1, wherein said noise components include kTC, 1f and fixed pattern noise.
6. The imaging system of claim 1, wherein each of said pixels includes a photodiode and a source follower circuit, said source follower circuit coupled at an input to said photodiode output and producing said pixel’s output.
7. The imaging system of claim 1, said system further arranged to provide a feedback path between the output of said gain amplifier and the input to each column buffer’s buffer amplifier when the output of said column buffer’s buffer amplifier is coupled to said gain amplifier, such that said buffer amplifier reduces the magnitude of the bus capacitance to which said column buffer’s net output signal is subjected compared with the magnitude of the bus capacitance that said net output signal would be subjected if connected directly to said gain amplifier.
8. The imaging system of claim 7, further comprising a capacitance which can be switchably connected into said feedback path such that the voltage gain realized by said buffer and gain amplifier varies with the size of said capacitance.
9. The imaging system of claim 7, further comprising a capacitance which can be switchably connected into said feedback path such that the noise gain realized by said buffer and gain amplifier varies with the size of said capacitance.
10. The imaging system of claim 1, further comprising an output amplifier which is driven by the outputs of said gain amplifiers.
11. The imaging system of claim 1, further comprising a feedback capacitor connected between the output of said gain amplifier and the input of said gain amplifier which is coupled to a respective one of said bus lines such that the stability of said gain amplifier is improved.
12. An imaging system, comprising:
at least one bus line;
a row and column array of active pixels, each of which has an associated pitch and is periodically reset to a known state, said pixel producing a reset level which includes noise components, and a signal level which includes signal and noise components, in response to respective control signals;
a plurality of column buffers, each of which conveys the outputs of a respective column of pixels, in turn, to one of said at least one bus lines, each of said column buffers comprising:
\u2018odd row\u2019 and \u2018even row\u2019 sample and hold(S&H)correlated double sampling (CDS) circuits which are switchably connected to said pixels and arranged to process the pixel outputs of odd and even rows, respectively, each S&HCDS circuit further arranged to subtract the reset level from the signal level of the pixel to which it is connected to suppress correlated noise components present in said signal level and produce a net output signal; and
a buffer amplifier arranged to receive said net output signal and convey it one of said at least one bus lines,
each of said column buffers having a pitch which is equal to or less than said pixel pitch;

each of said bus lines conveying the outputs of a plurality of said buffer amplifiers;
at least one capacitance transimpedance amplifier (CTIA) external to said column buffer, said at least one CTIA coupled at an input to a respective one of said bus lines such that said CTIA amplifies the outputs of a plurality of column buffers, said system arranged to provide a feedback path between the output of said CTIA and the input to each column buffer’s buffer amplifier when the output of said column buffer’s buffer amplifier is coupled to said CTIA; and
a capacitance which can be switchably connected into said feedback path, said buffer amplifier, CTIA and feedback path forming a feedback amplifier, the voltage and noise gain realized by said feedback amplifier varying with the size of said capacitance;
such that said buffer amplifier reduces the magnitude of the bus capacitance to which said column buffer’s net output signal is subjected compared with the magnitude of the bus capacitance that said net output signal would be subjected if connected directly to said CTIA.
13. The imaging system of claim 12, wherein said at least one bus line comprises a first bus line which conveys the outputs of the buffer amplifiers in the column buffers located in the system’s \u2018odd\u2019 columns and a second bus line which conveys the outputs of the buffer amplifiers in the column buffers located in the systems \u2018even\u2019 columns, and wherein said at least one CTIA comprises first and second CTIAs coupled at respective inputs to said first and second bus lines, respectively.
14. The imaging system of claim 12, wherein said pixel pitch is less than or equal to 2 \u03bcm.
15. The imaging system of claim 12, wherein said noise components include kTC, 1f and fixed pattern noise.

1460755302-43100abd-19e4-4240-bdd5-ed2596520198

1. A method for post-route optimization of a position in a particular dimension, of a first group of at least one object in an integrated circuit layout layer, comprising the steps of:
using a computer system to calculate, using an explicit formula, an optimal position for the first group of objects in the particular dimension, the optimal position being a position in the particular dimension that minimizes a sum of the average critical area on both sides of the first group of objects which are opposite each other in the particular dimension; and
moving the first group of objects in the layer to the calculated position along the particular dimension.
2. A method according to claim 1, wherein the first group of objects consists of a single object.
3. A method according to claim 2, wherein the single object has second and third neighboring objects on respectively opposite sides of the single object in the layer,
and wherein the explicit formula calculates the optimal position for the single object as having approximately a spacing sij* from the second neighboring object given by:
s
ij
*

=

1

1
+
b
ik
b
ij
,
where bij is the mutual visibility length of the single object relative to the second neighboring object, and bik is the mutual visibility length of the single object relative to the third neighboring object.
4. A method according to claim 1, wherein the explicit formula is defined so as to retain the routing topology of the layer.
5. A method according to claim 1, wherein the explicit formula is representative of a plurality of defect sizes.
6. Apparatus for post-route optimization of a position in a particular dimension, of a first group of at least one object in an integrated circuit layout layer, comprising:
means for calculating, using an explicit formula, an optimal position for the first group of objects in the particular dimension, the optimal position being a position in the particular dimension that minimizes a sum of the average critical area on both sides of the first group of objects which are opposite each other in the particular dimension; and
means for moving the first group of objects in the layer to the calculated position along the particular dimension.
7. Apparatus according to claim 6, wherein the first group of objects consists of a single object.
8. Apparatus according to claim 7, wherein the explicit formula is defined so as to retain the routing topology of the layer.
9. Apparatus according to claim 6, wherein the explicit formula is representative of a plurality of defect sizes.
10. A system for post-route optimization of a position in a particular dimension, of a first group of at least one object in an integrated circuit layout layer, the system comprising a memory and a data processor coupled to the memory, the data processor configured to:
calculate, using an explicit formula, an optimal position for the first group of objects in the particular dimension, the optimal position being a position in the particular dimension that minimizes a sum of the average critical area on both sides of the first group of objects which are opposite each other in the particular dimension; and
move the first group of objects in the layer to the calculated position along the particular dimension.
11. A system according to claim 10, wherein the first group of objects consists of a single object.
12. A system according to claim 11, wherein the single object has second and third neighboring objects on respectively opposite sides of the single object in the layer,
and wherein the explicit formula calculates the optimal position for the single object as having approximately a spacing sij* from the second neighboring object given by:
s
ij
*

=

1

1
+
b
ik
b
ij
,
where bij is the mutual visibility length of the single object relative to the second neighboring object, and bik is the mutual visibility length of the single object relative to the third neighboring object.
13. A system according to claim 10, wherein the explicit formula is defined so as to retain the routing topology of the layer.
14. A system according to claim 10, wherein the explicit formula is representative of a plurality of defect sizes.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An axial flow fan assembly comprising:
a mounting panel having a through-hole to allow fluid to flow therethrough; and
an axial flow fan including,
a plurality of fan blades rotatably installed in the through-hole of the mounting panel to generate a suction force;
a fan shroud connecting outer ends of the plurality of fan blades to each other to guide the fluid flowing by the suction force;
a flange outwardly extended from the fan shroud to diminish the backflow of the fluid through a gap between the fan shroud and the through-hole of the mounting panel; and
a plurality of balancing protrusions regularly arranged into an annular form with a certain interval therebetween, so as to reduce vibration of the axial flow fan,
wherein the plurality of balancing protrusions are included in the flange of the axial flow fan.
2. The axial flow fan assembly as set forth in claim 1, wherein the flange has a diameter larger than that of the through-hole of the mounting panel to block the gap between the fan shroud and the through-hole of the mounting panel, and the flange is positioned apart from an edge of the through-hole of the mounting panel while being closest to an edge of the through-hole without interfering with the edge of the through-hole.
3. The axial flow fan assembly as set forth in claim 2, wherein the mounting panel includes a panel shroud extended from a position adjacent to the edge of the through-hole and covering the outer edge of the flange.
4. The axial flow fan assembly as set forth in claim 1, wherein the plurality of balancing protrusions are included in the fan shroud of the axial flow fan.
5. The axial flow fan assembly as set forth in claim 1, wherein an outer circumferential edge of the flange is rearwardly bent and extended to be parallel to the fan shroud.
6. The axial flow fan assembly as set forth in claim 1, wherein the balancing protrusions are individually removable.
7. A fan assembly comprising:
a mounting panel having an air passage formed within the panel;
a fan including a fan shroud connecting a plurality of fan blades, and a flange extending radially from the fan shroud to a predetermined distance beyond the diameter of the air passage, wherein the fan is located in the air passage; and
a plurality of balancing weights to allow vibration of the fan to be easily reduced
wherein the plurality of balancing weights are included in the fan shroud.
8. The fan assembly as in claim 7, wherein the plurality of balancing weights are included in the flange.
9. The fan assembly as in claim 7, wherein the mounting panel includes a panel shroud extending radially from the panel out beyond the outer edge of the flange.
10. The fan assembly as in claim 7, wherein an outer circumferential edge of the flange is rearwardly bent and extended to be parallel to the fan shroud.
11. The fan assembly as in claim 7, wherein the balancing weights are individually removable.
12. An axial flow fan assembly comprising:
a mounting panel having an annular panel shroud and having an air passage formed within the panel; and
a fan located in the air passage, wherein the fan includes a fan shroud connecting a plurality of fan blades, and a flange extending radially from the fan shroud to a predetermined distance beyond the diameter of the air passage while remaining inside the annular panel shroud,
wherein a plurality of balancing weights are included in the fan, the balancing weights being individually removable.
13. The axial flow fan assembly as in claim 12, wherein the plurality of balancing weights are disposed around the flange and extend from the surface of the flange while not extending beyond the outer edge of the flange.
14. The axial flow fan assembly as in claim 6, wherein the plurality of balancing weights are disposed around the fan shroud.
15. The axial flow fan assembly as in claim 12, wherein an outer circumferential edge of the flange is rearwardly bent and extended to be parallel to the fan shroud.
16. A fan assembly, comprising:
a mounting panel having a passage formed therein;
a fan including a plurality of fan blades, the fan being positioned in the passage;
a fan shroud surrounding the fan;
a flange extending radially from the fan shroud to a predetermined distance beyond the passage; and
a plurality of balancing weights included in the fan shroud to allow vibration of the fan to be easily reduced.