Author: claimsbot

1. A folding knife comprising:
a blade having a tip, a tang portion, the tang portion having an end opposite the tip and a tang side surface, the tang side surface having a recess;
a first handle side being bifurcated by a longitudinally extended slot into a first portion and a spring locking portion, the slot having an open end and a closed end opposite the open end, the spring locking portion of the first handle side having a spring locking end adjacent to the open end of the slot and a wear pin disposed in the spring locking end, the wear pin extending beyond the spring locking end and slightly below a plane of the spring locking portion and toward the blade, when closed the wear pin springably slides into the recess of the tank thereby maintain the closed position, and when the blade of the folding knife is rotated to the open position, the wear pin slides under the end of the tank thereby locking the blade in the open position;
a second handle side; and
a pivot bolt extending through the first portion of the first handle side proximate the open end of the slot, through the tang portion of the blade, and through the second handle side allowing the blade to pivot at the tang portion, the blade is parallel to the first handle side and the second handle side;
wherein the spring locking portion is biased toward the blade such that when the blade is rotated to a closed position, the spring locking portion is springably disposed in the recess of the tang, and to open the folding knife, the blade is rotated such that the spring locking end springably slides under the end of the tang thereby locking the blade in an open position.
2. The folding knife of claim 1, wherein the first handle side and the second handle side are made of aluminum.
3. The folding knife of claim 1, wherein the first handle side and the second handle side are made of zinc.
4. The folding knife of claim 1, wherein the first handle side and the second handle side are made of plastic.
5. The folding knife of claim 1, wherein the recess in the tang of the blade is a hole.
6. The folding knife of claim 1, wherein the recess in the tang of the blade is a substantially round concavity.
7. The folding knife of claim 1, further comprising an overbend screw disposed in the first portion of the first handle side, the overbend screw having a screw head extending across the slot and a portion of the spring locking portion of the first handle side thereby not allowing the spring locking portion to extend above the plane of the first portion.
8. The folding knife of claim 1, wherein the pivot bolt further comprises a bolt head that extends across the slot and a portion of the spring locking portion of the first handle side thereby not allowing the spring locking portion to extend above the plane of the first portion.
9. The folding knife of claim 1, wherein the wear pin is replaceable.
10. A folding knife, comprising:
a handle having a length and a slot disposed the length of the handle and open at a distal end, a portion of the handle on a first side of the slot is a handle side having a side bifurcated slot open proximate the distal end of the handle, in communication with the slot and the side slot is a spring locking portion that is biased toward the center of the slot and having a spring end proximate the distal end of the handle;
a blade disposed within the slot of the handle having a tang at one end and pivotally attached by a pivot bolt at the distal end of the handle at the tang, the tang having a tang end and a tang side, the tang side having a tang recess; and
a wear pin is disposed in the spring end of spring locking portion of the handle;
wherein when the blade is pivoted to an open position the wear pin of the spring locking portion springably slides under the tang end of the blade thereby locking the blade in the open position, and when the spring locking portion is released from under the tang end and the blade is pivoted to a closed position thereby disposing the blade within the handle, the wear pin is springably disposed into the tang recess thereby locking the blade in the closed position.
11. The folding knife of claim 10, wherein the handle is made of aluminum.
12. The folding knife of claim 10, wherein the handle is made of zinc.
13. The folding knife of claim 10, wherein the handle is made of plastic.
14. The folding knife of claim 10, wherein the tang recess is a hole.
15. The folding knife of claim 10, wherein the tang recess is a substantially round concavity.
16. The folding knife of claim 10, further comprising an overbend screw disposed in the handle side, the overbend screw having a screw head extending across the side slot to the spring locking portion thereby not allowing the spring locking portion to extend above a plane of the handle side.
17. The folding knife of claim 10, wherein the pivot bolt further comprises a bolt head that extends across the side slot and a portion of the spring locking portion thereby not allowing the spring locking portion to extend above a plane of the handle side.
18. The folding knife of claim 10, wherein the wear pin is replaceable.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A microelectronic assembly, comprising:
an interconnection substrate having a first surface, a second surface remote from the first surface in a vertical direction, conductive structure thereon, and terminals exposed at the second surface for connection with a component;
at least two logic chips overlying the first surface of the substrate, each logic chip having a plurality of signal contacts at a front surface thereof confronting the first surface of the interconnection substrate, the signal contacts of each logic chip being directly electrically connected to the signal contacts of the other logic chips through the conductive structure of the substrate for transfer of signals between the logic chips, the signals representing at least one of data or instructions, the logic chips being adapted to simultaneously execute a set of instructions of a given thread of a process, and each logic chip having a rear surface opposite the front surface; and
a memory chip having a front surface with contacts thereon, the front surface of the memory chip confronting the rear surface of each of the at least two logic chips, the contacts of the memory chip being directly electrically connected to the signal contacts of at least one of the at least two logic chips through the conductive structure of the substrate.
2. The microelectronic assembly as claimed in claim 1, further comprising an intermediate interposer substrate located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, the intermediate interposer substrate having at least one conductive via extending therethrough between opposing first and second surfaces thereof, wherein the conductive structure of the substrate includes the at least one conductive via.
3. The microelectronic assembly as claimed in claim 1, further comprising at least one solder connect extending from the front surface of the memory chip in the vertical direction and located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the conductive structure of the substrate includes the at least one solder connect.
4. The microelectronic assembly as claimed in claim 1, further comprising at least one conductive pillar extending from the interconnection substrate in the vertical direction and located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the conductive structure of the substrate includes the at least one conductive pillar, each conductive pillar being electrically connected to a respective conductive element exposed at the front surface of the memory chip by a conductive mass.
5. The microelectronic assembly as claimed in claim 1, further comprising at least one conductive post extending from the front surface of the memory chip in the vertical direction and located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the conductive structure of the substrate includes the at least one conductive post, each conductive post being electrically connected to a respective conductive element exposed at the first surface by a conductive mass.
6. The microelectronic assembly as claimed in claim 1, further comprising at least one conductive pillar extending from the interconnection substrate in the vertical direction and at least one conductive post extending from the front surface of the memory chip in the vertical direction, each of the conductive pillars and posts located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the conductive structure of the substrate includes the conductive pillars and posts, each conductive pillar being electrically connected to a respective conductive post by a conductive mass.
7. The microelectronic assembly as claimed in claim 1, wherein the interconnection substrate includes at least one raised surface extending above the first surface in the vertical direction, the at least one raised surface located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the conductive structure of the substrate includes at least one conductive contact of the at least one raised surface.
8. The microelectronic assembly as claimed in claim 7, wherein the at least one raised surface includes a plurality of stacked dielectric layers overlying the first surface of the interconnection substrate.
9. The microelectronic assembly as claimed in claim 1, further comprising an encapsulant having a substantially planar major surface, the encapsulant extending between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the major surface of the encapsulant is substantially co-planar with the rear surface of each of the first and second logic chips.
10. The microelectronic assembly as claimed in claim 9, wherein the encapsulant has at least one conductive via extending therethrough between the major surface and a second surface opposite the major surface, and the conductive structure of the substrate includes the at least one conductive via.
11. A microelectronic assembly, comprising:
an interconnection substrate having a first surface, a second surface remote from the first surface in a vertical direction, conductive structure thereon, and terminals exposed at the second surface for connection with a component;
at least two logic chips overlying the first surface of the substrate, the logic chips having adjacent parallel edges spaced apart by no more than 500 microns, each logic chip having a plurality of signal contacts at a front surface thereof confronting the first surface of the interconnection substrate, the signal contacts of each logic chip being directly electrically connected to the signal contacts of the other logic chips through the conductive structure of the substrate for transfer of signals between the logic chips, the signals representing at least one of data or instructions, the logic chips being adapted to simultaneously execute a set of instructions of a given thread of a process, and each logic chip having a rear surface opposite the front surface; and
a memory chip having a front surface with contacts thereon and a rear surface opposite the front surface, the front surface of the memory chip confronting the rear surface of at least one of the at least two logic chips, the contacts of the memory chip being directly electrically connected to the signal contacts of at least one of the at least two logic chips through the conductive structure of the substrate.
12. The microelectronic assembly as claimed in claim 11, further comprising at least one wire bond extending from the front surface of the memory chip to the first surface of the interconnection substrate, the at least one wire bond located between first and second logic chips of the at least two logic chips in a horizontal direction perpendicular to the vertical direction, wherein the conductive structure of the substrate includes the at least one wire bond.
13. The microelectronic assembly as claimed in claim 1 or claim 11, wherein the interconnection substrate has an effective CTE less than 10 ppm\xb0 C.
14. The microelectronic assembly as claimed in claim 13, further comprising a second substrate having a surface that faces the second surface of the interconnection substrate, the second substrate having contacts electrically connected with the terminals of the interconnection substrate, the second substrate having an effective CTE greater than or equal to 10 ppm\xb0 C. and having second terminals on a surface opposite the surface that faces the interconnection substrate.
15. The microelectronic assembly as claimed in claim 1 or claim 11, wherein the interconnection substrate has an effective CTE less than 7 ppm\xb0 C.
16. The microelectronic assembly as claimed in claim 1 or claim 11, wherein the at least two logic chips have substantially identical structure.
17. The microelectronic assembly as claimed in claim 1 or claim 11, wherein the conductive structure of the substrate includes a plurality of electrically conductive traces extending in a direction substantially parallel to the first surface.
18. The microelectronic assembly as claimed in claim 1 or claim 11, further comprising a heat spreader at least partially overlying a rear surface of at least one of the logic chips.
19. The microelectronic assembly as claimed in claim 18, wherein the heat spreader at least partially overlies the memory chip.
20. The microelectronic assembly as claimed in claim 19, wherein the memory chip has a first width in a horizontal direction perpendicular to the vertical direction and first and second logic chips of the at least two logic chips have a combined second width in the horizontal direction, the first width being less than the second width.
21. The microelectronic assembly as claimed in claim 20, wherein the heat spreader includes a pedestal portion extending beyond a lower surface thereof, the pedestal portion contacting the rear surface of at least one of the first and second logic chips.
22. The microelectronic assembly as claimed in claim 18, wherein the memory chip at least partially overlies an upper surface of the heat spreader.
23. The microelectronic assembly as claimed in claim 22, wherein the conductive structure of the substrate includes a lead extending through an opening in the heat spreader.
24. The microelectronic assembly as claimed in claim 22, further comprising a plurality of heat spreaders including said heat spreader, each of the plurality of heat spreaders at least partially overlying a rear surface of at least one of the logic chips, wherein the conductive structure of the substrate includes a lead extending between edges of two adjacent ones of the plurality of heat spreaders.
25. A system comprising a structure according to claim 1 or claim 11 and one or more other electronic components electrically connected to the structure.
26. A system as claimed in claim 25, further comprising a housing, said structure and said other electronic components being mounted to said housing.

1. A method for producing a noble metal film comprising the step of sputtering a noble metal on a substrate thus obtaining a film, wherein the method further comprises the step of subjecting the film to a thermal treatment, thus obtaining the noble metal film.
2. The method according to claim 1, wherein the thermal treatment is carried out at a temperature of at least 300\xb0 C.
3. The method according to claim 1, wherein the thermal treatment comprises a step of annealing the film.
4. The method according to claim 1, wherein the thermal treatment comprises a step of flaming the film.
5. The method according to claim 3, wherein, during the annealing step, the film is heated in the presence of air.
6. The method according to claim 3, wherein the annealing step involves a heating at a temperature comprised between 320 and 400\xb0 C., preferably about 350\xb0 C.
7. The method according to claim 6, wherein the heating is carried out for 8 to 15 h, in particular for about 12 h.
8. The method according to claim 5, wherein the film is heated at a heating rate of 5\xb0 C.min.
9. The method according to claim 4, wherein the flaming step involves a heating at a temperature of at least 1000\xb0 C.
10. The method according to claim 4, wherein the flaming step involves a heating at a temperature comprised between 1000 and 1300\xb0 C., preferably comprised between 1000 and 1200\xb0 C.
11. The method according to claim 4, wherein the flaming step is performed by means of a butane flame.
12. The method according to claim 4, wherein the flaming step is carried out for about 20 to 40 sec, in particular for 30 sec.
13. The method according to claim 1, wherein, after the thermal treatment, the metal noble film is sonicated in CH3OH bath at room temperature.
14. The method according to claim 1, wherein, after the thermal treatment, the metal noble film is immersed in a CH3OH bath at a temperature of at least 50\xb0 C., preferably of 60\xb0 C.
15. The method according to claim 14, wherein the metal noble film is immersed in the CH3OH bath for at least 50 h, preferably 70 h.
16. The method according to claim 1, wherein the sputtering step is performed under inert gas atmosphere.
17. The method according to claim 1, wherein during the sputtering step the film is located in a sputter chamber having a negative cathode which is made of the noble metal to be sputtered and an anode plate on which the substrate is placed.
18. The method according to claim 17, wherein the chamber is under a set relative vacuum, of about 1\xd710\u22121 mbar.
19. The method according to claim 1, wherein the metal noble film is an ultra-thin film having a thickness comprised between 10 nm and 30 nm.
20. The method according to claim 19, wherein the noble metal is platinum.
21. The method according to claim 1, wherein the substrate is made of an optically transparent material having a rough surface such as glass.
22. A method for producing a noble metal film comprising the step of sputtering platinum on a substrate thus obtaining a film of platinum, wherein the film of platinum is thermally treated in such a way to obtain a film of platinum suitable for a self-assembled thiol-terminated molecule-based materials and for in situ chemical synthesis, the film of platinum further having a resistivity comprised between 346 10\u22126 \u03a9cm and 10 10\u22126 \u03a9cm, an optical transmittance in the UV region higher than 70%, and a load resistance comprised between 0.73 mN and 1.0 mN.
23. The method of claim 22, wherein the film is treated by means of a annealing step.
24. The method of claim 22, wherein the film is treated by means of a flaming step.
25. The method of claim 22, wherein the substrate is made of glass.
26. A composite structure comprising a substrate and a noble metal film formed on the substrate and suitable for use as base for self-assembled molecular layers wherein the noble metal film has an optical transmittance of at least 70% and at least a resistivity having average values comprised between about 346\xd710\u22126 \u03a9cm and about 10\xd710\u22126 \u03a9cm.
27. The composite structure according to claim 26, wherein the substrate is made of glass.
28. The composite structure according to claim 26, wherein the noble metal film has a load resistance comprised between about 0.73 mN and about 1.0 mN.
29. The composite structure according to claim 26, wherein the noble metal film consists of polycrystals having lateral size which is comprised between about 40 and about 100 nm and height which is comprised between about 9 and about 20 nm.
30. The composite structure according to claim 26, wherein the noble metal film comprises a network of worm-like noble metal film on the substrate.
31. A system for producing a noble metal film on a substrate, the system comprising:
a sputtering system operable to sputter a noble metal onto the substrate to form an intermediate noble metal film; and
a thermal treatment component operable to receive the substrate containing the intermediate noble metal film and operable to thermally treat the substrate containing the intermediate noble metal film to form the noble metal film on the substrate.
32. The system of claim 31 wherein the thermal treatment component comprises an annealing oven operable to anneal the substrate and intermediate noble metal film to form the noble metal film on the substrate.
33. The system of claim 32 wherein the annealing oven comprises an anode coupled to the substrate and a cathode formed of the noble metal from which the noble metal film is to be formed.
34. The system of claim 32 wherein the noble metal comprises a platinum film.
35. The system of claim 32 wherein the thermal treatment component is operable to heat to the substrate and intermediate noble metal film in the presence of air at a temperature comprised between 320 and 400\xb0 C., for 8 to 15 hours, and at a heating rate of 5\xb0 C.min.
36. The system of claim 31 wherein the thermal treatment component comprises a flaming component operable to flame the intermediate noble metal film to form the noble metal film on the substrate.
37. The system of claim 36 wherein flaming component is operable to flame the intermediate noble film with a butane flame at a temperature of between 1000 and 1300\xb0 C.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A computerized system for linking one or more actionable orders transmitted over an electronic network, the system comprising:
a communications manager, wherein the communications manager is arranged and configured to:
receive the one or more actionable orders;
cause the transmission of one or more sellside orders based on the one or more actionable orders via the electronic network;
create one or more IOI’s corresponding to the one or more actionable orders;
cause the transmission of the one or more IOI’s;
receive one or more orders in response to the one or more IOI’s; and
transmit one or more buyside orders based on the one or more received orders via the electronic network for fulfillment, wherein the communications manager is configured and arranged to retain the anonymity of the one or more orders and the source of the one or more orders until the one or more buyside orders are filled.
2. The system of claim 1 wherein:
the one or more actionable orders are transmitted from one or more sellers via the electronic network;
the one or more orders are transmitted from one or more buyers via the electronic network; and
the communications manager is further arranged and configured to:
receive seller identifying data;
receive buyer identifying data;
verify the identity of the one or more sellers based on the seller identifying data; and
verify the identity of the one or more buyers based on the buyer identifying data.
3. The system of claim 1 wherein the one or more sellside orders is the one or more actionable orders.
4. The system of claim 1 wherein the communications manager is further arranged and configured to:
receive one or more fulfillment notifications;
generate one or more execution reports based on the one or more fulfillment notifications; and
transmit the one or more execution reports to one or more selected recipients.
5. The system of claim 1 wherein the communications manager is further arranged and configured to:
create one or more authorization keys;
associate the one or more authorization keys with the one or more actionable orders;
associate the one or more authorization keys with the one or more corresponding IOI’s;
transmit the one or more authorization keys in connection with the one or more buyside orders.
6. The system of claim 1 wherein the communications manager is further arranged and configured to:
obtain a block size of the one or more actionable orders;
obtain a monetary value of the one or more actionable orders;
analyze the block size and monetary value of each actionable order based on predetermined requirements; and
reject the actionable order if the block size and monetary value do not meet the predetermined requirements.
7. The system of claim 1 wherein the communications manager is further arranged and configured to:
obtain a block size of the one or more orders;
obtain a monetary value of the one or more orders;
analyze the block size and monetary value of each order based on predetermined requirements; and
reject the order if the block size and monetary value of do not meet the predetermined requirements.
8. The system of claim 1 wherein the communications manager is further arranged and configured to:
instruct the trading system to reject the one or more buyside orders if a block size and a monetary value associated with the one or more buyside orders does not meet predetermined requirements.
9. The system of claim 1 wherein the communications manager is further arranged and configured to
generate one or more compliance reports; and
transmit the one or more compliance reports to a regulatory agency.
10. The system of claim 1 further comprising a web server arranged and configured to generate a control interface, the control interface arranged and configured to permit a sellside to enter and modify one or more sellside parameters.
11. The system of claim 10 wherein at least one of the sell side parameters is selected from the group consisting of authorized client identities, authorized client contact information, client credit limits, credit clearance preferences, hide buy instructions, hide sell instructions, accepted payment methods, payment instructions, trade clearance settings, client tier preferences, default parameters.
12. The system of claim 1 further comprising an at least one administrative database for storing one or more sellside profiles.
13. The system of claim 2 further comprising at least one internal database for storing buyer identifying data and seller identifying data.
14. The system of claim 1 wherein the communications manager is configured and arranged to operate in conjunction with one or more FIX protocols.
15. A computerized system for managing data to minimize the risk of information leakage, the system comprising:
a manager component, wherein the manager component is arranged and configured to:
receive actionable order data;
cause the transmission of a sellside order based on the actionable order data for execution in accordance with predetermined segregated execution specifications;
cause the transmission of an IOI;
receive buyside data relating to the IOI;
cause the transmission of a buyside order based on the buyside data for fulfillment, wherein the manager component is configured and arranged to retain the anonymity of the buyside data and the buyside order until the buyside order is executed.
16. A computer readable medium having computer readable program code thereon for execution by one or more computer processors for performing a method comprising:
receiving trade data relating to one or more actionable orders;
causing transmission of one or more sellside orders based on the trade data;
causing transmission of one or more IOI’s relating to the trade data;
receiving IOI data relating to the one or more IOI’s; and
causing transmission of one or more buyside orders based on the IOI data, wherein the anonymity of the one or more buyside orders and IOI data is preserved until the one or more buyside orders are fulfilled.
17. The computer readable medium of claim 16 wherein the trade data is transmitted by one or more sellers and the IOI data is transmitted by one or more buyers and the method further comprises:
receiving seller identifying data;
receiving buyer identifying data;
verifying the identity of the one or more sellers based on the seller identifying data; and
verifying the identity of the one or more buyers based on the buyer identifying data.
18. The computer readable medium of claim 16 wherein the method further comprises:
receiving one or more fulfillment notifications from the trading system;
causing generation of one or more execution reports based on the one or more fulfillment notifications; and
causing transmission of the one or more execution reports to one or more selected recipients.
19. The computer readable medium of claim 16 wherein the method further comprises:
creating one or more authorization keys;
associating the one or more authorization keys with the trade data;
causing transmission of the one or more authorization keys in connection with the one or more sellside orders; and
causing transmission of the one or more authorization keys in connection with the one or more IOI’s.
20. The computer readable medium of claim 16 wherein the method further comprises:
generating one or more compliance reports.