Author: claimsbot

1. A bi-directional ESD protection device, comprising
two DIAC devices, each DIAC device comprising
a first and a second p-well formed in an n-well the n-well being formed in a p-substrate and isolated from the substrate by an n-isolation layer, wherein each of the first and second p-well has a p-buried layer formed under it and each p-well includes a p+ region and an n+ region formed in it, the bi-directional ESD protection device further comprising an additional p-region comprises a p+ ring formed in a p-well surrounding each of the DIAC devices.
2. The device of claim 1, wherein the n+ regions in the two p-wells face each other to define a p+, n+, n+, p+ configuration.
3. The device of claim 1, wherein said p+ region is connected to ground.
4. The device of claim 1, wherein for each DIAC, the p+ and n+ regions in the first and second p-wells are connected together.
5. The device of claim 4, wherein the p+ and n+ regions in the first and second p-wells are connected together by means of a first metal layer.
6. The device of claim 4, wherein the n+ and p+ regions in the first p-well of the one DIAC are connected to an input pad.
7. The device of claim 5, wherein the n+ and p+ regions in the first p-well of the one DIAC are connected to an input pad.
8. The device of claim 7, wherein the n+ and p+ regions in the first p-well of the one DIAC are connected to the input pad by means of a second metal layer.
9. The device of claim 6, wherein the n+ and p+ regions in the second p-well of the other DIAC are connected to a ground pad.
10. The device of claim 9, wherein the n+ and p+ regions in the second p-well of the other DIAC are connected to the ground pad by means of a second metal layer.
11. The device of claim 8, wherein the n+ and p+ regions in the second p-well of the other DIAC are connected to a ground pad.
12. The device of claim 11, wherein the n+ and p+ regions in the second p-well of the other DIAC are connected to the ground pad by means of the second metal layer.
13. The device of claim 9, wherein the n+ and p+ regions of the second p-well of the first DIAC are connected to the n+ and p+ regions in the first p-well of the other DIAC.
14. The device of claim 12, wherein the n+ and p+ regions of the second p-well of the first DIAC are connected to the n+ and p+ regions in the first p-well of the other DIAC by means of the second metal layer.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A system for providing a plurality of telephone services to multiple customer premises equipment via a pair-gain device, said system comprising:
a combiner circuit coupled to combine a plurality of services for delivery between a source and a user along a common line;
a decombiner circuit coupled to recover said plurality of services from said common line and to provide each recovered service to a corresponding customer premises equipment;
a detector circuit coupled to detect a failure condition in at least one of said combiner circuit and said decombiner circuit; and
a switch responsive to said detected failure and coupled to bypass said at least one of said combiner circuit and said decombiner circuit to provide at least one service of said plurality of services that is determined to be critical between said source and said user.
2. The system of claim 1, wherein said plurality of telephone services includes a digital service and an analog service.
3. The system of claim 2, wherein said analog service comprises a voice band service.
4. The system of claim 1, wherein said plurality of telephone services includes a digital data service and a digital voice service.
5. The system of claim 1, wherein said common line comprises a twisted pair copper telephone line.
6. The system of claim 1, wherein said failure condition includes a loss of power.
7. The system of claim 1, wherein said combiner circuit includes a multiplexer and said decombiner circuit includes a demultiplexer.
8. The system of claim 1, wherein said combiner circuit and said decombiner circuit each include an integrated POTS and ADSL transceiver card.
9. The system of claim 1, wherein said switch includes a relay having normally closed contacts.

1. A method comprising:
detecting a key activation of a user operated input device;
testing the key activation for a predetermined number of clock cycles;
storing a key index identifying the activated key in a buffer when the key activation is valid for the predetermined number of clock cycles;
testing the identified activated key for a predetermined number of hardware key scan cycles; and
establishing a key activation event when the key activation is valid for the predetermined number of hardware key scan cycles.
2. The method of claim 1, further comprising:
detecting a key release;
testing the key release for a predetermined number of clock cycles;
testing the key release for a predetermined number of hardware key scan cycles, if the key activation is valid for the predetermined number of clock cycles; and
establishing a key release event, if the key release is valid for the predetermined number of hardware key scan cycles.
3. The method of claim 2, wherein the predetermined number of hardware key scan cycles for testing the key activation is the same as the predetermined number of hardware key scan cycles for the key release.
4. The method of claim 1, further comprising adding a predetermined time delay to each of the hardware key scan cycles.
5. The method of claim 1, wherein the clock cycles are related to system clock cycles.
6. The method of claim 1, wherein the key activation is a key activation selected from the group consisting of a pressed down key on a keyboard, a movement of a mouse, a movement of a joystick, and a sensed event.
7. The method of claim 1, wherein the predetermined number of hardware key scan cycles for testing the key activation is different from the predetermined number of hardware key scan cycles for the key release.
8. The method of claim 1, wherein the user operated input device is a wireless device.
9. A system for detecting a key with key debounce comprising:
a circuit configured to detect a key activation;
a first counter coupled to the circuit and a clock configured to test the key activation for a first predetermined number of clock cycles;
a key debounce buffer configured to store a key index identifying the activated key when the key activation is valid for the first predetermined number of clock cycles;
a second counter configured to test the identified activated key for a first predetermined number of hardware key scan cycles; and
a key event buffer configured to store a key activation event when the key activation is valid for the first predetermined number of hardware key scan cycles.
10. The system of claim 9, wherein the circuit is configured to detect a key release, the first counter is configured to test the key release for a second predetermined number of clock cycles, the second counter is configured to test the key release for a second predetermined number of hardware key scan cycles when the key activation is valid for the second predetermined number of clock cycles, and the key event buffer is configured to store a key release event when the key release is valid for the second predetermined number of hardware key scan cycles.
11. The system of claim 10, wherein the first predetermined number of clock cycles is the same as the second predetermined number clock cycles and the first predetermined number of hardware key scan cycles is the same as the second predetermined number of hardware key scan cycles.
12. The system of claim 10, wherein the first predetermined number of hardware key scan cycles is different from the second predetermined number of hardware key scan cycles.
13. The system of claim 9, wherein the clock cycles are related to system clock cycles.
14. The system of claim 9, wherein the key activation is a key activation selected from the group consisting of a pressed down key on a keyboard, a movement of a mouse, a movement of a joystick, and a sensed event.
15. The system of claim 9, wherein the first counter is an updown counter.
16. The system of claim 9, wherein the second counter is an updown counter.
17. A system comprising:
a wireless keyboard for receiving input from a user;
a first counter coupled to the circuit and a clock configured to test an activation of a key in the keyboard for a predetermined number of clock cycles;
a key debounce buffer configured to store a key index identifying the activated key when the key activation is valid for the first predetermined number of clock cycles;
a second counter configured to test the tested activated key for a predetermined number of hardware key scan cycles when the activation of the key is valid for the predetermined number of clock cycles;
a key event buffer configured to store a key activation event when the key activation is valid for the first predetermined number of hardware key scan cycles; and
an antenna configured to transmit a signal to a host indicating a key activation when the key activation is valid for the first predetermined number of hardware key scan cycles.
18. The system of claim 17, further comprising:
a circuit configured to detecting a release of the key;
a circuit configured to test the release of the key for a predetermined number of clock cycles;
a circuit configured to test the release of the key for a predetermined number of hardware key scan cycles when the key activation is valid for the predetermined number of clock cycles; and
a circuit configured to establish a key release event when the release of the key is valid for the predetermined number of hardware key scan cycles.
19. The system of claim 17, further comprising a circuit configured to add a predetermined time delay to each of the hardware key scan cycles.
20. The system of claim 17, wherein the clock cycles are related to system clock cycles.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An apparatus for compressing media content in an electronic device having a video capture device for capturing the video content, comprising:
a real-time, Low Complexity (LC) video compressor for compressing the video content into an LC encoded bit stream in real-time; and
a non-real-time High Complexity (HC) video compressor for generating an HC encoded bit stream from the LC encoded bit stream in non-real-time.
2. The apparatus of claim 1, further comprising a memory device for storing the LC encoded bit stream therein.
3. The apparatus of claim 1, wherein said non-real-time HC video compressor begins generating the HC encoded bit stream while the video capture device is still capturing the video content and the real-time LC video compressor is still compressing the video content.
4. The apparatus of claim 1, wherein the electronic device is a mobile type of device, being one of a cellular telephone, a Personal Digital Assistant (PDA), a digital camera, and a camcorder.
5. The apparatus of claim 1, wherein the electronic device is a Personal Video Recorder (PVR), and said real-time LC video compressor compresses the video content into the LC encoded bit stream in real-time so as to meet any real-time requirements of the video content, while said non-real-time HC video compressor generates the HC encoded bit stream from the LC encoded bit stream in non-real-time so as to reduce storage requirements of the underlying video content.
6. The apparatus of claim 1, wherein said non-real-time HC video compressor is capable of reusing at least a portion of the LC encoded bit stream so as to avoid having to again encode the at least a portion of the LC encoded bit stream to generate the HC encoded bit stream.
7. The apparatus of claim 1, wherein said real-time LC video compressor compresses the video content into Intra (I) frame types of Motion Picture Experts Group 4-part 10.
8. The apparatus of claim 7, wherein said non-real-time HC video compressor generates the HC encoded bit stream as I, forward Predictive (P), and Bi-predictive (B) frame types of the Motion Picture Experts Group 4-part 10.
9. The apparatus of claim 8, wherein said non-real-time HC video compressor is capable of reusing the I frame types of the LC encoded bit stream so as to avoid having to again encode the I frame types of the LC encoded bit stream to generate the HC encoded bit stream.
10. The apparatus of claim 1, wherein said non-real-time HC video compressor generates the HC encoded bit stream from the LC encoded bit stream so as to minimize bandwidth consumption in a transmission of the HC encoded bit stream from the electronic device in comparison to a transmission of the LC encoded bit stream.
11. The apparatus of claim 1, wherein said real-time, LC video compressor compresses the video content into the LC encoded bit stream so as to increase an amount of the video content that can be immediately stored subsequent to capture.
12. The apparatus of claim 1, wherein said electronic device is further capable of capturing audio content, and said apparatus further comprises:
a real-time LC audio compressor for compressing the audio content into another LC encoded bit stream that corresponds to the audio content; and
a non-real-time HC audio compressor for generating another HC encoded bit stream from the other LC encoded bit stream corresponding to the audio content.
13. The apparatus of claim 12, wherein said real-time LC audio compressor compresses the audio content using Moving Picture Experts Group Layer-3 Audio (MP3), and said non-real-time audio compressor generates the other HC encoded bit stream from the other LC encoded bit stream using MP3-Pro.
14. A method for compressing media content in an electronic device having a video capture device for capturing the video content, comprising the steps of:
compressing, in real-time, the video content into an Low Complexity (LC) encoded bit stream; and
generating, in non-real-time, an HC encoded bit stream from the LC encoded bit stream.
15. The method of claim 14, wherein said generating step begins generating the HC encoded bit stream while the video capture device is still capturing the video content and the video content is still being compressed into the LC encoded bit stream.
16. The method of claim 14, wherein the electronic device is a mobile type of device, being one of a cellular telephone, a Personal Digital Assistant (PDA), a digital camera, and a camcorder.
17. The method of claim 14, wherein the electronic device is a Personal Video Recorder (PVR), and said compressing step compresses the video content into the LC encoded bit stream in real-time so as to meet any real-time requirements of the video content while said generating step generates the HC encoded bit stream from the LC encoded bit stream in non-real-time so as to reduce storage requirements of the underlying video content.
18. The method of claim 14, wherein said generating step is capable of reusing at least a portion of the LC encoded bit stream so as to avoid having to again encode the at least a portion of the LC encoded bit stream to generate the HC encoded bit stream.
19. The method of claim 14, wherein said compressing step compresses the video content into Intra (I) frame types of Motion Picture Experts Group 4-part 10.
20. The method of claim 19, wherein said generating step generates the HC encoded bit stream as I, forward Predictive (P), and Bi-predictive (B) frame types of the Motion Picture Experts Group 4-part 10.
21. The method of claim 20, wherein said generating step is capable of reusing the I frame types of the LC encoded bit stream so as to avoid having to again encode the I frame types of the LC encoded bit stream to generate the HC encoded bit stream.
22. The method of claim 14, wherein said generating step generates the HC encoded bit stream from the LC encoded bit stream so as to minimize bandwidth consumption in a transmission of the HC encoded bit stream from the electronic device in comparison to a transmission of the LC encoded bit stream.
23. The method of claim 14, wherein said compressing step compresses the video content into the LC encoded bit stream so as to increase an amount of the video content that can be immediately stored subsequent to capture.
24. The method of claim 14, wherein said electronic device is further capable of capturing audio content, and said method further comprises the steps of:
compressing the audio content into another LC encoded bit stream that corresponds to the audio content; and
generating another HC encoded bit stream from the other LC encoded bit stream corresponding to the audio content.
25. The method of claim 24, wherein said step of compressing the audio content compresses the audio content using Moving Picture Experts Group Layer-3 Audio (MP3), and said step of generating another HC encoded bit stream generates the HC encoded bit stream from the LC encoded bit stream using MP3-Pro.