1. A MOS transistor, comprising:
a semiconductor substrate of a first conductivity type;
an insulated gate pattern including a gate electrode on the substrate and a capping layer on the gate electrode, the insulated gate pattern having sidewalls formed on a predetermined region of the semiconductor substrate of the first conductivity type so that portions of the semiconductor substrate of the first conductivity type on at least one side of the insulated gate pattern remain uncovered by the insulated gate pattern;
impurity regions of a second conductivity type formed in a surface of the semiconductor substrate of the first conductivity type at at least one side of the insulated gate pattern; and
a conformal polycrystalline pad of the second conductivity type formed on the impurity regions to directly contact and cover at least the impurity regions, wherein:
the conformal polycrystalline pad covers a portion of each of the sidewalls of the insulated gate pattern and exposes a portion of each of the sidewalls of the insulated gate pattern,
the gate electrode has sidewalls that form a section of the sidewalls of the insulated gate pattern,
the conformal polycrystalline pad extends above a bottom of the gate electrode so as to cover a portion of each of the sidewalls of the gate electrode and exposes a portion of each of the sidewalls of the gate electrode, and
the capping layer is an insulator.
2. The MOS transistor as claimed in claim 1, wherein the gate electrode comprises doped polysilicon or polycide.
3. The MOS transistor as claimed in claim 1, wherein the insulated gate pattern includes a gate insulating layer interposed between a gate electrode and the semiconductor substrate.
4. The MOS transistor as claimed in claim 1, further comprising an interlayer insulating layer covering the insulated gate pattern and a portion of the conformal polycrystalline pad.
5. The MOS transistor as claimed in claim 1, further comprising a metal interconnection electrically connected to the conformal polycrystalline pad.
6. The MOS transistor as claimed in claim 5, wherein the metal interconnection comprises aluminum or aluminum alloy.
7. The MOS transistor as claimed in claim 1, wherein the insulated gate pattern has a top surface that connects the sidewall to a second sidewall, and
no portion of the top surface is covered by the conformal polycrystalline pad.
8. The MOS transistor as claimed in claim 1, further comprising a land of a first interlayer insulating layer defined directly on the insulated gate pattern.
9. The MOS transistor as claimed in claim 8, further comprising a second interlayer insulating layer covering the land and the insulated gate pattern.
10. The MOS transistor as claimed in claim 1, wherein each of the sidewalls of the insulated gate pattern has a single surface.
11. The MOS transistor as claimed in claim 1, wherein the impurity regions are LDD-type impurity regions that extend laterally underneath the gate electrode.
12. The MOS transistor as claimed in claim 1, wherein the capping layer has a same width as the gate electrode.
13. The MOS transistor as claimed in claim 12, wherein the capping layer comprises silicon nitride.
14. The MOS transistor as claimed in claim 13, wherein:
at least one spacer is disposed on at least one sidewall of the insulated gate pattern and in contact with the capping layer, and
the at least one spacer comprises silicon nitride.
15. The MOS transistor as claimed in claim 12, further comprising at least one spacer disposed on at least one sidewall of the insulated gate pattern and in contact with the capping layer.
16. A MOS transistor device, comprising:
a gate stack including a gate electrode, the gate stack disposed on a semiconductor substrate of a first conductivity type, the semiconductor substrate having an impurity region of a second conductivity type formed in a surface thereof adjacent to the gate stack;
an insulating capping layer on the gate electrode and having a same width as the gate electrode; and
a buffer layer of the second conductivity type disposed directly on the impurity region and covering the impurity region, wherein:
the impurity region is a LDD-type impurity region that extends laterally underneath the gate electrode,
the buffer layer extends away from the substrate along the gate stack,
the gate stack extends above the buffer layer, and
the buffer layer extends above a bottom of the gate electrode, an uppermost portion of the buffer layer being closer to the substrate than is an uppermost portion of the gate electrode.
17. The MOS transistor device as claimed in claim 16, wherein the capping layer is disposed directly on the gate electrode, and
the MOS transistor device further includes a spacer disposed alongside the gate stack and between the gate stack and the buffer layer, such that at least a portion of the spacer is exposed by the buffer layer.
18. The MOS transistor device as claimed in claim 17, wherein the capping layer is in contact with the spacer, and the capping layer and the spacer are both formed of silicon nitride.
19. A MOS transistor device, comprising:
a gate stack including a gate electrode and an insulating etch stop layer on the gate electrode, the gate stack disposed on a semiconductor substrate of a first conductivity type, the semiconductor substrate having an impurity region of a second conductivity type formed in a surface thereof adjacent to the gate stack;
an oxide layer on the etch stop layer; and
a buffer layer of the second conductivity type disposed directly on the impurity region and covering the impurity region, wherein:
the impurity region is a LDD-type impurity region that extends laterally underneath the gate electrode,
the buffer layer extends away from the substrate along the gate stack,
the gate stack extends above the buffer layer,
the buffer layer is disposed on a first side of the gate electrode so as to extend above a bottom of the gate electrode, and
the buffer layer does not completely overlap the first side of the gate electrode.
20. The MOS transistor device as claimed in claim 19, wherein the etch stop layer has a same width as the gate electrode.
21. The MOS transistor device as claimed in claim 19, further comprising a spacer disposed laterally adjacent to the gate stack and overlaps at least a portion of the etch stop layer.
22. The MOS transistor device as claimed in claim 21, wherein the spacer completely overlaps the gate electrode.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A method of producing an electron-emitting device comprising the step of forming a pair of electrodes and an electrically-conductive thin film on a substrate in such a manner that said pair of electrodes are in contact with said electrically-conductive thin film and forming an electron emission region using said electrically-conductive thin film, wherein a solution containing a metal element is supplied in a droplet form onto said substrate thereby forming said electrically-conductive thin film.
2. A method of producing an electron-emitting device according to claim 1, wherein said electrically-conductive thin film is formed after forming said pair of electrodes.
3. A method of producing an electron-emitting device according to claim 1, wherein said electrically-conductive thin film is formed before forming said pair of electrodes.
4. A method of producing an electron-emitting device according to claim 1, wherein said droplet is supplied by means of an ink-jet technique.
5. A method of producing an electron-emitting device according to claim 4, wherein said ink-jet technique is to form a bubble in a solution by means of thermal energy thereby ejecting said solution in a droplet form.
6. A method of producing an electron-emitting device according to claim 2, wherein the amount of said droplet supplied between said pair of electrodes is less than the volume of a recessed space formed with said substrate and said pair of electrodes.
7. A method of producing an electron-emitting device according to claim 1, including the steps of: supplying one or more droplets of solution onto said substrate, said solution including a material constituting said electrically-conductive thin film; detecting the state of said supplied droplets; and supplying one or more droplets again on the basis of the obtained information of the state of said supplied droplets.
8. A method of producing an electron-emitting device according to claim 7, wherein said solution containing the material constituting said thin film is a solution in which said material is dispersed.
9. A method of producing an electron-emitting device according to claim 7, wherein said solution containing the material constituting said thin film is a solution in which said material is dissolved.
10. A method of producing an electron-emitting device according to claim 7, wherein the items of the state of the supplied droplet to be detected include at least one item selected from the items including the presence or absence of a droplet, the amount of a supplied droplet, and the location at which a droplet is supplied.
11. A method of producing an electron-emitting device according to claim 7, wherein in the case where no droplet has been deposited, a droplet is supplied again under the same condition.
12. A method of producing an electron-emitting device according to claim 7, wherein in the case where the amount of the supplied droplet is greater than an acceptable upper limit, at least a part of said supplied droplet is removed.
13. A method of producing an electron-emitting device according to claim 7, wherein in the case where a droplet has been supplied in an inadequate fashion, a droplet is supplied again after adjusting the ejecting condition.
14. A method of producing an electron-emitting device according to claim 7, wherein, on the basis of information obtained by detecting the state of a supplied droplet, the ejecting condition for another ejecting position is adjusted.
15. A method of producing an electron-emitting device according to claim 13, wherein said ejecting conditions to be adjusted include at least either the number of times of ejecting operations or the ejecting position.
16. A method of producing an electron-emitting device according to claim 7, wherein the state of a supplied droplet is detected by illuminating the position at which said droplet is supplied and then detecting the light which is either reflected from said position or transmitted through said position.
17. A method of producing an electron-emitting device according to claim 7, wherein the state of a supplied droplet is detected after positioning the detection position at a predetermined position at which a droplet is to be supplied.
18. A method of producing an electron-emitting device according to claim 1, wherein said electrically-conductive thin film is formed by supplying a plurality of droplets so that the center-to-center distance between adjacent dots formed by said droplets is less than the diameter of said dot.
19. A method of producing an electron-emitting device according to claim 18, wherein the film thickness of the electron emission region formed of said electrically-conductive thin film is controlled by controlling the amount of a supplied droplet andor the number of supplied droplets.
20. A method of producing an electron-emitting device according to claim 18, wherein before supplying said droplet onto said substrate, the surface of said substrate is treated so that the surface of said substrate becomes hydrophobic.
21. An electron source substrate comprising a plurality of electron-emitting devices disposed on said substrate, wherein said electron-emitting devices are produced by the method according to claim 1.
22. An electron source wherein a plurality of electron-emitting devices formed on the electron source substrate according to claim 21 are connected to each other.
23. A display panel comprising a rear plate provided with said electron source according to claim 22 and a face plate provided with a fluorescent film, wherein said rear plate and said face plate are located at opposing positions, whereby said fluorescent film is irradiated by an electron emitted by said electron source thereby displaying an image.
24. An image-forming apparatus comprising the display panel according to claim 23, wherein a driving circuit is connected to said display panel.
25. An apparatus for producing an electron-emitting device, said apparatus comprising: droplet supplying means for ejecting a droplet containing a metal element toward a substrate thereby supplying said droplet on said substrate; detection means for detecting the state of said supplied droplet; and control means for controlling the ejecting condition of said droplet supplying means on the basis of the information obtained via said detection means.
26. An apparatus according to claim 25, wherein said detection means includes at least either droplet information detection means for detecting the presence or absence of a droplet and also detecting the amount of the droplet or droplet arrival position detection means for detecting the position at which a droplet has been supplied.
27. An apparatus according to claim 26, wherein said droplet information detection means and said droplet arrival position detection means are both implemented within the same single optical detecting system.
28. An apparatus according to claim 26, capable of simultaneously detecting both droplet information and droplet arrival position.
29. An apparatus according to claim 26, capable of successively detecting the droplet information and the droplet arrival position.
30. An apparatus according to claim 25, further comprising positioning means for performing a positioning operation on the basis of the information obtained via said detection means.
31. An apparatus according to claim 25, further comprising droplet removing means for removing at least a part of the supplied droplet.
32. An apparatus according to claim 31, wherein said droplet removing means includes a dedicated removing nozzle for ejecting gas thereby blowing away a droplet from a gap.
33. An apparatus according to claim 25, wherein said droplet supplying means is based on an ink-jet technique.
34. An apparatus according to claim 33, wherein said ink-jet technique is to form a bubble in a solution by means of thermal energy thereby ejecting said solution in a droplet form.
35. An apparatus according to claim 33, wherein said ink-jet technique is to eject a solution in a droplet form by means of using a piezo-electric device.