1. A record carrier (10) having a plurality of stacked layers (12, 14, 16, 18) comprising at least one colored pixel pattern layer (14) and at least one mask layer (18) on top of at least a region of the colored pixel pattern layer, the optical transparency of a region of the mask layer changing by applying heat by a laser beam (24) to the region of the mask layer, characterized in that at least one thermal barrier layer (16) is provided between the colored pixel pattern layer and the mask layer.
2. The record carrier according to claim 1, wherein the plurality of stacked layers (12, 14, 16, 18) comprises a substrate (12) on top of which the colored pixel pattern layer (14), the thermal barrier layer (16) and the mask layer (18) are arranged, and wherein the substrate (12) comprises grooves for tracking purposes.
3. The record carrier according to claim 1, wherein the colored pixels are at least partly aligned with the grooves.
4. The record carrier according to claim 1, wherein calibration apertures are provided in the mask layer.
5. The record carrier according to claim 1, wherein the sequence of layers is (a) substrate, (b) colored pixel pattern layer, (c) thermal barrier layer, and (d) mask layer.
6. The record carrier according to claim 1, wherein the sequence of layers is (a) substrate, (b) mask layer, (c) thermal barrier layer, and (d) colored pixel pattern layer.
7. The record carrier according to claim 1, wherein the thermal barrier layer (16) comprises a material from the group of ZnS-SiO2, SiC, Si3N4, Al2O3.
8. The record carrier according to claim 1, wherein the mask layer (18) comprises a thermo-chromic material.
9. The record carrier according to claim 8, wherein the mask layer (18) comprises a material from the group of AgO and poly(3,4-ethylenedioxythiophene).
10. The record carrier according to claim 1, wherein the mask layer (18) comprises organic dyes.
11. The record carrier according to claim 1, wherein the mask layer (18) comprises a material that undergoes a phase transition upon heating.
12. The record carrier according to claim 1, wherein the mask layer comprises a dual layer system that mixes upon heating, thereby changing the transparency.
13. A method of recording an image on a record carrier (10), the record carrier having a plurality of stacked layers (12, 14, 16, 18) comprising at least one colored pixel pattern layer (14) and at least one mask layer (18) on top of at least a region of the colored pixel pattern layer, the optical transparency of a region of the mask layer changing by applying heat by a laser beam to the region of the mask layer, characterized in that at least one thermal barrier layer (16) is provided between the colored pixel pattern layer and the mask layer.
14. The method according to claim 13, wherein a defocused laser beam provided in an optical recorder is used.
15. An optical recorder for recording an image on a record carrier according to claim 1.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A serial surge suppression and overload protection optimization device comprising:
an input terminal;
an output terminal; and
multiple surge suppression units serially connected between the input terminal and the output terminal, each surge suppression unit having:
two parallel inductors; and
multiple surge absorbing elements, each surge absorbing element connected to an output end of one of the parallel inductors and having a fuse serially connected therewith;
whereby when surge energy of an intruding surge exceeds a threshold, each fuse serially connected with a corresponding surge absorbing element burns out to separate the surge absorbing element from a main power loop connected with the surge absorbing element for electrical safety protection.
2. The serial surge suppression and overload protection optimization device as claimed in claim 1, wherein the fuses are thermal fuses.
3. The serial surge suppression and overload protection optimization device as claimed in claim 1, wherein each fuse and a corresponding surge absorbing element are a thermally protected metal oxide varistor (TMOV) integrated in single chip package and having a temperature fuse therein.
4. The serial surge suppression and overload protection optimization device as claimed in claim 1, wherein each fuse and a corresponding surge absorbing element are a standalone metal oxide varistor (MOV) having a separate temperature fuse serially connected to an input terminal of the MOV.
5. The serial surge suppression and overload protection optimization device as claimed in claim 1, wherein:
the serial surge suppression and overload protection optimization device has two surge suppression units and a ground wire;
a pre-stage surge suppression unit has three surge absorbing elements, wherein each surge absorbing element has a fuse serially connected therewith for overload protection and is connected between two of the ground wire (G) and the output ends of the parallel inductors, and the three fuses are not serially connected to the line wire (L) and the neutral wire (N) of the main power loop;
a post-stage surge suppression unit has three surge absorbing elements, wherein each surge absorbing element has a fuse serially connected therewith for overload protection and is connected between two of the ground wire (G) and the output ends of the parallel inductors, each fuse is serially connected with the line wire (L) or the neutral line (N) of the main power loop; and
two of the fuses are serially connected with the line wire (L) of the main power loop and the remaining one of the fuses is serially connected with the neutral wire (N) of the main power loop, or two of the fuses are serially connected with the neutral wire (N) of the main power loop and the remaining one of the fuses is serially connected with the line wire (L) of the main power loop.
6. The serial surge suppression and overload protection optimization device as claimed in claim 5, further comprising a surge phase correction and compensation loop, wherein the surge phase correction and compensation loop is connected to the output terminal and between the loop of the line wire (L) and the loop of the neutral wire (N) of the surge suppression device, and has a diode bridge, a zenor diode, a MOSFET, multiple capacitors, an inductor and a silicon controlled rectifier (SCR), the zenor diode, the MOSFET and the capacitors are parallelly and sequentially connected to an output terminal of the diode bridge, the inductor serves to adjust a phase of a bypass pulse, the SCR is serially connected to the cathode of the zenor diode through the inductor so that the diode bridge is operated to supply power to the capacitors, and one end of each capacitor is connected to the MOSFET, the MOSFET short-circuited when activated so that the capacitors discharge all power stored therein.
7. The serial surge suppression and overload protection optimization device as claimed in claim 5 further comprising an automatic overload protection unit, wherein the automatic overload protection unit has:
a by-pass circuit serially connected to a fuse, wherein a loop of line wire (L) has a branch circuit parallelly connected with the input terminal and connected to an output end of the fuse, a relay loop has two switching contacts connected between the by-pass circuit and the output terminal, and two load balancing resistors are respectively connected to the switching contacts; and
an overcurrent detection board having:
a first terminal connected to the relay loop;
a second terminal thereof connected to one of the load balancing resistors to acquire a sample current;
multiple status indicators mounted thereon;
an amplification comparator, a signal rectifier and a power amplification IC therein; and
a varistor serving to adjust a signal amplification rate and configure an overcurrent activation point.
8. The serial surge suppression and overload protection optimization device as claimed in claim 7, wherein a choke is serially connected between the switching contacts of the relay loop to additionally provide noise cancellation.