Author: claimsbot

1. A method for efficient discontinuous reception (\u2018DRX\u2019) operation during handover in Long Term Evolution (\u2018LTE\u2019) in which a user equipment expects handover to occur between a source enhanced Node B (\u2018eNB\u2019) and a target eNB, the method comprising the steps of:
checking whether a message indicating handover initiation will not occur is received at the user equipment from the source eNB within a predetermined time period;
if no, performing the steps of: ensuring the user equipment is not in a DRX sleep period during reception of a handover grant;
checking whether a handover grant is received, and if yes, performing a handover procedure; and if no, resuming a DRX sleep interval; and
if yes, ending the process.
2. The method of claim 1, wherein the step of ensuring the user equipment is not in the DRX sleep period utilizes continuous reception on the user equipment.
3. The method of claim 1, wherein the step of ensuring the user equipment is not in the DRX sleep period utilizes an extended DRX awake period.
4. The method of claim 1, wherein
the step of ensuring the user equipment is not in the DRX sleep period utilizes a short DRX period;
the short DRX period has a length set based on a value that is one of received from the source eNB or pre-configured; and,
the value is predetermined and stored on the source eNB.
5-7. (canceled)
8. The method of claim 1, wherein checking whether the message is received further comprises:
making, at the source eNB, the handover initiation decision; and
signaling the handover initiation decision to the user equipment.
9. The method of claim 1 further comprising, after said resuming step, receiving updated measurement control information for handover procedures.
10. The method of claim 1, wherein the user equipment is expecting handover to occur based on the sending of a measurement report.
11. The method of claim 1, wherein the user equipment is expecting handover to occur based on a parameter in the measurement report being above or below a predetermined threshold.
12. A system for efficient discontinuous reception (\u2018DRX\u2019) operation during handover in Long Term Evolution (\u2018LTE\u2019) comprising user equipment and an enhanced node B, the system configured to:
check by the user equipment whether a message indicating handover initiation will not occur is received within a predetermined time period;
if no:
ensure the user equipment is not in a DRX sleep period during reception of a handover grant;
check whether a handover grant is received, and
if yes, perform a handover procedure; and
if no, resume a DRX sleep interval.
13. The system of claim 12, wherein ensuring that the user equipment is not in the DRX sleep period comprises utilizing continuous reception on the user equipment.
14. The system of claim 12, wherein the ensuring that the user equipment is not in the DRX sleep period comprises utilizing an extended DRX awake period.
15. The system of claim 12, wherein
the ensuring that the user equipment is not in the DRX sleep period comprises utilizing a short DRX period;
the short DRX period has a length set based on a value that is one of received from an enhanced node B or pre-configured; and,
the value is predetermined and stored on the enhanced node B.
16-18. (canceled)
19. The system of claim 12 wherein the system is further configured to receive, at the user equipment, updated measurement control information for handover procedure.
20. The system of claim 12, wherein the user equipment is configured to expect handover to occur based on the sending of a measurement report.
21. The method of claim 12, wherein the user equipment is configured to expect handover to occur based on a parameter in the measurement report being above or below a predetermined threshold.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A computer-implemented method for verifying a RAIMECC design using a hierarchical error injection scheme, the method comprising:
selecting marks for generating an error mask, the marks corresponding to at least one of: a marked channel and at least one marked chip;
selecting a fixed bit flip mask based on the selected marks;
determining that errors should be injected into the at least one of the marked channel and the at least one marked chip;
randomly injecting, by a computer, errors into the at least one of the marked channel and the at least one marked chip based on the determining that the errors should be injected into the at least one of the marked channel and the at least one marked chip, the injecting based on at least one of the fixed bit flip mask and a random bit flip mask;
determining that errors should be injected into an unmarked chip; and
based on the determining that errors should be injected into an unmarked chip:
selecting an unmarked channel;
selecting an unmarked chip from the unmarked channel; and
selecting the random bit flip mask or the fixed bit flip mask for the selected unmarked chip.
2. The computer-implemented method of claim 1, further comprising:
determining whether to inject a special uncorrectable error based determining that errors should be injected into the at least one of the marked channel and the at least one marked chip.
3. The computer-implemented method of claim 1, wherein the randomly injecting errors into the marked channel comprises:
selecting a chip mask to control which chips within the marked channel are to be injected with errors; and
selecting the random bit flip mask or the fixed bit flip mask for each chip within the marked channel to be injected with errors.
4. The computer-implemented method of claim 1, wherein the randomly injecting errors into the at least one marked chip comprises:
selecting the random bit flip mask or the fixed bit flip mask for the at least one marked chip.
5. The computer-implemented method of claim 1, further comprising:
determining whether to inject errors into multiple unmarked chips on different channels;
and
determining whether to inject errors into multiple unmarked chips from a same channel.
6. The computer-implemented method of claim 5, wherein based on determining to inject errors into multiple unmarked chips on different channels, the method further comprises:
selecting at least two unmarked channels;
selecting one unmarked chip from each of the at least two unmarked channels selected; and
selecting the random bit flip mask or the fixed bit flip mask for the selected unmarked chips.
7. The computer-implemented method of claim 5, wherein based on determining to inject errors into multiple chips from a same channel, the method further comprises:
selecting one unmarked channel;
selecting at least two unmarked chips from the unmarked channel; and
selecting the random bit flip mask or the fixed bit flip mask for each of the at least two unmarked chips.
8. A computer-program product for verifying a RAIMECC design using a hierarchical error injection scheme, the computer program product comprising:
a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method comprising:
selecting marks for generating an error mask, the marks corresponding to at least one of: a marked channel and at least one marked chip;
selecting a fixed flip bit mask based on the selected marks;
determining that errors should be injected into the at least one of the marked channel and the at least one marked chip; and
randomly injecting errors into the at least one of the marked channel and the at least one marked chip based on the determining that the errors should be injected into the at least one of the marked channel and the at least one marked chip, the injecting based on at least one of the fixed bit flip mask and a random bit flip mask;
determining that errors should be injected into an unmarked chip; and
based on the determining that errors should be injected into an unmarked chip:
selecting an unmarked channel;
selecting an unmarked chip from the unmarked channel; and
selecting the random bit flip mask or the fixed bit flip mask for the selected unmarked chip.
9. The computer-program product of claim 8, wherein the method further comprises:
determining whether to inject a special uncorrectable error based upon determining that errors should be injected into the at least one of the marked channel and the at least one marked chip.
10. The computer-program product of claim 8, wherein the randomly injecting errors into the marked channel comprises:
selecting a chip mask to control which chips within the marked channel are to be injected with errors; and
selecting the random bit flip mask or the fixed bit flip mask for each chip within the marked channel to be injected with errors.
11. The computer-program product of claim 8, wherein the randomly injecting errors into the at least one marked chip comprises:
selecting the random bit flip mask or the fixed bit flip mask for the at least one marked chip.
12. The computer-program product of claim 8, wherein the method further comprises:
determining whether to inject errors into multiple unmarked chips on different channels;
and
determining whether to inject errors into multiple unmarked chips from a same channel.
13. The computer-program product of claim 12, wherein based on determining to inject errors into multiple unmarked chips on different channels, the method further comprises:
selecting at least two unmarked channels;
selecting one unmarked chip from each of the at least two unmarked channels selected; and
selecting the random bit flip mask or the fixed bit flip mask for the selected unmarked chips.
14. The computer-program product of claim 12, wherein based on determining to inject errors into multiple chips from the same channel, the method further comprises:
selecting one unmarked channel;
selecting at least two unmarked chips from the unmarked channel; and
selecting the random bit flip mask or the fixed bit flip mask for each of the at least two unmarked chips.
15. A system for verifying a RAIMECC design using a hierarchical error injection scheme, the system comprising:
a processor coupled with a controller;
the system configured to perform a method, the method comprising:
selecting marks for generating an error mask, the marks corresponding to at least on of: a marked channel and at least one marked chip;
selecting a fixed bit flip mask based on the selected marks;
determining that errors should be injected into the at least one of the marked channel and the at least one marked chip
randomly injecting errors into the at least one of the marked channel and the at least one marked chip based on the determining that the errors should be injected into the at least one of the marked channel and the at least one marked chip, the injecting based on at least one of the fixed bit flip mask and a random bit flip mask;
determining that errors should be injected into an unmarked chip; and
based on the determining that errors should be injected into an unmarked chip:
selecting an unmarked channel;
selecting an unmarked chip from the unmarked channel; and
selecting the random bit flip mask or the fixed bit flip mask for the selected unmarked chip.
16. The system of claim 15, wherein the method further comprises:
determining whether to inject a special uncorrectable error based on determining that errors should be injected into the at least one of the marked channel and the at least one marked chip.
17. The system of claim 15, wherein the randomly injecting errors into the marked channel comprises:
selecting a chip mask to control which chips within the marked channel are to be injected with errors; and
selecting the random bit flip mask or the fixed bit flip mask for each chip within the marked channel to be injected with errors.
18. The system of claim 15, wherein the randomly injecting errors into the at least one marked chip comprises:
select the random bit flip mask or the fixed bit flip mask for the at least one marked chip.
19. The system of claim 15, wherein the method further comprises:
determining whether to inject errors into multiple unmarked chips on different channels;
and
determining whether to inject errors into multiple unmarked chips from a same channel.
20. The system of claim 19, wherein based on determining to inject errors into multiple unmarked chips on different channels, the method further comprises:
selecting at least two unmarked channels;
selecting one unmarked chip from each of the at least two unmarked channels selected; and
selecting the random bit flip mask or the fixed bit flip mask for the selected unmarked chips.
21. The system of claim 19, wherein based on determining to inject errors into multiple chips from a same channel, the method further comprises:
selecting one unmarked channel;
selecting at least two unmarked chips from the unmarked channel; and
selecting the random bit flip mask or the fixed bit flip mask for each of the at least two unmarked chips.

1. A method of transmission schedule enforcement in a hub-based network, the method comprising:
receiving guardian messages from one or more of a plurality of nodes, wherein the guardian messages are received outside of TDMA communications;
implementing a voting function;
voting the received guardian messages using the voting function; and
wherein the guardian messages contain information pertaining to the next slot or slots to transmit;
when a clear winner of the received guardian messages is detected, enabling a port indicated by the clear winner to propagate.
2. The method of claim 1, wherein implementing a voting function comprises implementing a single fault tolerant voting function.
3. The method of claim 1, wherein implementing a voting function comprises implementing a multi-fault tolerant voting function.
4. The method of claim 1, wherein implementing a voting function comprises implementing a selection function.
5. The method of claim 1, wherein the information pertaining to the next slot or slots to transmit comprises a port number of the next port expected to transmit data.
6. The method of claim 1, wherein the information pertaining to the next slot or slots to transmit comprises an n-bit message indicating a slot expected to transmit data next.
7. The method of claim 6, wherein the n-bit message includes an error correction code.
8. The method of claim 1, wherein the information pertaining to the next slot or slots to transmit comprises a node identification (ID) of the next node to transmit data.
9. The method of claim 1, wherein the information pertaining to the next slot or slots to transmit comprises slot positions for the next round of the transmission schedule.
10. The method of claim 9, wherein the information further comprises slot length of the next slots to transmit.
11. The method of claim 10, further comprises implementing beacon signals for time synchronization.
12. The method of claim 6, further comprising retrieving a port expected to transmit next based on the slot expected to transmit data next in a slot to guardian port look-up table.
13. The method of claim 8, further comprising retrieving a port expected to transmit next based on the node ID in a node ID to guardian port look-up table.
14. The method of claim 1, further comprising:
when a clear winner is not detected, blocking all transmissions.
15. The method of claim 1, further comprising:
when a clear winner is not detected, performing an arbitration function and selecting one of the guardian messages;
enabling a port indicated by the selected guardian message to propagate.
16. The method of claim 6, wherein receiving guardian messages from one or more of a plurality of nodes comprises receiving guardian messages at the start of every slot.
17. The method of claim 1, wherein receiving guardian messages from one or more of a plurality of nodes comprises receiving a complete communication schedule upon start-up of the network.
18. The method of claim 9, wherein receiving guardian messages from one or more of a plurality of nodes comprises receiving slot positions for the next round of the transmission schedule once per round.
19. A network, comprising:
at least one hub having a central guardian; and
a plurality of nodes coupled to the at least one hub over multiple channels;
wherein the plurality of nodes communicate using a time-triggered TDMA protocol;
wherein each central guardian implements schedule enforcement between one or more of the plurality of nodes over one of the multiple channels;
wherein the schedule enforcement comprises voting guardian messages received from the one or more of the plurality of nodes per channel;
wherein each guardian message received from the one or more of the plurality of nodes indicates a vote of one or more slots expected to transmit next.
20. The network of claim 19, wherein the at least one hub includes slot to guardian port look-up tables.
21. The network of claim 19, wherein the guardian messages are voted with a fault tolerant voting function.
22. The network of claim 19, wherein the one or more slots to transmit comprise all of the slots expected to transmit in a transmission round and the guardian messages are received once per transmission round.
23. The method of claim 22 wherein each of the guardian messages includes the length of the slots expected to transmit in the transmission round.
24. The network of claim 22, wherein each of the guardian messages includes a beacon signal for time synchronization.
25. The network of claim 19, wherein each of the guardian messages comprises a single n-bit message.
26. The network of claim 25, wherein the single n-bit message includes an error detection code.
27. The network of claim 26, wherein the error detection code is a cyclic redundancy code.
28. The network of claim 25, wherein each n-bit message is compared on a bit-for-bit basis.
29. The network of claim 28, wherein error detection is provided when at least two n-bit messages agree.
30. The network of claim 19, wherein the guardian messages are received just prior to a TDMA slot.
31. The network of claim 19, wherein each guardian message is received at startup of the network and includes a complete transmission schedule.
32. The network of claim 31, wherein at least two of the transmission schedules is compared on a bit-for-bit basis and when the two transmission schedules agree the central guardian implements the transmission schedule.
33. The network of claim 19, wherein each hub receives a slot to port look-up table from each node upon startup.
34. The network of claim 33, wherein the received slot to port look-up tables are voted using a voting function.
35. The network of claim 34, wherein the voting function is single fault tolerant.
36. The network of claim 34, wherein the voting function is multi-fault tolerant.
37. A network, comprising:
at least one hub having a central guardian; and
a plurality of nodes coupled to the at least one hub over multiple channels;
wherein the plurality of nodes communicate using a time-triggered TDMA protocol;
wherein each central guardian implements a voting function that votes guardian messages received from the one or more of the plurality of nodes per channel;
wherein the guardian messages are transmitted outside of the TDMA communications;
wherein each guardian message indicates one or more ports expected to transmit next.
38. The network of claim 37, wherein the guardian messages are received just prior to a TDMA slot.
39. The network of claim 37, wherein the voting function is single fault tolerant.
40. The network of claim 37, wherein the voting function is multi-fault tolerant.
41. The network of claim 39, further comprising when a winning guardian message is detected, the hub enables the one or more ports of the winning guardian message to propagate.
42. The network of claim 40, further comprising when a winning guardian message is detected, the hub enables the one or more ports of the winning guardian message to propagate.
43. The network of claim 37, further comprising when a winning guardian message is not detected the central guardian implements an arbitration function, selects a guardian message and enables the one or more ports of the selected guardian message to propagate.
44. The network of claim 43, wherein the arbitration function is a majority arbitration function.
45. The network of claim 43, wherein the arbitration function is a sequential arbitration function.
46. The network of claim 37, further comprising when a winning guardian message is not detected the central guardian blocks transmission.
47. A network, comprising:
at least one hub having a central guardian; and
a plurality of nodes coupled to the at least one hub over multiple channels;
wherein the plurality of nodes communicate using a time-triggered TDMA protocol;
wherein each central guardian implements schedule enforcement between one or more of the plurality of nodes over one of the multiple channels;
wherein the schedule enforcement comprises voting guardian messages received from the one or more of the plurality of nodes per channel;
wherein each guardian message received from the one or more of the plurality of nodes indicates node identification of one or more of the plurality of nodes expected to transmit next.
48. The network of claim 47, wherein the guardian messages are received just prior to a TDMA slot.
49. The network of claim 47, wherein the voting function is single fault tolerant.
50. The network of claim 47, wherein the voting function is multi-fault tolerant.
51. The network of claim 49, wherein the at least one hub includes node identification to guardian port look up table.
52. The network of claim 51, wherein when a winning guardian message is detected, the central guardian retrieves one or more ports to propagate next from the look up table based on the node identification of the winning guardian message and enables the one or more ports to propagate.
53. The network of claim 51, further comprising when a winning guardian message is not detected the central guardian implements an arbitration function, selects a guardian message, retrieves one or more ports to propagate next from the look up table based on the node identification of the winning guardian message and enables the one or more ports to propagate.
54. The network of claim 53, wherein the arbitration function is a majority arbitration function.
55. The network of claim 53, wherein the arbitration function is a sequential arbitration function.
56. The network of claim 47, further comprising when a winning guardian message is not detected the central guardian blocks transmission.
57. A method of transmission schedule enforcement in a hub-based network, the method comprising:
receiving guardian messages from one or more of a plurality of nodes, wherein the guardian messages are embedded in data communications;
extracting the guardian messages from the data communications;
voting the received guardian messages using a voting function; and
wherein the guardian messages contain information pertaining to the next slot or slots to transmit;
when a clear winner of the voted guardian messages is detected, enabling one or more ports determined based upon the information contained within the guardian message of the clear winner to propagate.
58. The method of claim 57, further comprising communicating data over half-duplex communication links.
59. The method of claim 57, wherein the information contained in the guardian messages includes slot length of the next one or more slots to transmit.
60. The method of claim 57, further comprising retrieving the one or more ports to propagate from a slot to guardian port look up table.
61. The method of claim 57, further comprising when a winner of the voted guardian messages is not detected, implementing an arbitration function, selecting a guardian message, retrieves one or more ports to propagate next from a slot to guardian port look up table based on the one or more slots of the selected guardian message and enabling the one or more ports to propagate.
62. The method of claim 57, wherein voting the received guardian messages using a voting function comprising voting the received guardian messages using a fault tolerant voting function.
63. The method of claim 57, further comprising when a winning guardian message is not detected blocking transmission of the next port or ports to transmit.
64. A hub-based network, the network comprising:
means for receiving guardian messages from one or more of a plurality of nodes, wherein the guardian messages are received outside of TDMA communications;
means for implementing a voting function;
means for voting the received guardian messages using the voting function; and
wherein the guardian messages contain information pertaining to the next slot or slots to transmit;
means for enabling a port indicated by a clear winner to propagate, when the clear winner of the received guardian messages is detected.
65. A machine readable medium having instructions stored thereon for a method of transmission schedule enforcement in a hub based network, the method comprising:
receiving guardian messages from one or more of a plurality of nodes, wherein the guardian messages are received outside of TDMA communications;
implementing a voting function;
voting the received guardian messages using the voting function; and
wherein the guardian messages contain information pertaining to the next slot or slots to transmit;
when a clear winner of the received guardian messages is detected, enabling a port indicated by the clear winner to propagate.
66. A machine readable medium having instructions stored thereon for a method of transmission schedule enforcement in a hub based network, the method comprising:
receiving guardian messages from one or more of a plurality of nodes, wherein the guardian messages are embedded in data communications;
extracting the guardian messages from the data communications;
voting the received guardian messages using a voting function; and
wherein the guardian messages contain information pertaining to the next slot or slots to transmit;
when a clear winner of the voted guardian messages is detected, enabling one or more ports determined based upon the information contained within the guardian message of the clear winner to propagate.
67. A method of transmission schedule enforcement in a hub-based network, the method comprising:
receiving guardian messages from one or more of a plurality of nodes, wherein the guardian messages are embedded in data communications;
extracting the guardian messages from the data communications;
wherein each of the guardian messages contains a portion of a complete transmission schedule, wherein each portion partially overlaps the next portion;
comparing the overlaps of consecutive portions of the complete transmission schedule; and
when the overlap portions agree, assembling the portions of the complete transmission schedule;
executing the assembled transmission schedule.
68. A method of transmission schedule enforcement in a dual channel hub-based network, the method comprising:
receiving guardian messages from one or more of a plurality of nodes over each of the dual channels, wherein the guardian messages are received outside of TDMA communications;
implementing a voting function;
voting the received guardian messages using the voting function; and
wherein the guardian messages contain information pertaining to the next slot or slots to transmit;
when a clear winner of the received guardian messages is detected, enabling a port indicated by the clear winner to propagate.
69. A network, comprising:
at least one hub having a central guardian; and
a plurality of nodes coupled to the at least one hub over multiple channels;
wherein the plurality of nodes communicate using a time-triggered TDMA protocol;
wherein each central guardian implements schedule enforcement between one or more of the plurality of nodes over one of the multiple channels;
wherein the schedule enforcement comprises voting guardian messages received from the one or more of the plurality of nodes per channel;
wherein each guardian message received from the one or more of the plurality of nodes indicates slot position of one or more of the plurality of nodes expected to transmit next;
wherein the central guardian follows protocol mode changes without the knowledge or ability to process protocol related mode change signals.
70. The network of claim 69, wherein a mode change comprises a change in TDMA transmission sequence.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A coated article comprising:
(a) a decorative metal substrate having a specular gloss greater than 400, with the proviso that the decorative metal substrate does not contain a pigmented coating thereon,
(b) a transparent cured coating thereon applied directly to the decorative metal substrate containing a resinous binder, 0.5 to 10 percent by weight based on total solids weight of the coating of a surface active agent and inorganic particles in which the concentration of particles in the exposed surface region of the cured coating is greater than the bulk region of the cured coating.
2. The coated article of claim 1 in which the decorative metal is selected from the group consisting of brass, bronze, and precious metals.
3. The coated article of claim 1 in which the decorative metal is jewelry.
4. The coated article of claim 1 in which the transparent cured coating is applied by electrodeposition.
5. The coated article of claim 4 in which the electrodeposition is cationic electrodeposition.
6. The coated article of claim 1 in which the cured coating is derived from a (meth)acrylic resin.
7. The coated article of claim 1 in which the inorganic particles have a particle size less than 1000 nanometers.
8. The coated article of claim 1 in which the inorganic particles have a Mohs’ hardness greater than 5.
9. The coated article of claim 1 in which the inorganic particles are colloidal silica.
10. The coated article of claim 1 in which the particles are present in the cured coating composition in amounts of 0.5 to 10 percent by weight based on weight of the cured coating.
11. The coated article of claim 1 in which the surface active agent is a polysiloxane.