Author: claimsbot

1. A computer readable medium comprising instructions for a method of partitioning a mixed signal circuit design for simulation, the method comprising:
accepting one of an analog discipline and a digital discipline that is associated with a first block of a plurality of blocks of a mixed signal circuit design;
for each domainless net of the first block, determining whether the net has a higher priority source for discipline assignment; and if not, then
assigning the accepted discipline to the net.
2. The computer readable medium of claim 1, wherein the first block is an instance of a cell, the accepted discipline is associated with the block by association with the cell, and the higher priority source is a discipline associated with the instance of the cell.
3. The computer readable medium of claim 1, wherein the first block is an instance of a cell from a library, the accepted discipline is associated with the library, and the higher priority source is a discipline associated with one of the cell and the instance.
4. The computer readable medium of claim 1, wherein the first block includes a sub-block, and the steps of determining and assigning include determining for each domainless net of the subblock whether the net has a higher priority source for discipline assignment and if not then assigning the accepted discipline to the net.
5. The computer readable medium of claim 4, wherein the higher-priority source for the sub-block discipline is a discipline associated with either that sub-block or a cell of which the sub-block is an instance.
6. The computer readable medium of claim 1, wherein the first block is one of a plurality of instances of a cell, each of the plurality is identifiable by a name having a portion common among the plurality of instances, and further comprising assigning the accepted discipline to domainless nets of instances of the plurality by matching the common portion to an identifier provided with the accepted discipline.
7. The computer readable medium of claim 1, wherein the method further comprises:
resolving, using an automated discipline resolution algorithm, disciplines for any remaining domainless nets of each of the plurality of blocks.
8. The computer readable medium of claim 1, wherein the method further comprises:
marking nets crossing a boundary of the first block for insertion of connection modules; and
resolving, using an automated discipline resolution algorithm, disciplines only for domainless nets not within the first block.
9. The computer readable medium of claim 1, wherein the method includes obtaining the one of an analog discipline and a digital discipline from a default setting.
10. The computer readable medium of claim 1, wherein the method includes obtaining a specification of the first block, the specification without discipline information for nets in the first block, and the accepted discipline is accepted from a setting provided through a mixed signal simulation tool.
11. The computer readable medium of claim 1, wherein the first block is defined by an original specification obtained through a design methodology that does not support discipline assignment, and wherein the assigning of the accepted discipline to each domainless net of the first block occurs in a local specification for the first block, separate from the original specification.
12. A computer readable medium comprising instructions for a method of partitioning, into analog and digital portions, a mixed-signal semiconductor design specified as an assembly of blocks, the method comprising:
without first using a discipline resolution algorithm to resolve domainless nets of one or more blocks in the assembly, identifying boundaries between analog and digital portions at a block level; and
indicating that discipline resolution is not to be run on the design.
13. The computer readable medium of claim 12, further comprising identifying the boundaries based on identifying which blocks were specified with a digital design language and which blocks were specified with an analog design language.
14. The computer readable medium of claim 12, wherein the analog design language is SPICE and the digital design language is selected from the group consisting of Verilog, VHDL, SystemC, and SystemVerilog.
15. The computer readable medium, of claim 12, wherein the blocks include a digital top level block hierarchically including a plurality of analog subblocks, and wherein identifying the boundaries further comprises marking IO nets between the subblocks and the top level block for insertion of connection modules.
16. The computer readable medium of claim 12, wherein the blocks include an analog top level block hierarchically including a plurality of digital subblocks, and wherein identifying the boundaries further comprises marking IO nets between the subblocks and the top level block for insertion of connection modules.
17. The computer readable medium of claim 12, wherein the method is performed responsive to a user-selectable setting, obtained from a simulation tool, that applies to the design by overrides other simulation tool provided disciplines for blocks of the design.
18. A computer readable medium comprising instructions for a method of partitioning, into analog and digital portions, a mixed-signal semiconductor design specified as an assembly of instances of blocks, the method comprising:
determining if there is a global selection to identify analog and digital portions based on information available from a design specification, then
indicating that an automated design resolution process is to be skipped; and

for each instance, determining whether the instance is at an analogdigital boundary, and if so then indicating that nets of the instance crossing the boundary are to have connection modules inserted; and
if there is no global selection, then,
determining, for each instance of the design, if there is a user-provided indication that the instance is at an analogdigital boundary, and if so then
(1) indicating that nets crossing that analogdigital boundary from the instance are to have connection modules inserted, and
(2) indicating that the automated design resolution process is to be skipped for the instance,

and if there is no such user-provided indication for the instance then, for the instance, determining whether there is a user-provided indication that all domainless nets of the instance are to be assigned either a digital or an analog discipline, and if so then assigning such discipline to each domainless net in the instance, and
running the automated design resolution process for assigning a discipline to remaining domainless nets in the design that are not within instances for which discipline resolution was indicated to be skipped.
19. A computer readable medium comprising instructions for a method of partitioning a mixed-signal semiconductor design for simulation, the design an assembly of one or more block specifications, each block specification generated by one or more design tools, each design tool referencing respective block netlists for the block specifications generated, the method comprising:
assigning, in a tool copy of the block specifications and without modifying the netlists for the block specifications, either an analog or a digital discipline to each net of each block, the discipline assigned to each net determined based on block-level discipline assignments, if available, and if not available, then based on an automated discipline resolution algorithm.
20. The computer readable medium of claim 19, wherein the block-level discipline assignment applies to a particular cell of a library of cells.
21. The computer readable medium of claim 19, wherein the block-level discipline assignment applies to a block that hierarchically includes instances of a plurality of cells, and the step of assigning includes assigning that discipline to each net of each instance, in the absence of a more particular source for a net’s discipline.
22. The computer readable medium of claim 19, wherein the block-level discipline assignment applies to a block that includes instances of a plurality of cells, and further comprising determining that an instance has been associated with a discipline assignment, and using the discipline associated with that instance, rather than the block-level discipline assignment, for assigning a discipline to each net in that instance.
23. The computer readable medium of claim 19, further comprising assigning disciplines to one or more terminals of a cell or instance, the disciplines specified through a settings obtained through a simulation tool, and not from the netlists.
24. The computer readable medium of claim 19, wherein the block-level discipline assignment is obtained from a library setting, and is applicable to all cells in that library.
25. A multimode system for partitioning a mixed signal circuit design specified as a plurality of blocks, the system comprising:
a means for determining whether to operate in a first discipline resolution mode or a second discipline resolution mode;
a means to operate in the first discipline resolution mode comprising a means for accepting a discipline associated with a first block of the plurality of blocks, and a means for assigning the discipline to each domainless net of the first block that does not have a higher priority source for discipline assignment; and
a means to operate in the second discipline resolution mode comprising a means to identify boundaries between analog and digital portions of the mixed signal circuit design without first using a discipline resolution to resolve domainless nets in the plurality of blocks.
26. The system of claim 25, further comprising:
a means for marking nets crossing a boundary of the first block for insertion of connection modules; and
a means for implementing an automated discipline resolution algorithm to resolve disciplines for domainless nets not within the first block.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

What is claimed is:

1. A digitalanalog television receiver capable of receiving television signals in an ATSC system and an NTSC system by a single tuner, comprising:
a detecting means which detects a frequency deviation amount for each channel capable of receiving an analog television signal at a time of an automatic pre-setting;
a calculating means which calculates an average value of the frequency deviation amount on respective channels;
a storing means which stores said average value calculated by said calculating means; and
a setting means which sets channel data on the basis of said average value stored in said storing means in receiving a digital television signal.
2. A digitalanalog television receiver capable of receiving television signals in an ATSC system and an NTSC system by a single tuner, comprising:
a detecting means which detects a frequency deviation amount in receiving an analog television signal;
a storing means which stores said frequency deviation amount detected by said detecting means; and
a setting means which sets channel data on the basis of said frequency deviation amount stored in said storing means in receiving a digital television signal.
3. A digitalanalog television receiver according to claim 2, wherein said detecting means detects said frequency deviation amount upon an automatic pre-setting.
4. A digitalanalog television receiver according to claim 2 or 3, wherein
said detecting means includes an average value calculation which detects a deviation amount for each channel capable of receiving an analog television signal, and calculates an average value of the deviation amount of respective channels, and
said setting means sets said channel data on the basis of said average value.
5. A digitalanalog television receiver according to claim 4, wherein said average value calculating means includes a channel-to-channel average value calculating means which calculates a channel-to-channel average value, and said setting means sets said channel data on the basis of said channel-to-channel average value.
6. A digitalanalog television receiver according to claim 2 or 3, wherein
said detecting means includes a standard deviation calculating means which detects a deviation for each channel capable of receiving the analog television signal, and calculates a standard deviation value of the deviation amount for each channel, and
said setting means sets said channel data on the basis of said standard deviation value.
7. A control method for a digitalanalog television receiver capable of receiving television signals in the ATSC system and the NTSC system by a single tuner, comprising following steps of:
(a) detecting a frequency deviation amount in receiving an analog television signal;
(b) storing said frequency deviation amount detected in said step (a); and
(c) setting channel data on the basis of said frequency deviation amount stored in said step (b) in receiving a digital television signal.
8. A method according to claim 7, wherein said step (a) is executed upon automatic pre-setting.
9. A method according to claim 7 or 8, wherein
said step (a) includes steps of, (a1) detecting the deviation amount for each channel capable of receiving the analog television signal, and (a2) calculating an average value of the deviation amounts of channels, and
said step (c) sets said channel data on the basis of said average value.
10. A method according to claim 7 or 8, wherein
said step (a) includes steps of, (a1) detecting the frequency deviation amount for each channel capable of receiving the analog television signal, and (a3) calculating a standard deviation value of the deviation amount for said each channel, and
said step (c) sets said channel data on the basis of said standard deviation value.

1. A method of cleaning a semiconductor substrate comprising
providing a semiconductor substrate comprising a low-K substrate with un-ashed resist or incompletely ashed resist residue thereon;
providing a dilute aqueous cleaner and residue remover comprising:
from 0.02% to 0.18% by weight of a fluoride-containing compound selected from the group consisting of ammonium fluoride, alkylammonium fluorides, ethanolamine fluoride, ammonium biflouride, alkylammonium bifluorides, or a mixture thereof;
from 20% to about 40% by weight water;
from 59% to 85% by weight total of an amide and an ether solvent,
from 0.2% to 5% by weight of an inorganic acid selected from sulfamic acid, phosphonic acid, or mixture thereof; and
from 0.2% to 5% by weight of an alkanolamine; wherein said cleaner and residue remover is free of chelators; and
contacting the semiconductor substrate with the aqueous cleaner and residue remover for a period and under a temperature sufficient to clean the substrate of said resist andor incompletely ashed resist residue.
2. The method of claim 1 further comprising rinsing the substrate after cleaning, and drying the substrate, wherein the dielectric constant of the low-k substrate after drying is within 0.002 of the dielectric constant before cleaning.
3. A method of cleaning a semiconductor substrate comprising
providing a semiconductor substrate comprising a low-K substrate having copper metal thereon and plasma-ashed residue thereon;
providing a dilute aqueous cleaner and residue remover comprising:
between 0.5% and 1% of ammonium bifluoride, ammonium fluoride, or mixture thereof, between about 55 and 75% of one or more amide solvents;
water; and
one or more alkanolamines in an amount sufficient to have a pH of between 8.0 and 8.2, wherein said cleaner and remover is free of chelating agents; and
contacting the semiconductor substrate with the aqueous cleaner and residue remover for a time and at a temperature sufficient to clean the substrate of residue.
4. The method of claim 3 further comprising rinsing the substrate after cleaning, and drying the substrate, wherein the dielectric constant of the low-k substrate is within 0.002 of the dielectric constant before cleaning.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. Method of disrupting the operation of an illegal black box normally used to overcome an unstable or unviewable video signal caused by a scrambling process, wherein the illegal black box would normally provide a stable or viewable picture to an unauthorized user of the black box, comprising:
generating an added signal which will disrupt the operation of the illegal black box; and
superimposing or inserting said added signal in the unstable scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to prevent the illegal black box from generating the stable or viewable picture.
2. The method of claim 1, wherein:
the added signal is a time varying voltage generally of from blanking level to peck white level; and
the step of superimposing or inserting includes;
removing the broad vertical pulses of the vertical sync from selected video lines generally in the vertical blanking interval; and
adding the added signal in the selected video lines generally in the vertical blanking interval.
3. The method of claim 1 wherein:
the added signal is a line fill signal whose video level follows the program signal level of the scrambled video signal; and
the step of superimposing or inserting includes inserting the line fill signal into the scrambled video signal during the vertical blanking interval.
4. The method of claim 3 wherein the line fill signal comprises an interpolation of the luminance values of the last and first video values in video lines around the vertical blanking interval.
5. The method of claim 3 including:
amplitude modulating the level of the line fill signal.
6. The method of claim 1 wherein:
the added signal is a color burst signal; and
the step of superimposing or inserting includes;
adding the color burst signal to each of the video lines in the vertical blanking interval that normally do not include color burst signals.
7. The method of claim 1 wherein:
the added signal is an incorrect modification of a proper color burst signal; and
the step of superimposing or inserting includes;
inserting the incorrect modification of the proper color burst signal in place of the proper color burst signal in the horizontal blanking intervals of respective video lines in the vertical blanking intervals; and
relocating the proper color burst signal within the horizontal blanking intervals.
8. The method of claim 1 wherein:
the added signal is an incorrect modification of a proper color burst signal; and
the step of superimposing or inserting includes;
inserting the incorrect modification of the proper color burst signal in the horizontal sync vicinity of respective video lines; and
relocating the proper color burst signal within the horizontal blanking intervals of respective video lines in the vertical blanking interval.
9. The method of claim 7 or 8 wherein the incorrect modification of the proper color burst signal has an incorrect color burst frequency.
10. The method of claim 1 wherein:
the added signal includes a position modulated erroneous clamp pulse; and
the step of superimposing or inserting includes:
adding an edge fill or insertion signal at the end of the respective video line; and
modulating the added edge fill or insertion signal as well as the erroneous clamp pulse.
11. The method of claim 10 including:
position modulating the added edge fill or insertion signal; and
amplitude modulating the added edge fill or insertion signal along with the position modulation.
12. The method of claim 10 wherein the edge fill or insertion signal is pulse width, pulse amplitude, pulse code or frequency modulated andor frequency transformed.
13. The method of claim 10 including:
modulating the erroneous clamp pulse at a rate generally of 1.5 Hz to cause periodic picture shifts andor picture darkening.
14. The method of claim 10 wherein the modulated leading edge of the erroneous clamp pulse is position modulated at a finite rise time which allows locking an to the position modulated color burst signal.
15. The method of claim 1 wherein:
the added signal includes a fake vertical signal having gap signals in conjunctior with an amplitude modulated fake broad pulse signal; and
the step of superimposing or inserting includes;
adding the fake vertical signal to the unstable scrambled video signal in selected video lines in the vertical blanking interval.
16. The method of claim 15 wherein the level of the amplitude modulated fake broad pulse signal is generally in the range of \u221210 IRE to 100 IRE in the NTSC standard.
17. The method of claim 1 including:
generating the added signal as averaged bottom picture luminance values before the vertical blanking interval and top picture luminance values at the end of the vertical blanking interval;
interpolating the luminance values during the vertical blanking interval; and
dithering the interpolated luminance values via a varying voltage ranging generally from blanking level to peak white level.
18. Apparatus for disrupting the operation of an illegal black box used by unauthorized users to overcome an unstable or unviewable video signal, wherein the illegal black box would normally provide a stable or viewable picture from the unstable or unviewable scrambled video signal, comprising:
means receiving the scrambled video signal for generating an added signal capable of disrupting the operation of the illegal black box; and
means responsive to the generating means for superimposing or inserting the added signal in the scrambled video signal generally in vertical blanking intervals thereof to produce corresponding additional unstable or unviewable video signals.
19. The apparatus of claim 18 wherein:
the generating means include a timing circuit for providing timing signals indicative of the vertical blanking interval and vicinity; and
circuit means for generating the added signal selectively and generally in the vertical blanking intervals; and
the superimposing or inserting means include inserter circuit means responsive to the timing circuit for adding the added signal to the unstable or unviewable scrambled video signal at the selected times generally in the vertical blanking intervals.
20. The apparatus of claim 19 wherein the circuit means for generating include:
sample circuit means for storing an average bottom picture luminance value before the vertical blanking interval and an average top picture luminance value at the end of the vertical blanking interval;
filter means for interpolating the average bottom and top luminance values across the vertical blanking interval; and
summing means coupled to the filter means and responsive to a varying voltage source for dithering the interpolated luminance values to provide a dithered added signal.
21. The apparatus of claim 19 wherein the circuit means for generating include:
a voltage source;
summing means coupled to the voltage source and responsive to a second varying voltage for providing a dithered added signal.
22. The apparatus of claim 21 wherein the voltage source is a constant voltage at a selected video white level.
23. The apparatus of claim 21 wherein:
the voltage source includes sample circuit means for storing an average bottom picture luminance value before the vertical blanking interval; and
the summing means is responsive to the second varying voltage for dithering that average bottom picture luminance value to provide the dithered added signal.
24. The apparatus of claim 19 including:
a switching circuit receiving the scrambled video signal for removing the vertical sync pulses in response to the timing circuit;
a second switching circuit responsive to the timing circuit for replacing the removed vertical sync pulses with an identification signal capable of being detected by an authorized decoder; and
wherein said inserter circuit means selectively outputs a scrambled video signal with vertical syncs removed and said added signals inserted.
25. The apparatus of claim 24 wherein the inserter circuit means is responsive to a vertical blanking interval insert control signal and a line location signal from the timing circuit to control the insertion process during active lines in and around the vertical blanking interval.
26. The apparatus of claim 19 including:
means for providing wider than normal horizontal sync signals asynchronously to the field andor frame rate; and
switch means receiving the combined scrambled video signal with said added signal, for inserting the wider than normal horizontal sync signals therein.
27. The apparatus of claim 19 including:
a color burst phase lock loop oscillator locked to the scrambled video signal for supplying a correct color burst signal;
an incorrect burst frequency generator for supplying a color burst signal of incorrect burst frequency;
said inserter circuit means being responsive to the timing circuit for replacing the correct color burst signal with the incorrect frequency color burst signal, for relocating the connect color burst signal andor for inserting the correct color burst signal into all video lines in the vertical blanking interval.
28. The apparatus of claim 27 wherein the correct color burst frequency is recovered during authorized decoding, with the apparatus including:
multiplier means for multiplying the incorrect frequency color burst signal by a continuous wave reference frequency signal; and
a band pass filter for providing the correct color burst frequency signal.
29. The apparatus of claim 19 including:
means for providing a horizontal blanking interval (HBI) signal;
summing amplifier means coupled at its output to the superimposing or inserting means; and
wherein the timing circuit includes first multivibrator means triggering off the HBI signal and responsive to a Vcont control signal for providing an edge fill signal.
30. The apparatus of claim 29 wherein:
the circuit means for generating include, modulator means coupled to the multivibrator means and responsive to a Vmod control signal for supplying an amplitude modulated edge fill signal as the added signal to the summing amplifier means.
31. The apparatus of claim 29 wherein the circuit means for generating include:
second multivibrator means responsive to the first multivibrator means for providing a new horizontal sync signal to the summing amplifier means.
32. The apparatus of claim 31 wherein the second multivibrator means further generates a first gap signal in response to the first multivibrator means.
33. The apparatus of claim 31 wherein the circuit means for generating include:
third multivibrator means responsive to the second multivibrator means, for providing an erroneous clamp pulse as the added signal; and
second modulator means responsive to a second Vmod control signal for supplying an amplitude modulated erroneous clamp pulse to the summing amplifier means.
34. The apparatus of claim 33 including:
an AND gate responsive to the HBI signal for supplying the erroneous clamp pulse to the second modulator means.
35. The apparatus of claim 33 wherein:
the second multivibrator means include a one shot circuit responsive to the first multivibrator means for providing a first gap signal at the end of the edge fill signal, and a second one shot circuit for providing the new horizontal sync signal after the first gape signal; and
the third multivibrator means include a third one shot circuit responsive to the second multivibrator means for providing a second gap signal after the new horizontal sync signal.
36. The apparatus of claim 33 including:
fourth multivibrator means responsive to the new horizontal sync signal for providing a burst gate; and
a burst gate switch responsive to the burst gate for supplying a regenerated color burst signal to the summing amplifier means.
37. The apparatus of claim 33 wherein:
the inserter circuit means include an output switch receiving the scrambled video signal and responsive to the HBI signal for supplying the scrambled video signal with the regenerated color burst signal inserted therein.
38. The apparatus of claim 33 wherein:
the inserter circuit means include an output switch receiving the scrambled video signal and responsive to the HBI signal for supplying the scrambled video signal which induces the edge fill signal, the new horizontal sync signal andor the erroneous clamp pulse.
39. The apparatus of claim 38 including modulators for amplitude modulating the edge fill signal andor the erroneous clamp pulse.
40. The apparatus of claim 33 wherein:
the inserter circuit means includes an output switch receiving the scrambled video signal and responsive to the HBI signal for supplying the scrambled video signal which includes the edge fill signal and the amplitude modulated erroneous clamp pulse at said selected times.
41. The apparatus of claim 19 wherein:
the timing circuit provides a selected lines signal, an active horizontal line signal and a gap signal;
means for supplying an inverted gap signal;
multivibrator means for applying modulation to the selected lines signal;
an AND gate responsive to the selected lines signal, the active horizontal line signal, the inverted gap signal and the modulated selected lines signal for providing a fake vertical signal with a fake broad vertical pulse signal;
a modulator circuit responsive to the AND gate for providing a fake vertical signal with an amplitude modulated fake broad vertical pulse signal; and
wherein the inserter circuit means adds the fake vertical signal with the amplitude modulated fake broad vertical pulse signal to the video signal in response to the selected lines signal and the active horizontal line signal.
42. Method of defeating an illegal black box it used to overcome the effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics; and
superimposing or inserting the jamming signal on the scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal;
wherein:
the jamming signal is a time varying voltage generally of blanking level to peak white level; and
the step of superimposing or inserting includes:
removing the broad vertical pulses of the vertical sync from selected video lines generally in the vertical blanking interval; and
adding the jamming signal in the selected video lines generally in the vertical blanking interval.
43. Method of defeating an illegal black box used to overcome the scrambling effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics; and
superimposing or inserting the jamming signal onto the scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal;
wherein:
the jamming signal is a line fill signal whose video level follows the program signal level of the scrambled video signal; and
the step of superimposing or inserting includes inserting the line fill signal into the scrambled video signal during the vertical blanking interval.
44. Method of defeating an illegal black box used to overcome the scrambling effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics; and
superimposing or inserting the jamming, signal on to the scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal;
wherein:
the jamming signal is a color burst signal; and
the step of superimposing or inserting includes:
adding color burst signal to each of the video lines in the vertical blanking interval that normally do not include color burst signals.
45. Method of defeating an illegal black box used to overcome the scrambling effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics; and
superimposing or inserting a the jamming signal onto the scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal;
wherein:
the jamming signal is an incorrect modification of a proper color burst signal; and
the step of superimposing or inserting includes:
inserting the incorrect modification of the proper color burst signal in place of the proper color burst signal in the horizontal blanking intervals or in the horizontal sync vicinity of respective video lines in the vertical blanking intervals; and
relocating the proper color burst signal within the horizontal blanking intervals.
46. Method of defeating an illegal black box used to overcome the scrambling effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics; and
superimposing or inserting the jamming signal onto the scrambled video signal luring a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal;
wherein:
the jamming signal includes a position modulated erroneous clamp pulse; and
the step of superimposing or inserting includes:
adding an edge fill or insertion signal at the end of the respective video line; and
modulating the added edge fill or insertion signal its well as the erroneous clamp pulse.
47. Apparatus for defeating an illegal black box used by unauthorized users to provide a viewable picture from a scrambled video signal, comprising:
means receiving the scrambled video signal for generating a black box jamming signal having improper vertical rate signal characteristics; and
means responsive to the generating means for superimposing the jamming signal on the scrambled video signal generally in blanking intervals thereof to produce unstable vertical rate signals which cause an unviewable video signal;
wherein:
the generating means include a timing circuit for providing timing signals indicative of the vertical blanking interval and vicinity; and
circuit means for generating the jamming signal selectively and generally in the vertical blanking intervals; and
the superimposing means include inserter circuit means responsive to the timing circuit for adding the jamming signal to the scrambled video signal at the selected times generally in the vertical blanking intervals.
48. Method of defeating an illegal black box used to overcome the scrambling effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics; and
superimposing or inserting the jamming onto the scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal,
wherein:
the jamming signal includes a fake vertical signal having gap signals in conjunct on with an amplitude modulated fake broad pulse signal; and
the step of superimposing or inserting includes:
adding the fake vertical signal to the scrambled video signal in selected video lines in the vertical blanking interval.
49. Method of defeating an illegal black box used to overcome the scrambling effect of a scrambled video signal thereby presenting an unviewable picture to an unauthorized user of the black box comprising:
generating a jamming signal of unreliable vertical rate signal characteristics;
superimposing or inserting the jamming signal onto the scrambled video signal during a time duration which at least encompasses vertical blanking intervals of the video signal to cause the illegal black box to generate unstable vertical rate signals and thus the unviewable video signal;
generating the jamming signal as averaged bottom picture luminance values before the vertical blanking interval and top picture luminance values at the end of the vertical blanking interval;
interpolating the luminance values during the vertical blanking interval; and
dithering the interpolated luminance values via a varying voltage ranging generally from blanking level to peak white level.