Author: claimsbot

1. A venting apparatus having an opening therein for venting an enclosure, said venting apparatus comprising:
a porous venting element affixed within said venting apparatus and forming a liquid-tight, gas-permeable seal of said opening,
said porous venting element having a porosity of less than 80% and comprising at least one surface indentation having a z axis differential of at least 12 microns.
2. The venting apparatus of claim 1 wherein the z axis differential of said surface indentation is at least 15 micron.
3. The venting apparatus of claim 1 wherein the z axis differential of said surface indentation is at least 20 micron.
4. The venting apparatus of claim 1 wherein the z axis differential of said surface indentation is at least 25 micron.
5. The venting apparatus of claim 1 wherein the said porous venting element has a porosity of less than 75%.
6. The venting apparatus of claim 1 wherein in said surface indentation covers about 2% area of the surface of the venting element.
7. The venting apparatus of claim 1 wherein in said surface indentation covers about 20% area of the surface of the venting element.
8. The venting apparatus of claim 1 wherein in said surface indentation covers about 40% area of the surface of the venting element.
9. The venting apparatus of claim 1 wherein said porous venting element has at least one oleophobic surface.
10. The venting apparatus of claim 1 wherein the porous venting element comprises PTFE.
11. The venting apparatus of claim 1 wherein the porous venting element comprises a material selected from the group consisting of Polyethersulfone, Polysulfone, Ultrahigh Molecular Weight Polyethylene, Polyethylene, vinyl polymers, styrenes, polyvinylchlorides, acrylates, methacrylates, Polypropylene, Polyvinylidene Fluoride (PVDF), Polycarbonate, Cellulose acetate, tetrafluoroethylenehexafluoropropylenecopolymers (FEP), tetrafluoroethyleneperfluoroalkyl vinyl ether copoylmers (PFA).
12. The venting apparatus of claim 1 wherein the porous venting element comprises PTFE having compressed regions and uncompressed regions.
13. A venting apparatus having an opening therein for venting an enclosure, said venting apparatus comprising:
porous venting element affixed within and forming a liquid-tight, gas-permeable seal of said opening,
wherein said porous venting element comprises at least one surface indentation,
said indented porous venting element exceeds the airflow recovery of an other wise identical un-patterned base venting element.
14. The venting apparatus of claim 2 wherein the indented porous venting element exceeds the air flow recovery of the un-patterned base venting element by at least 5%.
15. The venting apparatus of claim 2 wherein the indented porous venting element exceeds the air flow recovery of the un-patterned base venting element by at least 10%.
16. The venting apparatus of claim 2 wherein the indented porous venting element exceeds the air flow recovery of the un-patterned base venting element by at least 15%.
17. A method of venting a liquid tight enclosure, the method comprising:
a) providing an opening in the enclosure,
b) providing a porous polymer having a porosity of less than 80%,
c) forming indentations in a portion of a surface of said porous polymer,
d) said indentations having a depth greater than 12 microns, and
e) covering said opening with said porous polymer to form a liquid-tight and gas-permeable seal of said opening.
18. A venting apparatus having an opening therein for venting an enclosure, said venting apparatus comprising:
a porous venting element affixed within and forming a liquid-tight, gas-permeable seal of said opening,
wherein said porous venting element comprises at least one surface indentation that provides effective pressure decay of said porous venting element after liquid contact.
19. A venting apparatus having an opening therein for venting an enclosure, said venting apparatus comprising:
a porous venting element affixed within and forming a liquid-tight, gas-permeable seal of said opening,
said porous venting element having a porosity of less than 80% and a surface pattern comprising two or more adjacent surface regions, wherein at least one surface region has a repellant power of at least 1.3 milliNewton\u22121 greater than an adjacent region.
20. The venting apparatus of claim 19 in which a surface region has an area x-y plane of at least about 5 um2 and less than about 5 cm2.
21. The venting apparatus of claim 19 in which wherein at least one surface region has a repellant power of at least 2.5 milliNewton-1 greater than an adjacent region.
22. A method of increasing the airflow recovery of a porous venting element, the method comprising increasing repellant power in at least one region of the surface of said porous venting element to create a porous venting element surface having regions of different repellant power.
23. The method of claim 22 in which the repellant power is increased by compressing a portion of the porous venting element to reduce the surface porosity of said porous venting element.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1-35. (canceled)
36. A receiver arrangement configured to receive television signals, comprising:
at least one signal path with a connection for coupling to an antenna, the signal path having a frequency conversion device with a signal input, a local oscillator input (LO, LO-) and an output (IF, IF-) which is designed for conversion of a signal applied on the input side to an intermediate frequency,
a first amplifier having a gain that compensates for signal level loss in a filter which is connected downstream from the first amplifier, with the first amplifier being coupled to the output of the frequency conversion device; and
an intermediate-frequency amplifier with a variable gain factor, which is coupled to the first amplifier;
with at least the frequency conversion device and the first amplifier being formed in a common semiconductor body.
37. The receiver arrangement of claim 36, wherein the intermediate-frequency amplifier is formed in the semiconductor body.
38. The receiver arrangement of claim 36, wherein the frequency conversion device is in the form of a Gilbert mixer with a Gilbert cell.
39. The receiver arrangement of claim 38, wherein a first and a second control connection of the Gilbert cell form the local oscillator input (LO, LO-), and the first control connection is connected to one connection of a first charge store (C12) and to one connection of a second charge store (C21), and the second control connection is connected to one connection of a third charge store (C11) and to one connection of a fourth charge store (C22), with the other connection of the first and of the fourth charge store (C12, C22) being connected to the second output (IF-), and the other connection of the second and of the third charge store (C21, C11) being connected to the second output (IF) of the frequency conversion device.
40. The receiver arrangement of claim 36, wherein the signal input of the frequency conversion device is preceded by a first filter device with a variable pass band which has a first and a second control connection for supplying a first and a second control signal (Vt, Vk) for adjustment of the pass band.
41. The receiver arrangement of claim 40, wherein the first filter device is in the form of a tracking filter outside the semiconductor body.
42. The receiver arrangement of claim 40, wherein the first filter device has at least one capacitance diode (D1, D2) with a variable capacitance, whose first connection is coupled to the first control connection, and whose second connection is coupled to the second control connection.
43. The receiver arrangement of claim 40, wherein the first filter device has a charge store (CS), which is connected between a signal input and a signal output of the first filter device, for mirror-image frequency suppression.
44. The receiver arrangement of claim 40, wherein the first control connection is designed to supply a control signal (Vt) for adjustment of the pass band, and the second control connection is designed to supply a correction signal (Vk) for trimming and for correction of the pass band.
45. The receiver arrangement of claim 44, wherein the second control connection is coupled to a digitalanalog converter for foot point adjustment, where the digitalanalog converter is designed to convert a digital correction value to an analog correction signal (Vk), and to supply the correction signal (Vk) to the second control connection.
46. The receiver arrangement of claim 45, wherein the digitalanalog converter is formed in the semiconductor body.
47. The receiver arrangement of claim 45, wherein the digital correction value is stored in a memory which is coupled to the digitalanalog converter.
48. The receiver arrangement of claim 47, wherein the memory comprises at least one of EPROM, EEPROM and FlashPROM.
49. The receiver arrangement of claim 36, wherein the filter is connected downstream from the first amplifier and is in the form of an external filter outside the semiconductor body.
50. The receiver arrangement of claim 36, wherein the first amplifier is coupled via a second filter device to the output of the frequency conversion device.
51. The receiver arrangement of claim 50, wherein the second filter device has a connection for supplying a supply potential (Vc), which is coupled via an inductive element (L1, L2) to the output (IF, IF-) of the frequency conversion device.
52. The receiver arrangement of claim 36, wherein the first amplifier is in the form of an impedance converter.
53. The receiver arrangement of claim 51, wherein the second filter device is arranged outside the semiconductor body.
54. The receiver arrangement of claim 36, wherein the filter is connected downstream from the first amplifier and is in the form of a surface acoustic wave filter.
55. The receiver arrangement of claim 36, wherein the filter is connected downstream from the first amplifier and is in the form of an active tunable RC filter with a low-pass or bandpass filter characteristic.
56. The receiver arrangement of claim 36, wherein the filter is connected downstream from the first amplifier and is a control input for supplying a control signal (VR) for switching the filter bandwidth of the filter.
57. The receiver arrangement of claim 36, wherein the filter is connected downstream from the first amplifier and has a first and a second input connection, which is coupled to the output of the first amplifier, and the filter is designed with a variable filter bandwidth as a function of the phase difference between signals which are applied to the connections.
58. The receiver arrangement of claim 57, wherein the downstream filter is designed to change its filter bandwidth as a function of a push-pull signal or single ended signal applied to its input side.
59. The receiver arrangement of claim 58, wherein the first amplifier is designed to selectively emit a single ended signal or a push-pull signal.
60. The receiver arrangement of claim 40, wherein the first filter device is preceded by an input amplifier with a continuously variable gain, which has a control input for gain adjustment.
61. The receiver arrangement of claim 60, wherein the first amplifier is connected to a level detector, which is designed to emit a control signal (AGC) for adjustment of the gain of the input amplifier.
62. The receiver arrangement of claim 60, wherein the frequency conversion device is designed to emit a signal which represents an input signal level to a circuit for production of a control signal (AGC) for adjustment of the gain of the input amplifier.
63. The receiver arrangement of claim 36, wherein the frequency conversion device has two controlled paths, which are connected between a first and a second potential and whose control connections are connected to the signal input of the at least one frequency conversion device and whose first and second connections are coupled to a threshold value detector to form a broadband level detector.
64. The receiver arrangement of claim 36, wherein the intermediate-frequency amplifier and the first amplifier have an operating mode with a reduced consumption, and a control input for supplying a signal for reducing the power consumption.
65. A receiver arrangement configured to receive television signals, comprising:
a filter with a variable pass band, designed with a first control connection for supplying a first control signal (Vt) for adjustment of the pass band, and a second control connection for supplying a correction signal (Vk) for trimming and correction of the pass band, with the correction signal being derived from a digital correction value;
a frequency conversion device with a signal input, a local oscillator input (LO, LO-) and an output (IF, IF-) for conversion of a signal which is applied to the input side to an intermediate frequency, which is connected on an input side of the filter;
a first amplifier with a gain that compensates for signal level loss in a second filter connected downstream from the first amplifier, with the first amplifier coupled to the output of the frequency conversion device, and
an intermediate frequency amplifier having a variable gain factor, which is coupled to the first amplifier;
with the frequency conversion device and the first amplifier being formed in a common semiconductor body.
66. The receiver arrangement of claim 65, wherein the filter has a charge store (CS) connected between a signal input and a signal output of the filter for mirror image frequency suppression.

1. A method for producing a dual-array-type scintillator array comprising the steps of
(1) forming a first scintillator stick comprising first scintillator cell portions arranged like a comb by providing a first scintillator substrate with pluralities of grooves, and then cutting said first scintillator substrate in a direction perpendicular to said grooves;
(2) forming a second scintillator stick comprising second scintillator cell portions arranged like a comb by providing a second scintillator substrate having a different composition from that of said first scintillator substrate with pluralities of grooves, and then cutting said second scintillator substrate in a direction perpendicular to said grooves;
(3) arranging and fixing plural sets of said first and second scintillator sticks with said first and second scintillator cell portions downward onto a support plate;
(4) removing base portions from said first and second scintillator sticks by grinding to expose the grooves of said first and second scintillator sticks on the surface, thereby obtaining plural sets of first cell arrays and second cell arrays arranged in parallel, each first cell array being obtained from a line of the first scintillator cells, and each second cell array being obtained from a line of the second scintillator cells;
(5) forming an integral resin-cured assembly comprising plural sets of said first and second cell arrays arranged in parallel by filling at least grooves and gaps of said first and second cell arrays with a resin for a reflector, curing said resin, and then removing said support plate; and
(6) cutting a resin layer between adjacent sets of said first and second cell arrays to divide said resin-cured assembly to sets of said first and second cell arrays.
2. The method for producing a scintillator array according to claim 1, wherein both surfaces of said resin-cured assembly are ground to form an integral cell array assembly having a predetermined thickness, from which said first cell arrays and said second cell arrays are exposed, and then one surface of said cell array assembly, from which said first and second cell arrays are exposed, is coated with the resin for a reflector.
3. The method for producing a scintillator array according to claim 2, wherein after one surface of said cell array assembly, from which said first and second cell arrays are exposed, is coated with the resin for a reflector, a coating layer of said resin for a reflector is ground to a predetermined thickness.
4. The method for producing a scintillator array according to claim 1, wherein said first and second scintillator sticks are heat-treated.
5. The method for producing a scintillator array according to claim 1, wherein each of said first and second scintillator sticks has a pair of positioning grooves on both sides of said grooves, wherein a first spacer is inserted into each positioning groove of said first and second scintillator sticks; wherein a second spacer is disposed between said first scintillator stick and said second scintillator stick in each set; and wherein a third spacer is disposed between said first scintillator stick and said second scintillator stick in adjacent sets.
6. A method for producing a dual-array-type scintillator array comprising the steps of
(1) forming a first scintillator stick comprising first scintillator cell portions arranged like a comb by providing a first scintillator substrate with pluralities of grooves, and then cutting said first scintillator substrate in a direction perpendicular to said grooves;
(2) forming a second scintillator stick comprising second scintillator cell portions arranged like a comb by providing a second scintillator substrate having a different composition from that of said first scintillator substrate with pluralities of grooves, and then cutting said second scintillator substrate in a direction perpendicular to said grooves;
(3) arranging and fixing plural sets of said first and second scintillator sticks with said first and second scintillator cell portions upward onto a support plate;
(4) forming an integral resin-cured assembly comprising said first and second scintillator sticks by filling at least grooves and gaps of said first and second scintillator sticks with a resin for a reflector, curing said resin, and then removing said support plate;
(5) removing base portions from said first and second scintillator sticks by grinding, to form an integral cell array assembly comprising plural sets of first cell arrays and second cell arrays arranged in parallel, each first cell array being obtained from said first scintillator cell portions, and each second cell array being obtained from said second scintillator cell portions; and
(6) cutting a resin layer between adjacent sets of said first and second cell arrays to divide said cell array assembly to sets of said first and second cell arrays.
7. The method for producing a scintillator array according to claim 6, wherein both surfaces of said resin-cured assembly are ground to form a cell array assembly having a predetermined thickness, from which said first cell arrays and said second cell arrays are exposed, and then one surface of said cell array assembly, from which said first and second cell arrays are exposed, is coated with the resin for a reflector.
8. The method for producing a scintillator array according to claim 7, wherein a coating layer of said resin for a reflector is ground to a predetermined thickness.
9. The method for producing a scintillator array according to claim 6, wherein said first and second scintillator sticks are heat-treated.
10. The method for producing a scintillator array according to claim 6, wherein each of said first and second scintillator sticks has a pair of positioning grooves on both sides of said grooves; wherein a first spacer is inserted into each positioning groove of said first and second scintillator sticks; wherein a second spacer is disposed between said first scintillator stick and said second scintillator stick in each set; and
wherein a third spacer is disposed between said first scintillator stick and said second scintillator stick in adjacent sets.
11. The method for producing a scintillator array according to claim 10, wherein each of said second and third spacers has a flat, large-area portion disposed between adjacent scintillator sticks, and a vertical portion extending from said large-area portion above the upper surfaces of said first and second scintillator sticks; and wherein the vertical portions of said second spacers and the vertical portions of said third spacers partially have different colors.
12. The method for producing a scintillator array according to claim 10, wherein the vertical portions of said second and third spacers have different heights andor widths.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A wafer chuck, comprising:
a main body;
a dielectric layer disposed over the main body;
an electrode, embedded in the dielectric layer, configured to generate an electrostatic field for retaining a wafer; and
a thermal conductive layer embedded in the main body or the dielectric layer,
wherein the thermal conductive layer has a lateral thermal conductivity and a vertical thermal conductivity, and the lateral thermal conductivity is greater than the vertical thermal conductivity.
2. The wafer chuck as claimed in claim 1, wherein the thermal conductive layer comprises graphene.
3. The wafer chuck as claimed in claim 1, wherein the lateral thermal conductivity is in a range from about 100 times to 200 times greater than the vertical thermal conductivity.
4. The wafer chuck as claimed in claim 1, wherein the dielectric layer has an upper surface, the thermal conductive layer is between the upper surface and the electrode when the thermal conductive layer is embedded in the dielectric body.
5. The wafer chuck as claimed in claim 1, wherein the thermal conductive layer is between the electrode and the main body when the thermal conductive layer is embedded in the dielectric body.
6. The wafer chuck as claimed in claim 1, wherein when the thermal conductive layer is embedded in the dielectric layer, the thermal conductive layer comprises:
a thermal conductive material embedded in the dielectric layer; and
a boundary material configured to bond the thermal conductive material and the dielectric layer,
wherein the thermal conductive material comprises graphene, and the boundary material comprises metal.
7. The wafer chuck as claimed in claim 1, wherein when the thermal conductive layer is embedded in the main body, the thermal conductive layer comprises:
a thermal conductive material embedded in the main body; and
a boundary material configured to bond the thermal conductive material and the main body,
wherein the thermal conductive material comprises graphene, and the boundary material comprises metal.
8. The wafer chuck as claimed in claim 1, further comprising a heater, embedded in the main body, configured to heat the main body, wherein the thermal conductive layer is between the dielectric layer and the heater when the thermal conductive layer is embedded in the main body.
9. The wafer chuck as claimed in claim 1, wherein the main body comprises a liquid channel, and the thermal conductive layer is between the dielectric layer and the liquid channel when the thermal conductive layer is embedded in the main body.
10. A wafer chuck, comprising:
a main body;
a dielectric layer disposed over the main body; and
a thermal conductive layer embedded in the dielectric layer,
wherein the thermal conductive layer is configured to generate an electrostatic field for retaining a wafer,
wherein the thermal conductive layer has a lateral thermal conductivity and a vertical thermal conductivity, and the lateral thermal conductivity is greater than the vertical thermal conductivity.
11. The wafer chuck as claimed in claim 10, wherein the thermal conductive layer comprises graphene.
12. The wafer chuck as claimed in claim 10, wherein the lateral thermal conductivity is in a range from about 100 times to 200 times greater than the vertical thermal conductivity.
13. The wafer chuck as claimed in claim 10, wherein the thermal conductive layer comprises:
a thermal conductive material embedded in the dielectric layer; and
a boundary material configured to bond the thermal conductive material and the dielectric layer,
wherein the thermal conductive material comprises graphene, and the boundary material comprises metal.
14. The wafer chuck as claimed in claim 10, further comprising a heater, embedded in the main body, configured to heat the main body.
15. The wafer chuck as claimed in claim 10, wherein the main body comprises a liquid channel, for a liquid flowing therethrough, and the liquid is configured to adjust a temperature of the main body.
16. A wafer chuck, comprising:
a main body;
a dielectric layer disposed over the main body;
an electrode, embedded in the dielectric layer, configured to generate an electrostatic field for retaining a wafer; and
a thermal conductive layer between the main body and the dielectric layer, configured to bond the main body and the dielectric layer,
wherein the thermal conductive layer has a lateral thermal conductivity and a vertical thermal conductivity, and the lateral thermal conductivity is greater than the vertical thermal conductivity.
17. The wafer chuck as claimed in claim 16, wherein the thermal conductive layer comprises graphene, and the lateral thermal conductivity is in a range from about 100 times to 200 times greater than the vertical thermal conductivity.
18. The wafer chuck as claimed in claim 16, wherein the thermal conductive layer comprises:
a thermal conductive material between the main body and the dielectric layer;
an upper boundary material configured to bond the thermal conductive material and the dielectric layer; and
a lower boundary material configured to bond the thermal conductive material and the main body,
wherein the thermal conductive material comprises graphene, and the upper and lower boundary materials comprise metal.
19. The wafer chuck as claimed in claim 16, further comprising a heater, embedded in the main body, configured to heat the main body.
20. The wafer chuck as claimed in claim 16, wherein the main body comprises a liquid channel for a liquid flowing therethrough, and the liquid is configured to adjust a temperature of the main body.