Author: claimsbot

1. A method for implementing an L:M Fractional Sample Rate Converter (F-SRC), for controlled and direct insertion and cancellation of samples in a processed data stream, the method comprising:
receiving an input data stream (DATA_IN) by an input block, processing L signal samples (x(m)) having an input data rate (fIN), in a predetermined time interval (Ts);
generating an interpolated data stream (DATA_IN1), upsampled times a factor P (P<M), with the input block providing signal samples (x1(h)) having a data rate PfIN;
generating an intermediate data stream (DATA_IMD1) with a rate adapting stage receiving the signal samples from the input block, and providing signal samples (y1(k)) adapted to an intermediate data rate (PfOUT));
delivering an output data stream (DATA_OUT) with a low pass and P:1 decimation filter receiving the signal samples from the rate adapting stage, including M signal samples, z(k), having a desired output sample rate (fOUT=MTs);
adapting the input data rate in the rate adapting stage to the output data rate by a direct insertion of repeated samples into the interpolated stream (DATA_IN1) when L<M, and by a direct cancellation of samples when L>M, thus generating a provisional intermediate stream DATA_DTY of samples w2(k) that are already adapted to an intermediate output rate PfOUT, although being affected by aliases falling within an output Nyquist band \u2212fOUT2, fOUT2; and
generating the intermediate stream (DATA_IMD1) in the rate adapting stage by weighting the signal samples (w2(k)) of the provisional intermediate data stream (DATA_DTY) to suppress aliases from the output Nyquist band \u2212fOUT2, fOUT2.
2. The method according to claim 1, wherein the rate adapting stage includes:
an up-sampling mode, when L<M and fIN<fOUT, generating an intermediate stream (DATA_IMD1), with signal samples y1(k) at the intermediate data rate (PfOUT), by directly inserting M\u2212L repeated samples each L input samples of the interpolated stream (DATA_IN1); and
a down-sampling mode, when L>M and fIN>fOUT, generating the intermediate stream (DATA_IMD1), with signal samples y1(k) at the intermediate data rate (PfOUT), by cancelling L\u2212M samples each L input samples of the interpolated stream (DATA_IN1).
3. The method according to claim 2, wherein in the up-sampling mode (L<M), repeated samples are inserted in locations of the interpolated stream (DATA_IN1), with signal samples x1(h)at a data rate PfIN, according to the following formula: w2(k)=x1(div(kL,M) where div(a,b) denotes the integer part of ab; thus generating samples w2(k) of the provisional intermediate data stream (DATA_DTY), adapted to the intermediate rate PFOUT.
4. The method according to claim 2, wherein is the down sampling mode, when L>M, data are cancelled from the interpolated stream (DATA_IN1), with signal samples w2(k) at a data rate PfIN, according to the following formula: w2(k)=x1(div(kL,M); thus generating samples of the provisional intermediate data stream (DATA_DTY), adapted to the intermediate rate PfOUT.
5. The method according to claim 1, wherein weighting the samples w2(k) of the provisional intermediate stream (DATA_DTY) in said Rate Adapting Stage suppresses aliases falling within the output Nyquist bad \u2212fOUT2, fOUT2of the provisional intermediate stream (DATA_DTY), generated by the samples insertions and cancellations; a set of weights Wg(k) is applied to the signal samples in an order, different than a natural order, thus generating the samples y1(k) of the intermediate stream DATA_IMD1 according to the following equation:
y1(k)=w2(k)*Wg(mod(kL,M)), k=0, 1, 2, . . . ,
where mod(a,b) denotes the remainder of the division ab.
6. The method according to claim 5, wherein the set of weights Wg(k) is computed according to the following equation:
Wg(k)=Ko|q(k)*(1\u2212q(k))|Q; q(k)=k(M\u22121), h=0, 1, . . . , (M\u22121);
Ko being a normalization factor and Q a parameter selected to obtain the desired alias suppression.
7. The method according to claim 1, wherein the input block, includes an up-sampler (1:P) for interpolating the signal samples (x(m)) of the input signal times a P up-sampling factor, thus increasing the input data rate from fIN to P*fIN, where P\u2267Pmin=M|M\u2212L|, P<M.
8. The method according to claim 1, wherein the rate adapting stage, receives a data stream with a data rate of P*fIN, and outputs a data stream with a data rate of (ML)*P*fIN=P*fOUT.
9. An L:M fractional sample rate converter (F-SRC) architecture for controlled and direct insertion and cancellation of samples in a processed data stream, comprising:
an up-sampler (1:P) input block receiving an input data stream (DATA_IN) and processing L signal samples (x(m)) having an input data rate (fIN) in a predetermined time interval (Ts), and providing an interpolated data stream (DATA_IN1), upsampled times a factor P, P<M, therefore having a PfIN data rate;
a rate adapting stage generating an intermediate data stream (DATA_IMD1) with signal samples (y1(k)) adapted to an intermediate data rate (PfOUT); and
a low pass and decimation filter delivering an output data stream (DATA_OUT) including M signal samples wherein (z(n)) having a desired output sample rate (fOUT=MTs);
the rate adapting stage weighting the signal samples (x1(h)) of the interpolated data stream; and
the rate adapting stage adapting the input data rate to the output data rate by a direct insertion of repeated samples into the processed stream when L<M, and by a direct cancellation of samples when L>M.
10. The L:M Fractional Sample Rate Converter (F-SRC) architecture according to claim 9, wherein said low-pass and decimation filter is structured to decimate the intermediate data stream times a factor P thus reducing the output rate down to (ML)*fIN=fOUT.
11. The L:M Fractional Sample Rate Converter (F-SRC) architecture according to claim 9, wherein said low-pass and decimation filter is structured to suppress possible aliases falling out of a Nyquist output band \u2212fIN2, fIN2 in the intermediate data stream before a P:1 decimation is executed.
12. The L:M Fractional Sample Rate Converter (F-SRC) architecture according to claim 9, wherein said up-sampler (1:P) input block provides interpolation by an up-sampling factor P<M, P>Pmin=M|M\u2212L|.
13. The L:M Fractional Sample Rate Converter (F-SRC) architecture according to claim 10, wherein the decimation factor P of the low-pass and decimation filter is equal to the up-sampling factor P of the up-sampler input block.
14. The L:M Fractional Sample Rate Converter (F-SRC) architecture according to claim 10, wherein when the decimation factor of the low-pass and decimation filter is different from the up-sampling factor P of the up-sampler input block, a conversion rate is given by (LP)(MPOUT), where POUT denotes the decimation factor of the low-pass and decimation filter in the case POUT\u2260P.
15. An L:M fractional sample rate converter (F-SRC) comprising:
an up-sampler receiving an input data stream (DATA_IN) and processing L signal samples (x(m)) having an input data rate (fIN) in a predetermined time interval (Ts), and providing an interpolated data stream (DATA_IN1), upsampled by a factor P, P<M, and having a PfIN data rate;
a rate adapting stage weighting the signal samples (x1(h)) of the interpolated data stream and generating an intermediate data stream, the rate adapting stage adapting the input data rate to the output data rate by insertion of repeated samples into the data stream when L<M, and by a cancellation of samples when L>M; and
a decimation filter receiving the intermediate data stream and delivering an output data stream (DATA_OUT) including M signal samples (z(n)) having a desired output sample rate (fOUT=MTs).
16. The L:M Fractional Sample Rate Converter (F-SRC) according to claim 15, wherein said decimation filter decimates the intermediate data stream by a factor P thus reducing the output rate down to (ML)*fIN=FOUT.
17. The L:M Fractional Sample Rate Converter (F-SRC) according to claim 15, wherein said decimation filter suppresses aliases falling out of a Nyquist output band \u2212fIN2, fIN2 in the intermediate data stream before a P:1 decimation is executed.
18. The L:M Fractional Sample Rate Converter (F-SRC) according to claim 15, wherein said up-sampler provides interpolation by an up-sampling factor P<M, P\u2267Pmin=M|M\u2212L|.
19. The L:M Fractional Sample Rate Converter (F-SRC) according to claim 16, wherein the decimation factor P of the decimation filter is equal to the up-sampling factor P of the up-sampler.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A secondary side power supply controller for regulating a secondary voltage of a secondary winding of a power supply comprising:
a synchronizing circuit configured to receive an input signal representative of a primary side switching drive signal used to control a power switch of a primary side of the power supply and responsively provide a sync signal having an active state representative of the primary side switching drive signal;
a secondary side switching control section configured to receive a feedback signal that is representative of the secondary voltage and receive the sync signal and responsively form a switching control signal operable to control a secondary side power switch for regulating the secondary voltage, the secondary side power switch coupled in series with the secondary winding; and
control logic configured to receive the sync signal and the switching control signal and responsively form a switching drive signal operable to control the secondary side power switch wherein the control logic is configured to enable the secondary side power switch independently of a state of the primary side switching drive signal at least after the secondary voltage is less than a first value.
2. The secondary side power supply controller of claim 1 wherein the control logic is also configured to disable the secondary side power switch independently of the primary side switching drive signal at least after the secondary voltage is greater than a second value, and configured to operate the secondary side power switch responsively to the feedback signal at least after the secondary voltage is between the first value and the second value.
3. The secondary side power supply controller of claim 2 wherein the control logic also configured to regulate the secondary voltage substantially synchronously with the primary side switching drive signal at least after the secondary voltage is between the first value and the second value.
4. The secondary side power supply controller of claim 3 wherein the control logic also configured to regulate the secondary voltage substantially synchronously with the primary side switching drive signal at least after the secondary voltage is between the first value and the second value includes the control logic configured to forma an active state of the switching control signal substantially synchronously with the primary side switching drive signal.
5. The secondary side power supply controller of claim 1 wherein the control logic includes a first latch having a set input coupled to receive the sync signal from the synchronizing circuit and a first edge detector coupled to receive the switching control signal and responsively reset the first latch responsively to a negative transition of the switching control signal when the sync signal is disabled.
6. The secondary side power supply controller of claim 5 wherein the control logic includes a second latch having a set input coupled to receive the switching control signal and a second edge detector coupled to receive the sync signal from the synchronizing circuit and responsively reset the second latch responsively to a negative transition of the sync signal when the switching control signal is disabled.
7. The secondary side power supply controller of claim 1 further including the control logic configured to enable the secondary side power switch with a substantially one hundred per cent duty cycle at least after the secondary voltage is less than the first value.
8. The secondary side power supply controller of claim 7 wherein the control logic overrides the sync signal at least after the secondary voltage is less than the first value.
9. A method of forming a secondary side controller of a power supply system comprising:
forming the secondary side controller to enable a secondary side power switch independently of a state of a primary side power switch at least after a secondary voltage of a secondary winding of the power supply system is no greater than a first value.
10. The method of claim 9 wherein forming the secondary side controller to enable the secondary side power switch independently of the state of the primary side power switch includes configuring the secondary side controller to enable the secondary side power switch with substantially one hundred percent duty cycle.
11. The method of claim 9 wherein forming the secondary side controller to enable the secondary side power switch independently of the state of the primary side power switch includes configuring the secondary side controller to form a sync signal that is representative of a primary drive control signal used to control the primary side power switch and to override the sync signal responsively to the secondary voltage being no greater than the first value.
12. The method of claim 11 further including configuring the secondary side controller to enable secondary side power switch responsively to the sync signal responsively to the secondary voltage being greater than the first value.
13. The method of claim 9 further including configuring the secondary side controller to enable the secondary side power switch substantially synchronously with the primary side power switch responsively to the secondary voltage being greater than the first value.
14. The method of claim 9 further including disabling the secondary side power switch independently of the state of the primary side power switch responsively to the secondary voltage being greater than a second value.
15. The method of claim 14 further including configuring the secondary side controller to enable the secondary side power switch substantially synchronously with the primary side power switch and to disable the secondary side power switch responsively to a value of the secondary voltage that is between the first value and the second value.
16. The method of claim 15 wherein configuring the secondary side controller to enable the secondary side power switch substantially synchronously with the primary side power switch includes coupling an output of a synchronizing circuit to enable the secondary side power switch without a delay from a capacitor used to generate a ramp signal used to control an inactive state of the secondary side power switch.
17. A secondary side power supply controller for regulating a secondary voltage of a secondary winding of a power supply comprising:
a primary side switching control section having a ramp generator, an error amplifier and a PWM comparator;
a secondary side synchronizing circuit configured to receive a signal from the secondary winding and responsively form a sync signal that is representative of a primary side switching drive signal used to control a primary winding of the power supply; and
a secondary side control section configured to form a switching drive signal operable to control a secondary side power switch, the secondary side control section configured to form an active state of the switching drive signal independently of a state of the sync signal responsively to the secondary voltage being no greater than a first value.
18. The secondary side power supply controller of claim 17 wherein the secondary side power supply controller is configured to form the active state of the switching drive signal with a substantially one hundred percent duty cycle.
19. The secondary side power supply controller of claim 17 further including the secondary side power supply controller configured to form the active state of the switching drive signal substantially synchronously with the primary side switching drive signal at least after the secondary voltage is greater than the first value.
20. The secondary side power supply controller of claim 19 wherein the sync signal is coupled to form the active state of the switching drive signal without a capacitive delay from a capacitor used by the ramp generator.

1. A method for encoding a connection between a base and a mobile handset, comprising the steps of:
a) generating a key agreed to between the base and the mobile handset during a first connection, wherein the key comprises an index assigned to by the base during the first connection; and
b) using the key for a second connection between the base and the mobile handset, wherein the data to be transmitted between the base and the mobile handset are identified and encoded using the index assigned to the key.
2. The method according to claim 1, wherein the key comprises a default cipher key.
3. The method according to claim 1, wherein the generation of the key is implemented after a first registration between the base and the mobile handset, and is permanently stored in a memory.
4. The method according to claim 1, wherein the key is determined as an actual key at an arbitrary point of time during a connection establishment between the base and the mobile handset.
5. The method according to claim 1, wherein during the second connection a new key is agreed to with which a further connection between the base and the mobile handset is re-encoded.
6. A computer program product comprising: a coding means which is adapted to implement the steps of a method according to claim 1 when run on a computer.
7. The method of claim 1, wherein the key comprises a derived cipher key.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An optical fiber termination apparatus, comprising:
a housing defining an optical fiber receiving chamber and having a connector adaptor receiving opening, wherein the optical fiber receiving chamber is configured to receive and retain a loop of optical fiber at a bend radius exceeding a minimum bend radius of the optical fiber;
a connector adaptor positioned in the connector adaptor receiving opening and having a connector opening therein extending from outside the housing to the optical fiber receiving chamber, the connector opening being configured to mate with a connector of a predetermined connector type; a seal member positioned between an inner wall of the housing and the connector adaptor to seal a gap therebetween; and a removable attachment member that retains the connector adaptor in the connector adaptor receiving opening, wherein the removable attachment member comprises a spring member and wherein the housing and the connector adaptor each have an opening therein for receiving the spring member; and
a removable attachment member that retains the connector adaptor in the connector adaptor receiving opening.
2. The apparatus of claim 1 further comprising at least one of the connector or a removable closure member in the connector opening that closes the connector opening.
3. The apparatus of claim 1 wherein the opening in the connector adaptor comprises a first channel in an outer surface thereof and a second channel in the outer surface thereof on an opposite side of the connector adaptor.
4. The apparatus of claim 1 wherein the optical fiber receiving chamber is configured to receive a length of the optical fiber sufficient to allow removal of the connector adaptor from the housing to allow access to a back fiber connection member of the connector while retaining the loop of optical fiber at a bend radius exceeding the minimum bend radius of the optical fiber.
5. The apparatus of claim 4 wherein the housing includes an optical fiber receiving opening therein extending into the optical fiber receiving chamber.
6. An optical fiber termination apparatus, comprising:
a plurality of housings, each defining an optical fiber receiving chamber and having a connector adaptor receiving opening;
a connector adaptor positioned in the connector adaptor receiving opening of each of the housings and having a connector opening therein extending from outside the housing to the optical fiber receiving chamber, the connector opening of each connector adaptor being configured to mate with a connector of a predetermined connector type;
an optical junction box;
an optical fiber tube extending from the optical fiber receiving opening of each of the housings to the optical junction box;
an optical fiber extending through each of the optical fiber tubes between the optical junction box and the plurality of housings; and
an optical fiber splice member in the optical junction box configured to optically couple the optical fibers to respective source optical fibers extending into the optical junction box.
7. The apparatus of claim 6 wherein the optical fiber receiving chamber is configured to receive and retain a loop of optical fiber at a bend radius exceeding a minimum bend radius of the optical fiber.
8. The apparatus of claim 6 wherein the optical fiber splice member comprises an optical fiber splice tray.
9. The apparatus of claim 6 further comprising an optical fiber termination connector on an end of the optical fiber in each of the plurality of housings, the optical fiber termination connector being configured to releasably couple to the back fiber connection member.
10. The apparatus of claim 9 further comprising a sealant in each of the tubes between the respective housings and the optical junction box.
11. The apparatus of claim 10 further comprising the connector positioned in the connector opening, the connector having a closable front fiber connection member on a face thereof extending from the housing and wherein the optical fiber receiving chamber is environmentally sealed when the front fiber connection member is closed.
12. The apparatus of claim 11 further comprising, for each housing, a seal member positioned between the connector and the connector opening and a seal between the optical fiber tube and the optical fiber receiving opening and wherein the optical fiber receiving chamber is environmentally sealed by the seal member positioned between the connector and the connector opening, the seal between the optical fiber tube and the optical fiber receiving opening and the sealant in the optical fiber tube and wherein opening the front fiber connection member on the connector of one of the housings will not break the environmental seal for other of the housings.
13. The apparatus of claim 12 wherein the seal between the optical fiber tube and the optical fiber receiving opening comprises an adhesive and the seal member positioned between the connector and the connector opening comprises an O-ring.
14. The apparatus of claim 12 wherein each of the housings is configured to receive only a single connector.
15. The apparatus of claim 6 wherein the respective source optical fibers extending into the optical junction box comprise an optical drop cable coupled to an optical distribution source.
16. A method of terminating optical fiber comprising:
routing an optical fiber from a main distribution line to an optical fiber termination apparatus housing;
selecting a desired connector type for terminating the routed optical fiber; installing a connector of the selected connector type in a connector adaptor having a connector opening therein configured to mate with the selected connector type;
coupling the routed optical fiber to a back fiber connection member of the connector; and

installing the connector adaptor in the housing.
17. The method of claim 16 wherein routing an optical fiber comprises:
routing the optical fiber from the main distribution line to an optical junction box; splicing the optical fiber from the main distribution line to a termination optical fiber in the optical junction box; and
routine the termination optical fiber to the optical fiber termination apparatus housing.
18. The method of claim 17 wherein a plurality of optical fibers are routed from the main distribution line to the optical junction box and spliced to respective termination optical fibers and wherein routing the termination optical fiber comprises routing respective ones of the termination optical fibers to different optical fiber termination apparatus housings to provide a multi-drop connection from the main distribution line.
19. The method of claim 18 further comprising providing environmental sealing of the routing of the respective termination optical fibers configured so that breach of the environmental sealing for one of the termination optical fibers will not break the environmental sealing for other of the termination optical fibers.
20. The method of claim 16 wherein routing an optical fiber comprises:
separating a plurality of optical fibers from the main distribution line;
singulating the respective separated optical fibers; and
routing respective ones of the singulated optical fibers to different optical fiber termination apparatus housings to provide a multi-drop connection from the main distribution line.