1460734239-72b42bb5-a6b3-487b-92c1-b5d675af0a2e

1. An electronic device comprising:
a central processing unit;
memory in data communication with the central processing unit;
a network connector in data communication with the central processing unit;
a firmware image stored in a compressed format within the memory, wherein the firmware image includes a plurality of software components; and
an update agent stored within the memory and configured to provide a list of software components for communication out the network connector,
wherein the electronic device is configured to communicate the list of software components out the network connector and receive a modified firmware image in a compressed format that includes at least one additional software component.
2. The electronic device of claim 1, wherein the electronic device is a display device.
3. The electronic device of claim 2, wherein the display device is a television.
4. The electronic device of claim 1, wherein the update agent is further configured to monitor an amount of the memory not in use by the electronic device and communicate the amount of memory out the network connector.
5. The electronic device of claim 1, wherein the update agent is further configured to communicate out the network connector a list of hardware components located within the electronic device.
6. The electronic device of claim 1, wherein the electronic device is further configured to receive and display a list of additional software components available for the electronic device.
7. A television comprising:
a central processing unit;
memory in data communication with the central processing unit; and
a network connector in data communication with the central processing unit;
a plurality of software components stored within the memory,
wherein the television is configured to communicate information out the network connector and receive at least one additional software component for installation into the memory.
8. The television of claim 7, wherein one of the software components is a software update agent, and wherein the software update agent is designed to collect the information from the television and communicate the information out the network connection.
9. The television of claim 7, wherein the information relates to hardware components within the television.
10. The television of claim 7, wherein the information includes a size of the memory available for use.
11. The television of claim 7, wherein the television is further configured to receive and display a list of additional software components available for the television.
12. A method of modifying a compressed firmware image on an electronic device, the method comprising the steps of:
expanding a compressed firmware image including a plurality of software components;
running at least some of the software components;
transmitting a list of the plurality of software components out a network connector;
receiving a modified compressed firmware image via the network connector, wherein the modified compressed firmware image includes the plurality of software components and at least one additional software component; and
replacing the compressed firmware image with the modified compressed firmware image.
13. The method of claim 12, wherein the electronic device is a display device.
14. The method of claim 13, wherein the display device is a television.
15. The method of claim 12, before the receiving step further comprising the step of transmitting a list of hardware components located within the television out the network connector.
16. The method of claim 12, before the receiving step further comprising the step of displaying a list of additional software components available for installation on the electronic device.
17. The method of claim 12, before the receiving step further comprising the step of monitoring an amount of available memory and transmitting the amount of available memory out the network connector.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A color printing apparatus comprising:
color print means for printing in multi tone levels using at least yellow, magenta, cyan and black printing materials;
font storage means for storing font data in advance, wherein the font data corresponds to the yellow, magenta, cyan and black colors has at least different tone levels for respective colors, in correspondence with a character code, and the font data of at least one of yellow, magenta, cyan and black colors is data having the multi tone levels being different from tone level of other font data;
development means for reading out the font data stored in said font storage means for respective colors, in correspondence to a code, and storing the font data for each color into a print buffer corresponding to each color; and
control means for outputting the font data for each color stored in the print buffer to said color print means and controlling to cause said color print means to print an image corresponding to the code,
wherein said font storage means stores font data of colors which can be printed by said color print means, and
wherein the font data corresponding to the black color is binary data indicating the presenceabsence of a pixel, and a data size of font data corresponding to each of yellow, magenta, and cyan colors is 2n, with n being a positive integer, times of the data size of the font data corresponding to black color.
2. The apparatus according to claim 1, wherein the number of pixels of the font data in a horizontal direction is set to be an integer multiple of a least common multiple of a bit length for representing each pixel of the font data corresponding to each color.
3. An apparatus according to claim 1, wherein said color print means has a plurality of print heads, each of said print heads ejects ink having a different color from each other, and said font storage means stores the font data having different tone levels for respective colors in correspondence with the ink ejected from said plurality of print heads.
4. A method of controlling a color printing apparatus having color print means for printing in multi tone levels using at least yellow, magenta, cyan and black printing materials, and font storage means for storing font data corresponding to the yellow, magenta, cyan and black colors and for respective colors including data of multi tone levels in advance, in correspondence with codes, wherein the font data of at least one of yellow, magenta, cyan and black colors is data having the multi tone levels being different from the tone level of other font data, the method comprising:
a development step of reading out the font data for respective colors stored in the font storage means in correspondence to a code, and storing the font data for each color into a print buffer corresponding to each color; and
a control step of outputting the font data for each color stored in the print buffer to the color print means and controlling the color print means to print an image corresponding to the code,
wherein the font storage means stores font data of colors which can be printed by the color print means, and
wherein the font data corresponding to black color is binary data indicating the presenceabsence of a pixel, and a data size of font data corresponding to each of yellow, magenta, and cyan colors is set to be 2n, with n being a positive integer, times of the data size of the font data corresponding to black color.
5. The method according to claim 4, wherein the number of pixels of the font data in a horizontal direction is set to be an integer multiple of a least common multiple of a bit length for representing each pixel of the font data corresponding to each color.
6. A method according to claim 4, wherein the color print means has a plurality of print heads, each of the print heads ejecting ink having a different color from each other, and the font storage means stores the font data having different tone levels for respective colors in correspondence with the ink ejected from the plurality of print heads.

1460734232-c04e6d1f-debf-4127-bcaa-59df47db1c57

1. A spinal stabilization device, comprising: a first pair of arms and a second pair of arms, each pair of arms having a superior portion adapted to mate to a superior vertebra, an inferior portion adapted to mate to an inferior vertebra, and a central portion extending between the superior and inferior portions; a central spacer adapted to be positioned between posterior elements of adjacent vertebrae, and having a cross-connector extending therethrough and adapted to engage the central portion of the first and second pair of arms.
2. The spinal stabilization device of claim 1, wherein the cross-connector is slidably adjustable relative to the first and second pair of arms.
3. The spinal stabilization device of claim 1, wherein the cross-connector includes hook-shaped members formed on opposed ends thereof and adapted to engage the central portion of the first and second pair of arms.
4. The spinal stabilization device of claim 1, wherein the central spacer is formed from a polymeric material and is adapted to limit extension of adjacent vertebrae.
5. The spinal stabilization device of claim 1, wherein the first and second pair of arms each have a unitary configuration and are formed from an elastomeric material.
6. A spinal stabilization device, comprising: a central spacer having first and second opposed lateral sides, the central spacer being adapted to be positioned between posterior elements of adjacent superior and inferior vertebrae and adapted to limit extension of the adjacent superior and inferior vertebrae; and a first pair of arms extending from the first lateral side of the central spacer, the first pair of arms being adapted to couple to adjacent superior and inferior vertebrae, and a second pair of arms extending from the second lateral side of the central spacer, the second pair of arms being adapted to couple to adjacent superior and inferior vertebrae; wherein the central spacer is slidably adjustable relative to the first and second pair of arms.
7. The spinal stabilization device of claim 6, wherein at least a portion of at least one of the first and second pair of arms is pliable for providing resistance to movement of adjacent superior and inferior vertebrae coupled thereto.
8. The spinal stabilization device of claim 6, wherein the first and second pair of arms each have a unitary construction and are formed from an elastomeric material.
9. The spinal stabilization device of claim 8, wherein the central spacer includes a cross-connector extending therethrough and adapted to mate to the first and second pair of arms to allow slidable adjustment of the central spacer relative to the first and second pair of arms.
10. A method for stabilizing adjacent vertebrae, comprising: coupling a first pair of arms extending from a central spacer to a first lateral side of adjacent superior and inferior vertebrae; coupling a second pair of arms extending from the central spacer to a second lateral side of adjacent superior and inferior vertebrae; sliding the central spacer relative to the first and second arms to position the central spacer as desired; and locking the central spacer in a fixed position relative to the first and second pair of arms.
11. The method of claim 10, wherein the central spacer includes a cross-connector extending therethrough and having opposed ends adapted to engage the first and second pair of arms.
12. The method of claim 10, wherein the central spacer is compressible and is positioned between posterior elements of the adjacent superior and inferior vertebrae to limit extension of the vertebrae.
13. The method of claim 10, wherein the first and second pair of arms each having a unitary configuration and are formed from an elastomeric material.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of forming junctions in a silicon-germanium layer, comprising:
implanting a dopant into the silicon-germanium layer;
implanting fluorine into the silicon-germanium layer; and
wherein a depth of the fluorine peak concentration is greater than or equal to a depth of the dopant peak concentration.
2. The method recited in claim 1, wherein the dopant is arsenic.
3. The method recited in claim 1, wherein implanting the dopant and fluorine includes forming a drain extension region or shallow source and drain regions.
4. The method recited in claim 3, wherein an implant dose of the fluorine ranges from 1\xd71015 cm\u22122 to 1\xd71016cm\u22122 for a dopant implant dose of 8\xd71014 cm\u22122 to 1\xd71016 cm\u22122.
5. The method recited in claim 1, wherein implanting the dopant and fluorine includes forming a halo or pocket region.
6. The method recited in claim 5, wherein an implant dose of the fluorine ranges from 5\xd71013 cm\u22122 to 5\xd71014 cm\u22122 for a dopant implant dose of 1\xd71013 cm\u22122 to 1\xd71014 cm\u22122.
7. The method recited in claim 1, wherein the dopant and fluorine are implanted adjacent a transistor gate.
8. The method recited in claim 1, wherein the silicon-germanium layer is located over a semiconductor substrate and the silicon-germanium layer has a germanium concentration that ranges from about 0 atomic percent at an interface between the semiconductor substrate and the silicon-germanium layer to about 20atomic percent at an upper surface of the silicon-germanium layer.
9. The method recited in claim 1 further including conducting an anneal following the implantation of the dopant and the fluorine.
10. A method of manufacturing an integrated circuit, comprising, comprising:
forming transistor gates over a semiconductor substrate;
implanting a dopant into a silicon-germanium layer located over the semiconductor substrate and adjacent the transistor gates;
implanting fluorine into the silicon-germanium layer adjacent the transistor gates;
forming source and drains adjacent the transistor gates;
depositing dielectric layers over the transistor gates;
forming interconnects in the dielectric layers to electrically interconnect the transistors and form an operative integrated circuit; and
wherein a depth of the fluorine peak concentration is greater than or equal to a depth of the dopant peak concentration.
11. The method recited in claim 10, wherein the dopant is arsenic.
12. The method recited in claim 10, wherein implanting the dopant and fluorine includes forming a drain extension region or shallow source and drain regions.
13. The method recited in claim 12, wherein an implant dose of the fluorine ranges from 1\xd71015 cm\u22122 to 1\xd71016 cm\u22122 for a dopant implant dose of 8\xd71014 cm\u22122 to 1\xd71016 cm\u22122.
14. The method recited in claim 10, wherein implanting the dopant and fluorine includes forming a halo or pocket region.
15. The method recited in claim 14, wherein an implant dose of the fluorine ranges from 5\xd71013 cm\u22122 to 5\xd71014 cm\u22122 for a dopant implant dose of 1\xd71013 cm\u22122 to 1\xd71014 cm\u22122.
16. The method recited in claim 10, wherein the dopant and fluorine are implanted adjacent a transistor gate.
17. The method recited in claim 10, wherein the silicon-germanium layer is located over a semiconductor substrate and the silicon-germanium layer has a germanium concentration that ranges from about 0 atomic percent at an interface between the semiconductor substrate and the silicon-germanium substrate to about 20atomic percent at an upper surface of the silicon-germanium substrate.
18. The method recited in claim 10 further including conducting an anneal following the implantation of the dopant and the fluorine.