Author: claimsbot

1. A method, comprising:
detecting a first audio data stream at a first audio input while a second audio data stream is received at a second audio input from an audio source that is synchronized with an output device;
switching a connection with the output device from the second audio input to the first audio input after the first audio data stream has been detected, the second audio input continuing to receive the second audio data stream after the switch to the first audio input; and
providing hardware emulation information to the audio source of the second audio data stream, the hardware emulation information simulating synchronization between the audio source and the output device.
2. The method of claim 1, wherein the first audio data stream is provided by an audio stream inputoutput (ASIO) source and wherein the second audio data stream is provided by an application driver.
3. The method of claim 1, further comprising:
detecting an end of the first audio data stream; and
switching from the first audio input to the second audio input after detecting the end of the first audio data stream.
4. The method of claim 1, wherein the first audio data stream is associated with a low-latency audio application and the second audio data stream is associated with a higher latency audio application than the first stream.
5. The method of claim 1, wherein the hardware emulation information includes audio stream location information associated with the second audio data stream.
6. The method of claim 5, wherein the audio stream location information includes information based on a direct memory access (DMA) pointer.
7. The method of claim 5, wherein the audio stream location information is based on a bit depth associated with the second audio data stream.
8. The method of claim 5, wherein the audio stream location information is based on a sample rate associated with the second audio data stream.
9. The method of claim 5, wherein the audio stream location information is based on a number of audio channels associated with the second audio data stream.
10. The method of claim 1, further comprising, prior to switching the connection with the output device from the second audio input to the first audio input, buffering the first audio stream while performing a fade-out operation on the second audio data stream.
11. The method of claim 10, further comprising performing a fade-in operation on the buffered first audio data stream after switching the connection with the output device from the second audio input to the first audio input.
12. A computer readable media having an embedded computer program, the computer program comprising:
instructions to detect a first audio data stream at a first audio input while a second audio data stream is received at a second audio input from an audio source that is synchronized with an output device;
instructions to switch a connection of the output device from the second audio input to the first audio input after the first audio data stream has been detected, the second audio input continuing to receive the second audio data stream after the switch to the first audio input; and
instructions to provide hardware emulation information to the audio source of the second audio data stream, the hardware emulation information simulating synchronization between the audio source and the output device.
13. The computer readable media of claim 12, further comprising:
instructions to detect an end of the first audio data stream;
instructions to switch from the first audio input to the second audio input after the end of the first audio data stream has been detected.
14. The computer readable media of claim 12, wherein the first audio data stream is provided by an audio stream inputoutput (ASIO) source and wherein the second audio data stream is provided by an application driver source.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method of forming a semiconductor device, comprising the steps of:
providing a semiconductor layer including a first region and a second region;
providing a first masking layer over the semiconductor layer, said first masking layer comprising a material that provides a permeable barrier to a dopant, wherein the first masking layer comprises a first thickness portion over the first region of the semiconductor layer and a second thickness portion over the second region of the semiconductor layer, wherein the first masking layer comprises first and second layers, and wherein the first region of the semiconductor layer comprises the first and second layers, and the second region of the semiconductor layer comprises only the first layer;
providing a second masking layer that overlies the first thickness portion of the first masking layer and exposes the second thickness portion of the first masking layer; and
exposing the first region and second region of the semiconductor layer covered by the first masking layer to the dopant, wherein the first region is lightly doped with the dopant in comparison to the second region.
2. The method as in claim 1, wherein the first thickness region is disposed on and aligned with the first region of the semiconductor layer.
3. The method as in claim 1, wherein the first thickness region and the second thickness region are fanned from a same layer of material.
4. The method as in claim 1, further comprising the step of prior to exposing to the dopant, providing a third masking layer over a portion of the first thickness region of the first masking layer, corresponding to a third region of the semiconductor layer, said third masking layer is impermeable to the dopant, wherein the third region is not doped when the second masking layer is exposed to dopant.
5. The method as in claim 4, wherein the semiconductor device is a TFT, and wherein the first region of the semiconductor corresponds to a lightly doped region of the TFT, the second region of the semiconductor corresponds to a heavily doped sourcedrain structure of the TFT, and the third region of the semiconductor corresponds to a channel of the TFT.
6. The method as in claim 5, wherein the first masking layer comprises a gate insulating layer of the TFT.
7. The method as in claim 6, wherein the third masking layer comprises a gate layer of the TFT.
8. The method as in claim 1, wherein the second thickness region is relatively thinner than the first thickness region.
9. The method as in claim 8, wherein the first masking layer is etched to form the second thickness region.
10. The method as in claim 9, wherein the first masking layer is etched using the second masking layer as an etching mask.
11. The method as in claim 1, wherein the first masking layer comprises first and second layers, wherein the first thickness portion comprises the first and second layers, and the second thickness portion comprises only the first layer.
12. The method as in claim 11, wherein the second layer is etched to form the second thickness region.
13. A fabrication method for a thin film transistor, comprising:
providing a substrate;
forming an active layer overlying the substrate;
forming a first gate insulating layer overlying the active layer, in which the gate insulating layer comprises a central region, a shielding region and an extending region, wherein the shielding region is disposed between the central region and the extending region, wherein the first gate insulating layer comprises first and second layers, and wherein the central region and the shielding region comprises the first and second layers, and the extending region comprises only the first layer;
forming a second gate insulating layer overlying the central region and the shielding region of the first insulating layer;
forming a gate layer overlying the second gate insulating layer, in which the gate layer overlies the central region and exposes the shielding region and the extending region; and
doping a first doped region under the shielding region and a second doped region under the extending region, wherein first doped region is lightly doped compared to the second doped region.
14. The fabrication method as in claim 13, wherein relative thickness of the shielding region is larger than the extending region.
15. The fabrication method as in claim 14, wherein the method of forming the first gate insulating layer comprises:
forming the first layer overlying the active layer;
forming the second layer overlying the first layer; and
etching to remove the second layer from to extending region, in which the first layer is retained in the extending region;
wherein, the shielding region comprises the first layer and the second layer; and
wherein, the extending region comprises the first layer.
16. The fabrication method for a thin film transistor as claimed in claim 13, wherein doping concentration of the first doped region is less than 2\xd71017 atomcm3, and doping concentration of the second doped region is 2\xd71019, \u02dc1021 atomcm3.
17. The fabrication method for a thin film transistor as claimed in claim 13, wherein doping concentration of the first doped region is less than 5\xd71018 atomcm3, and doping concentration of the second doped region is 2\xd71019\u02dc2\xd71021 atomcm3.
18. A fabrication method for a thin film transistor having a multi-gate structure, comprising:
providing a substrate;
forming an active layer overlying the substrate;
forming a first gate insulating layer and a second insulating layer overlying the active layer, in which the first gate insulating layer comprises a first central region, two first shielding regions, and two first extending regions, the first shielding region is disposed between the first central region and the first extending region, the second gate insulating layer comprises a second central region, two second shielding regions, two second extending regions, and the second shielding region is disposed between the second central region and the second extending region, and one of the two first extending regions and one of the two second extending regions are adjacent to be a common extending region;
forming a first gate layer and a second gate layer overlying the first gate insulating layer and the second gate insulating layer respectively, in which the first gate layer covers the first central region and exposes the first shielding regions and the first extending regions, and the second gate layer covers the second central region and exposes the second shielding regions and the second extending regions;
doping to form three first heavily doped regions in the active layer underlying the extending regions, four first lightly doped regions in the active layer underlying the shielding regions, and two undoped regions in the active layer underlying the central regions;
masking part of the first gate layer of the second gate layer, and two shielding regions common extending region between the first the second gate layers and expose the other two shielding regions and the other two extending regions; and
further doping the heavily doped regions in the active layer underlying the two exposed extending region and two second lightly doped regions in the active layer underlying two exposed shielding regions.

We claim:

1. A system for holding a plurality of batteries in a headrail that includes a headrail housing with a bottom wall and an elongated opening in the bottom wall, said system comprising
a battery carrier housing adapted to be mounted to the headrail housing substantially in alignment with the elongated opening; and
a battery carrier removably mounted in said battery carrier housing wherein said battery carrier includes a hanger at each of its longitudinal ends and a plurality of battery ports, one battery port for each of the plurality of batteries.
2. A system for holding a plurality of batteries, said system comprising
a headrail housing, wherein said headrail housing includes a bottom wall having an elongated opening therethrough;
a battery carrier housing mounted within said headrail housing substantially above said elongated opening; and
a battery carrier slidably mounted upwardly through said elongated opening and held amid said elongated opening by said battery carrier housing.
3. The system of claim 2, wherein said battery carrier housing is removably mounted to said headrail housing, and wherein said battery carrier is removably mounted to said battery carrier housing.
4. The system of claim 2, wherein said battery carrier includes a plurality of battery ports, one for each of the plurality of batteries.
5. The system of claim 4, wherein said battery ports are substantially circular and comprise circumferentially stair-stepped ledges.
longitudinal end, and wherein said ribs on said battery carrier are guided by said front and rear carrier guides.
6. The system of claim 1, wherein said battery ports are substantially circular and comprise circumferentially stair-stepped ledges.
7. The system of claim 1, wherein said battery carrier housing comprises a front wall and a rear wall, wherein said front wall has at least one front carrier guide extending rearwardly therefrom, and wherein said rear wall has at least one rear carrier guide extending forwardly therefrom.
8. The system of claim 7, wherein said hangers at said longitudinal ends of said battery carrier are positioned on said longitudinal ends of said battery carrier to be pivotally supported by said at least one front carrier guide during installation and removal of the batteries from said battery carrier.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A metering and mixing system of particulate solids for seed rotary dispenser in agricultural equipment for sowing wherein the seed rotary dispenser comprises a cylindrical compartment with circular cross-section and low height, which is mounted under a small seed feeder bin; and such seed rotary dispenser is driven at the bottom part by a miter gear coupled to the planter drive system, that provides rotation to a spinning disc provided with several calibrated orifices and a ring mounted facing the disc and which has a passage opening through which the seeds housed in the disc holes fall on a given point of the device, and wherein a metering and mixing device of particulate solids is provided between the seed bin and the rotary dispenser.
2. The system according to claim 1, further providing a feed cone mounted under the seed bin and over a cylindrical mixing compartment, conveying the seed grains by gravity from the seed bin to the compartment of the seed dispenser; and, said feed cone is further provided with, at least, a radial feeder of particulate solids which are conveyed to the cylindrical mixing compartment, simultaneously, with the seed grains, where, by means of a propeller are mixed together; and after the mixing these seeds, now treated, are deposited neatly in the feeding areas of the rotary dispenser through an outlet window.
3. The system according to claim 2, wherein the feed cone has a cylindrical mixing compartment arranged below, integrally, as a single piece.
4. The system according to claim 2, wherein the feed cone has a cylindrical mixing compartment arranged below, as a coupled part.
5. The system according to claim 2, wherein radially to the feed one is provided, at least, a feeding body defined by a tubular part in which a screw or worm thread is provided inside, which conveys through the tubular body the particulate solids deposited through an end inlet of such tubular body up to an outlet, at the opposite end of said tubular body, provided inside the cylindrical mixing compartment.
6. The system according to claim 5, wherein the propeller and the worm thread inside of the corresponding tubular body have their movements transmitted by a set of gears which, in turn, receive the movement from a driving gear, mounted coaxially and internally to the seed distributor container.
7. The system according to claim 2, wherein the drive gear is coupled axially to the spinning disk with orifices and is moved by the miter gear, which is driven by the planter transmission system.
8. The system according to claim 2, wherein the seeds after mixed to the particulate solids are deposited neatly between the first and second feed area of the rotary dispenser through the outlet window, of the cylindrical mixing compartment.