Author: claimsbot

1. A system for checking the validity of data transmission, the system comprising a data transmitting computer, a data receiving computer, and a network, wherein:
the data transmitting computer is provided for generating a check-code of original data, and sending a data packet, which comprises the original data and the check-code, to the data receiving computer via the network, the data transmitting computer comprising a Central Processing Unit (CPU), a Peripheral Component Interface (PCI) bus, and a memory, the CPU of the data transmitting computer comprising:
a shift operation unit for performing a shift operation on data units of the original data;
an addition operation unit for adding data in all data units after the shift operation to obtain a checksum1;
a complement operation unit for calculating a 2’s complement of the last 2m bytes of the checksum1 to obtain a check-code; and
a control unit for reading the original data from the memory via the PCI bus, and sending a data packet comprising the original data and the check-code to the data receiving computer; and
the data receiving computer is provided for receiving the data packet from the data transmitting computer, checking and determining whether the data packet is valid, the data receiving computer comprising a CPU, the CPU of the data receiving computer comprising:
a shift operation unit for performing a shift operation on the data units of the original data unpacked from the received data packet;
an addition operation unit for adding the data units after the shift operation to obtain a checksum2, and adding the last 2m bytes of the checksum2 to the check-code from the received data packet to obtain a checksum3; and
a control unit for determining whether the data packet from the data transmitting computer is valid by checking whether the last 2m bytes of the checksum3 equals \u201c0;\u201d
wherein \u201cm\u201d represents the number \u201c0\u201d or any natural number.
2. The system according to claim 1, wherein the memory is used for storing the original data to be sent to the data receiving computer.
3. The system according to claim 1, wherein the shift operation performed by the shift operation units of the data transmitting computer and the data receiving computer is a left shift operation.
4. The system according to claim 1, wherein the shift operation performed by the shift operation units of the data transmitting computer and the data receiving computer is a right shift operation.
5. The system according to claim 1, wherein each of the data units comprises 2m bytes of the original data.
6. A computer-based method for checking the validity of data transmission from a data transmitting computer to a data receiving computer through a network, the method comprising the steps of:
reading original data;
performing a shift operation on data units of the original data according to a shift operation rule;
adding all data of the data units after the shift operation to obtain a checksum1;
regarding the last 2m bytes of the checksum1 as a checksum11;
calculating a 2’s complement of the checksum11 to obtain a check-code;
packing the check-code with the original data into a data packet;
sending the data packet to the data receiving computer via the network;
unpacking the data packet to obtain the original data and the check-code;
performing a shift operation on the data units of the unpacked original data according to the shift operation rule;
adding all data of the data units after the shift operation of the immediately preceding step to obtain a checksum2;
regarding the last 2m bytes of the checksum2 as a checksum22;
adding the checksum22 to the check-code from the data packet to obtain a checksum3;
regarding the last 2m bytes of the checksum3 as a checksum33;
determining whether the data packet from the data transmitting computer is valid by checking whether the checksum33 equals \u201c0;\u201d and
accepting the valid data packet if the checksum33 equals \u201c0;\u201d
wherein \u201cm\u201d represents the number \u201c0\u201d or any natural number.
7. The method according to claim 6, further comprising the step of sending a request for resending of the data packet to the data transmitting computer if the checksum33 does not equal \u201c0.\u201d
8. The method according to claim 6, wherein each of the data units comprises 2m bytes of the original data.
9. The method according to claim 6, wherein the shift operation rule is either a left shift operation rule or a right shift operation rule.
10. A method for checking validity of data transmission from a data transmitting computer to a data receiving computer through a network, the method comprising the steps of:
reading data from said data transmitting computer;
retrieving a first checksum value based on said data;
retrieving a first check code by calculating a two’s complement of a predetermined last part of said first checksum value;
transmitting said data and said first check code to said data receiving computer through said network;
retrieving a second checksum value based on said transmitted data;
retrieving a second check code by adding a predetermined last part of said second checksum value;
retrieving a third check code by adding said second check code to said first check code; and
evaluating said validity of said data transmission by checking whether said third check code equals \u201c0\u201d.
11. The method according to claim 10, wherein said first and second checksum values are retrieved in a same way, and said predetermined last part of said first checksum value used to create said first check code has a binary length same as that of said predetermined last part of said second checksum value used to create said second check code.
12. The method according to claim 10, wherein at least one of said first and second checksum values is retrieved by performing a shift operation on said data first and adding up said data.
13. The method according to claim 10, wherein said predetermined last part at least one of said first and second checksum values is the last 2m bytes of said at least one of said first and second checksum values correspondingly, in which \u201cm\u201d represents the number \u201c0\u201d or any natural number.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An LED illuminator module with high heat-dissipating efficiency, comprising:
a flat heat pipe, formed with a flat surface;
an insulation layer formed on the flat surface of the flat heat pipe, the insulation layer including a pair of insulated electrode portions and a plurality of LED-setting portions disposed between the pair of insulated electrode portions;
a conducting layer having a pair of conducting electrode portions partially covered on the pair of the insulated electrode portions;
a plurality of LED fixed on the LED-setting portions respectively and electrically connected to the pair of conducting electrode portions with wires; and
an encapsulation covers the LEDs, the encapsulation mixed with phosphor powder.
2. The LED illuminator module with high heat-dissipating efficiency of claim 1, wherein each of the LED is connected with a pair of wires, contiguous two of the LEDs are connected with the wires, the outmost LEDs are connected with the conducting electrode portions with one of the wires.
3. The LED illuminator module with high heat-dissipating efficiency of claim 1, wherein the insulation layer further comprises a plurality of insulated strip portions formed on the flat heat pipe in a parallel way and located between the LED-setting portions, the conducting layer further comprises a plurality of conducting strip portions covered on the insulation strip portions.
4. The LED illuminator module with high heat-dissipating efficiency of claim 3, wherein each of the LED is connected a pair of wires, one of the wires is connected to the conducting strip portions, and the outmost LEDs are connected to the conducting electrode portions by one of the wires.
5. The LED illuminator module with high heat-dissipating efficiency of claim 1, further comprising a partition ring formed at a periphery of the LEDs.
6. The LED illuminator module with high heat-dissipating efficiency of claim 5, wherein the partition ring is a colloid bar.
7. The LED illuminator module with high heat-dissipating efficiency of claim 1, wherein the flat heat pipe has a concave portion and a plurality of blocking walls surrounding the concave portion, the concave portion has a flat bottom surface, wherein the LED-setting portions and the illuminating LEDs are disposed on the flat bottom surface of the concave portion, wherein the encapsulation is fixed in the concave portion.
8. The LED illuminator module with high heat-dissipating efficiency of claim 7, wherein the pair of insulated electrode portions and the pair of conducting electrode portions are formed outside the concave portion.
9. The LED illuminator module with high heat-dissipating efficiency of claim 7, wherein the blocking walls are oblique and are formed with a reflecting surface to reflect the light from the LEDs.
10. The LED illuminator module with high heat-dissipating efficiency of claim 1, wherein the encapsulation has a top surface or being a flat surface.
11. A manufacturing method for an LED illuminator module with high heat-dissipating efficiency, comprising steps as followed:
providing a flat heat pipe, and forming a flat surface on the flat heat pipe;
forming an insulation layer on the flat surface of the flat heat pipe, wherein the insulation layer is divided as a pair of insulated electrode portions, and a plurality of LED-setting portions between the pair of insulated electrode portions;
forming a conducting layer on the insulation layer, wherein the conducting layer is divided as a pair of conducting electrode portions partially covered on the pair of insulated electrode portions respectively;
fixing a plurality of LEDs on the LED-setting portions, and electrically connecting the LEDs to the pair of conducting electrode portions with wires; and
covering an encapsulation on the LED chips, wherein the encapsulation including phosphor powder.
12. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 11, further comprising an anti-soldering layer partially covered on the conducting layer.
13. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 11, wherein a wiring step is applied to the LEDs, each of the LEDs has a pair of wires, contiguous two of the LEDs are connected with the wires.
14. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 11, wherein the step of forming the insulated layer further comprises a step of forming a plurality of insulated strip portions, wherein the insulated strip portions are arranged on the flat heat pipe in a parallel way and located between the LED-setting portions; and wherein the step of forming the conducting layer further comprising a step of forming a plurality of conducting strip portions covered on the insulated strip portions.
15. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 11, further comprising a step of providing a partition ring on a periphery of the LEDs, wherein the partition ring is an opaque thermosetting plastic frame.
16. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 11, further comprising a step of forming a concave portion on the flat heat pipe, wherein the concave portion has a flat bottom surface, wherein the LED-setting portions and the LEDs are disposed on the flat bottom surface, and the encapsulation is fixed in the concave portion.
17. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 16, wherein the pair of insulated electrode portions, and the pair of conducting electrode portions are formed outside the concave portion.
18. The manufacturing method for LED illuminator module with high heat-dissipating efficiency of claim 16, wherein the concave portion is surrounded by a plurality of blocking walls, wherein the blocking walls are oblique and reflects light from the LEDs.

1. A system for generating parametric stereo data from phase modulated stereo data comprising:
a phase difference system receiving left channel audio data and right channel audio data and generating phase difference data based on a phase difference between left channel frequency domain data generated from the left channel audio data and right channel frequency domain data generated from the right channel audio data, wherein the left channel frequency domain data comprises left channel amplitude data and left channel phase data, and the right channel frequency domain data comprises right channel amplitude data and right channel phase data;
a phase difference weighting system receiving the phase difference data and generating weighting data to adjust the left channel amplitude data and the right channel amplitude data based on the phase difference data; and
a magnitude modification system adjusting the left channel amplitude data and the right channel amplitude data using the weighting data and eliminating the left channel phase data from the left channel frequency domain data and the right channel phase data from the right channel frequency domain data.
2. The system of claim 1 wherein the phase difference weighting system receives a plurality of frames of left channel frequency domain data and right channel frequency domain data.
3. The system of claim 2 further comprising a buffer system storing the phase difference data between the left channel frequency domain data and the right channel frequency domain data for two or more corresponding frames of left channel frequency domain data and right channel frequency domain data.
4. The system of claim 1 further comprising a frequency domain to time domain conversion system receiving the left channel frequency domain data with the left channel phase data eliminated and the right channel frequency domain data with the right channel phase data eliminated from the magnitude modification system and converting the left channel frequency domain data and the right channel frequency domain data into amplitude adjusted left channel time domain data and amplitude adjusted right channel time domain data.
5. A method for generating parametric audio data from phase modulated audio data comprising:
converting a first channel audio data from a time domain signal to first channel frequency domain data, wherein the first channel frequency domain data comprises first channel amplitude data and first channel phase data;
converting a second channel audio data from a time domain signal to second channel frequency domain data wherein the second channel frequency domain data comprises second channel amplitude data and second channel phase data;
determining a phase difference between the first channel frequency domain data and the second channel frequency domain data;
determining weighting data to apply to the first channel amplitude data and the second channel amplitude data based on the phase difference between the first channel frequency domain data and the second channel frequency domain data; and
adjusting the first channel amplitude data with the weighting data;
adjusting the second channel amplitude data with the weighting data;
eliminating the first channel phase data from the first channel frequency domain data; and
eliminating the second channel phase data from the second channel frequency domain data.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A hybrid photonics device, comprising:
a silicon portion having one or more features formed therein;
a non-silicon portion comprising one or more photonics devices proximate to the one or more features of the silicon portion, the non-silicon portion comprising a III-V material and a multiple quantum well region; and
a bonding layer coupling the silicon portion with the non-silicon portion, the bonding layer comprising a thickness of about 100 nanometers, the non-silicon portion being bonded to the silicon portion via the bonding layer prior to patterning of the one or more photonics devices;
wherein an optical mode of the silicon portion may at least partially overlap with a photonics device in the non-silicon portion to obtain gain from the photonics device in the non-silicon portion, and wherein the non-silicon portion comprising about a 5% multiple quantum well confinement factor.
2. A hybrid photonics device as claimed in claim 1, wherein the bonding layer comprises a liquid adhesive, or a cured liquid adhesive.
3. A hybrid photonics device as claimed in claim 1, wherein the bonding layer comprises spin on glass or DVS-BCB, or combinations thereof.
4. A hybrid photonics device as claimed in claim 1, wherein the silicon portion comprises a silicon-on-insulator wafer.
5. A hybrid photonics device as claimed in claim 1, wherein one or more of the features of the silicon portion comprises a silicon waveguide to couple with one or more photonics devices of the non-silicon portion.
6. A hybrid photonics device as claimed in claim 1, wherein one or more of the photonics devices comprises a laser, a photodetectors, an amplifier, or a wavelength converter, or combinations thereof.
7. A method to form a hybrid photonics device, comprising:
applying a liquid adhesive to a silicon wafer to form a bonding layer on the silicon wafer, the silicon wafer having one or more features formed therein, and the bonding layer comprising a thickness of about 100 nanometers;
bonding a non-silicon chip to the silicon wafer via the bonding layer, the non-silicon chip being disposed proximate to the one or more features of the silicon wafer, the non-silicon portion comprising a III-V material and a multiple quantum well region; and
fabricating one or more photonics devices in the silicon chip after said bonding to couple one or more photonics devices with one or more features of the silicon wafer, to form a hybrid photonics device, wherein an optical mode of the silicon wafer may at least partially overlap with a photonics device in the non-silicon chip to obtain gain from the photonics device in the non-silicon chip, and wherein the non-silicon portion comprises about a 5% multiple quantum well confinement factor.
8. A method to form a hybrid photonics device as claimed in claim 7, further comprising finishing processing of the hybrid photonics device after said fabricating.
9. A method to form a hybrid photonics device as claimed in claim 7, further comprising curing the liquid adhesive after said bonding.
10. A method to form a hybrid photonics device as claimed in claim 7, said applying a liquid adhesive comprising spin coating the liquid adhesive on the silicon wafer.
11. A method to form a hybrid photonics device as claimed in claim 7, said bonding being performed without involving direct oxide molecular bonding.
12. A method as claimed in claim 7, said one or more features formed in the silicon wafer comprising a silicon waveguide for one or more of the photonics devices.
13. A photonics system, comprising:
an optical transmitter comprising one or more hybrid photonics devices, or an optical receiver comprising one or more hybrid photonics devices, or combinations of a transmitter and a receiver;
wherein the one or more hybrid photonics devices of the optical transmitter or the optical receiver, or combinations thereof, comprises:
a silicon portion having one or more features formed therein;
a non-silicon portion comprising one or more photonics devices proximate to the one or more features of the silicon portion, the non-silicon portion comprising a III-V material and a multiple quantum well region; and
a bonding layer coupling the silicon portion with the non-silicon portion, the non-silicon portion being bonded to the silicon portion via the bonding layer prior to patterning of the one or more photonics devices, the bonding layer comprising a thickness of about 100 nanometers;
wherein an optical mode of the silicon portion may at least partially overlap with a photonics device in the non-silicon portion to obtain gain from the photonics device in the non-silicon portion, and wherein the non-silicon portion comprising about a 5% multiple quantum well confinement factor.
14. A photonics system as claimed in claim 13, wherein the bonding layer comprises a liquid adhesive, or a cured liquid adhesive, the liquid adhesive comprising spin on glass or DVS-BCB, or combinations thereof.
15. A photonics system as claimed in claim 13, wherein the silicon portion comprises a silicon-on-insulator wafer.
16. A photonics system as claimed in claim 13, wherein one or more of the photonics devices comprises a laser, a photodetectors, an amplifier, or a wavelength converter, or combinations thereof.
17. A photonics system as claimed in claim 13, further comprising:
a multiplexer to combine outputs of one or more of the hybrid photonics devices of the optical transmitter into a combined optical signal, or a demultiplexer to provide one or more signals from a combined optical signal to a corresponding one or more of the hybrid photonics devices of the optical receiver, or a combination of a multiplexer and a demultiplexer.