1. A process for manufacturing gas diffusion electrodes, which process comprises:
a) treating a restricted area of a pre-shrunk porous hydrophobic substrate wherein said area is less hydrophobic than a surrounding area of said substrate,
b) dispensing a slurry of catalyst onto the restricted area, the slurry of catalyst further comprises organic materials,
c) removing liquid from the dispensed slurry to dry the slurry, and
d) treating the dried slurry to remove organic materials.
2. A process as claimed in claim 1, wherein step c) comprises heating the slurry to evaporate the liquid.
3. A process as claimed in claim 1 wherein step d) comprises heating the dried slurry to a temperature sufficient to decompose the organic materials.
4. A process as in claim 1, where step c) is achieved by solidifying the liquid.
5. A process as claimed in claim 1, which includes pre-shrinking the hydrophobic substrate by heat treatment at a temperature greater than that used in either of steps c) or d).
6. A process as claimed in claim 1, which includes a further step of: e) cutting the catalyst deposit and the underlying portion of substrate from the rest of the hydrophobic substrate to provide a porous and conductive catalyst mass supported on the said portion of the substrate.
7. A process as claimed in claim 1, wherein the hydrophobic substrate is PTFE.
8. A process as claimed in claim 1 wherein (c) and (d) steps are performed in a single step.
9. A process as in claim 1 wherein step a) comprises further comprising forming a well at the said area in the pre-shrunk porous hydrophobic substrate to form said restricted area.
10. A process as in claim 9 which comprises forming said well after treating the restricted area to render the well relatively less hydrophobic than an area surrounding the well.
11. A process for manufacturing gas diffusion electrodes comprising:
a) heat treating a microporous hydrophobic PTFE sheet to a temperature between 280 to 310\xb0 C. to form a pre-shrunk porous hydrophobic substrate,
b) forming a well area in said heat treated PTFE sheet,
c) treating the well area to increase the surface energy of the well area by at least 10 to 15 dynescm2 so that said well area is less hydrophobic than a surrounding area of said PTFE sheet,
d) dispensing an aqueous slurry of catalyst into the treated well area the aqueous slurry comprises organic materials,
e) drying the aqueous slurry to remove water and dry the slurry, and
f) curing the dried slurry to remove organic materials.
12. The process of claim 11 which further comprises stamping the cured dried slurry to provide an electrode, removing the electrode from the well and lightly applying a relatively light pressing force to opposing sides of the removed electrode to improve mechanical adhesion.
13. The process of claim 11 wherein the slurry contains about 10 to 25% by weight of the catalyst, the slurry is dried at a temperature of 80-85\xb0 C. for about 10 minutes, and is cured by raising the temperature from the drying temperature at 5\xb0 C. per minute until it reaches 290\xb0 C. and is held at 290\xb0 C. for about 80 minutes.
14. The process of claim 13 which further comprises stamping the cured dried slurry to provide an electrode, removing the electrode from the well and lightly pressing the removed electrode with a force of about 600-900 N per 17 mm.
15. A gas diffusion electrode which has been prepared by providing a pre-shrunk microporous PTFE substrate with a confined area that is less hydrophobic than a surrounding area of said substrate, dispensing an aqueous catalyst slurry in the confined area, and heating the slurry and the PTFE substrate in the confined area to dry the slurry.
16. The gas diffusion electrode of claim 15 wherein the confined area is plasma treated prior to the slurry being dispensed, said slurry contains about 10 to 25% by weight of a catalyst, the slurry is dried at a temperature of 80-85\xb0 C. for about 10 minutes, and is cured by raising the temperature from the drying temperature at 5\xb0 C. per minute until it reaches 290\xb0 C. and is held at 290\xb0 C. for about 80 minutes, stamping the cured dried slurry to provide an electrode, removing the electrode from a support and applying a relatively light pressing force to opposing sides of the removed electrode to improve mechanical adhesion.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A memory device, comprising:
an array of memory elements, formed on a semiconductor chip;
a parallel array of word lines, extending in a first direction, connecting each memory element to a first data source;
a parallel array of bit lines, extending in a second direction, connecting each memory element to a second data source, the second direction forming an acute angle to the first direction; and
wherein the connection between each bit line and each memory element is a phase change element composed of memory material having at least two solid phases, and wherein the phase change elements lie above the lines in the memory element.
2. The device of claim 1, wherein the memory material comprises a combination of Ge, Sb, and Te.
3. The memory device of claim 1, wherein the phase-change cell comprises a combination of two or more materials from the group of Ge, Sb, Te, Se, In, Ti, Ga, Bi, Sn, Cu, Pd, Pb, Ag, S, and Au.
4. The memory device of claim 1, wherein the phase change element has a thickness between 5 and 50 nm.
5. The memory device of claim 1, wherein the phase change element has a thickness of less than 10 nm.
6. The memory device of claim 1, wherein the phase change element has a thickness between 0.5 and 5 nm.
7. The memory device of claim 1, wherein the memory element includes a plurality of successively formed metal layers, and wherein the phase change elements lie above all such metal layers.
8. The memory device of claim 7, wherein there are two metal layers.
9. The memory device of claim 7, wherein there are three metal layers.
10. A memory device, comprising:
an array of memory elements, formed on a semiconductor chip, each memory element including a drain electrode;
a parallel array of word lines, extending in a first direction, connecting each memory element to a first data source;
a parallel array of bit lines, extending in a second direction, connecting each memory element to a second data source at the drain electrode, the second direction forming an acute angle to the first direction;
wherein the connection between each bit line and each memory element is a phase change element composed of memory material having at least two solid phases; and
wherein the bit lines, the phase change elements and the drain electrodes all lie on the same level within the semiconductor chip.
11. The memory device of claim 10, wherein the phase-change cell comprises a combination of two or more materials from the group of Ge, Sb, Te, Se, In, Ti, Ga, Bi, Sn, Cu, Pd, Pb, Ag, S, and Au.
12. The memory device of claim 10, wherein each phase change element has a thickness between 5 and 50 nm.
13. The memory device of claim 10, wherein each phase change element has a thickness of less than 10 nm.
14. The memory device of claim 10, wherein each phase change element has a thickness between 0.5 and 5 nm.
15. The memory device of claim 10, wherein the memory element includes a plurality of successively formed metal layers.
16. The memory device of claim 15, wherein there are two metal layers.
17. The memory device of claim 15, wherein there are three metal layers.