Author: claimsbot

1. A linear motion device comprising:
a rod extending along a longitudinal axis; and
a plurality of actuator units, with each of the plurality of actuator units including at least one Shape Memory Alloy (SMA) element attached to a coupler, wherein the at least one SMA element of each of the plurality of actuator units moves the coupler along the longitudinal axis and into grasping engagement with the rod to move the rod a unit movement distance along the longitudinal axis in response to a control signal;
wherein the plurality of actuator units are actuated repeatedly in a synchronous order to move the rod in a continuous linear motion a distance greater than the unit movement distance of each of the plurality of actuator units;
wherein each of the plurality of actuator units includes a first coupler and a second coupler disposed on opposite sides of the rod; and
wherein the at least one SMA element includes a connecting SMA element extending between and attached to both the first coupler and the second coupler and configured to contract to draw the first coupler and the second coupler together into grasping engagement with the rod in response to the signal.
2. A linear motion device as set forth in claim 1 wherein the at least one SMA element of each of the plurality of actuator units contracts in response to the control signal to move the coupler.
3. A linear motion device as set forth in claim 1 wherein the at least one SMA element of each of the plurality of actuator units elongates in response to the cessation of the control signal to release the coupler from the grasping engagement with the rod and allow the coupler to return to a neutral position.
4. A linear motion device as set forth in claim 1 wherein the at least one SMA element of each of the plurality of actuator units is operable to move the coupler and the rod in both a first direction parallel to the longitudinal axis, and a second direction parallel to the longitudinal axis, wherein the first direction is opposite the second direction.
5. A linear motion device as set forth in claim 4 wherein the at least one SMA element includes a first SMA element attached to the coupler for moving the coupler in the first direction, and a second SMA element attached to the coupler for moving the coupler in the second direction.
6. A linear motion device as set forth in claim 1 wherein each of the plurality of actuator units includes at least one spring.
7. A linear motion device as set forth in claim 1 wherein at least one of the rod and the coupler include a friction feature.
8. A linear motion device as set forth in claim 1 wherein each of the plurality of actuator units includes a housing, with the rod and the coupler moveable relative to the housing.
9. A linear motion device as set forth in claim 8 wherein the coupler is coupled to the housing.
10. A linear motion device as set forth in claim 1 wherein a first group of the plurality of actuator units may be actuated simultaneously to increase a moving force applied to the rod.
11. A linear motion device as set forth in claim 1 wherein the coupler includes a spring member.
12. A linear motion device as set forth in claim 1 wherein the coupler includes a lever arm.
13. A linear motion device as set forth in claim 1 wherein each of the plurality of actuator units may default to a normally engaged position disposed in grasping engagement with the rod, or a normally disengaged position not disposed in grasping engagement with the rod.
14. A linear actuator assembly for a linear motion device, the linear actuator assembly comprising:
a plurality of actuator units, with each of the actuator units including:
a housing;
a coupler; and
at least one Shape Memory Alloy (SMA) element attached to the coupler;
wherein the at least one SMA element moves the coupler from a neutral position along a longitudinal axis and into grasping engagement with a rod to move the rod a unit movement distance along the longitudinal axis in response to a control signal;
wherein the at least one SMA element of each of the plurality of actuator units contracts in response to the control signal to move the coupler; and
wherein the at least one SMA element of each of the plurality of actuator units elongates in response to the cessation of the control signal to release the coupler from the grasping engagement with the rod and allow the coupler to return to the neutral position;

wherein the plurality of actuator units are actuated repeatedly in a synchronous order to move the rod in a continuous linear motion a distance greater than the unit movement distance of each of the plurality of actuator units; and
wherein each of the plurality of actuator units includes a first coupler and a second coupler disposed on opposite sides of the rod, and wherein the at least one SMA element includes a connecting SMA element extending between and attached to both the first coupler and the second coupler and configured to contract to draw the first coupler and the second coupler together into grasping engagement with the rod in response to the signal.
15. A linear actuator assembly as set forth in claim 14 wherein each of the plurality of actuator units includes at least one spring.
16. A linear actuator assembly as set forth in claim 14 wherein each of the plurality of actuator units includes a housing, with the rod and the coupler moveable relative to the housing, and with the coupler coupled to the housing.
17. A linear actuator assembly as set forth in claim 14 wherein the at least one SMA element includes a first SMA element attached to the coupler for moving the coupler in a first direction parallel to the longitudinal axis, and a second SMA element attached to the coupler for moving the coupler in a second direction parallel to the longitudinal axis, wherein the first direction is opposite the second direction.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A compound junctionless field effect transistor comprising:
a bulk silicon substrate not having a buried oxide layer;
a blocking semiconductor layer formed of a first semiconductor material having a lattice constant difference with silicon 5% or less and doped to have a first conductive type on the silicon substrate;
an active layer formed of a second semiconductor material having a lattice constant difference with the first semiconductor material 2% or less, an electron affinity difference with the first semiconductor material 0.1 eV or less, and an energy bandgap 0.5 eV greater than that of the first semiconductor material and doped to have a second conductive type opposite to the first conductive type on the blocking semiconductor layer;
a gate electrode formed to be separated by a gate dielectric layer on the active layer; and
source and drain electrodes formed to contact electrically to the active layer with having a specific interval from each other and being separated by the gate electrode,
wherein a first heterojunction is formed between the bulk silicon substrate and the blocking semiconductor layer and a second heterojunction is formed between the blocking semiconductor layer and the active layer.
2. The compound junctionless field effect transistor of claim 1, wherein the second semiconductor material has electron or hole mobility higher than that of the silicon.
3. The compound junctionless field effect transistor of claim 2, wherein:
the active layer is projected to have one sidewall at least on the blocking semiconductor layer, and
the gate dielectric layer and the gate electrode are formed on the sidewall to have a vertical channel structure.
4. The compound junctionless field effect transistor of claim 3, wherein:
the active layer is projected to have a cylindrical column shaped sidewall on the blocking semiconductor layer, and
the gate dielectric layer and the gate electrode are formed to wrap the cylindrical column shaped sidewall.
5. The compound junctionless field effect transistor of claim 1, wherein:
the active layer is doped with doping concentration to have majority carriers of the second semiconductor material be in degenerate states but to make an energy band be sloped at an operation time, and
the blocking semiconductor layer is doped with doping concentration to have majority carriers of the first semiconductor material be in non-degenerate states.
6. The compound junctionless field effect transistor of claim 5, wherein:
the active layer is doped with an n-type dopant to have Fermi level be formed within 3 kT over the minimum value of conduction band of the second semiconductor material at an absolute temperature T, and
the blocking semiconductor layer is doped with a p-type dopant to have Fermi level be formed at 3 kT or higher energies over the maximum value of valance band of the first semiconductor material at an absolute temperature T.
7. The compound junctionless field effect transistor of claim 5, wherein:
the active layer is doped to have the second conductive type be an n-type and to have the doping concentration of the n-type dopant be 9\xd71016\u02dc1\xd71018cm3, and
the blocking semiconductor layer is doped to have the first conductive type be a p-type and to have the doping concentration of the p-type dopant be 3.4\xd71017cm3 or lower.
8. The compound junctionless field effect transistor of claim 5, wherein:
the first semiconductor material is germanium (Ge) or silicon germanium (Si1-xGex), and
the second semiconductor material is gallium arsenide (GaAs).
9. The compound junctionless field effect transistor of claim 2, wherein:
the active layer is doped with doping concentration to have majority carriers of the second semiconductor material be in degenerate states but to make an energy band be sloped at an operation time, and
the blocking semiconductor layer is doped with doping concentration to have majority carriers of the first semiconductor material be in non-degenerate states.
10. The compound junctionless field effect transistor of claim 9, wherein:
the active layer is doped with an n-type dopant to have Fermi level be formed within 3 kT over the minimum value of conduction band of the second semiconductor material at an absolute temperature T, and
the blocking semiconductor layer is doped with a p-type dopant to have Fermi level be formed at 3 kT or higher energies over the maximum value of valance band of the first semiconductor material at an absolute temperature T.
11. The compound junctionless field effect transistor of claim 9, wherein:
the active layer is doped to have the second conductive type be an n-type and to have the doping concentration of the n-type dopant be 9\xd71016\u02dc1\xd71018cm3, and
the blocking semiconductor layer is doped to have the first conductive type be a p-type and to have the doping concentration of the p-type dopant be 3.4\xd71017cm3 or lower.
12. The compound junctionless field effect transistor of claim 9, wherein:
the first semiconductor material is germanium (Ge) or silicon germanium (Si1-xGex), and
the second semiconductor material is gallium arsenide (GaAs).
13. The compound junctionless field effect transistor of claim 3, wherein:
the active layer is doped with doping concentration to have majority carriers of the second semiconductor material be in degenerate states but to make an energy band be sloped at an operation time, and
the blocking semiconductor layer is doped with doping concentration to have majority carriers of the first semiconductor material be in non-degenerate states.
14. The compound junctionless field effect transistor of claim 13, wherein:
the active layer is doped with an n-type dopant to have Fermi level be formed within 3 kT over the minimum value of conduction band of the second semiconductor material at an absolute temperature T, and
the blocking semiconductor layer is doped with a p-type dopant to have Fermi level be formed at 3 kT or higher energies over the maximum value of valance band of the first semiconductor material at an absolute temperature T.
15. The compound junctionless field effect transistor of claim 13, wherein:
the active layer is doped to have the second conductive type be an n-type and to have the doping concentration of the n-type dopant be 9\xd71016\u02dc1\xd71018cm3, and
the blocking semiconductor layer is doped to have the first conductive type be a p-type and to have the doping concentration of the p-type dopant be 3.4\xd71017cm3 or lower.
16. The compound junctionless field effect transistor of claim 13, wherein:
the first semiconductor material is germanium (Ge) or silicon germanium (Si1-xGex), and
the second semiconductor material is gallium arsenide (GaAs).
17. The compound junctionless field effect transistor of claim 4, wherein:
the active layer is doped with doping concentration to have majority carriers of the second semiconductor material be in degenerate states but to make an energy band be sloped at an operation time, and
the blocking semiconductor layer is doped with doping concentration to have majority carriers of the first semiconductor material be in non-degenerate states.
18. The compound junctionless field effect transistor of claim 17, wherein:
the active layer is doped with an n-type dopant to have Fermi level be formed within 3 kT over the minimum value of conduction band of the second semiconductor material at an absolute temperature T, and
the blocking semiconductor layer is doped with a p-type dopant to have Fermi level be formed at 3 kT or higher energies over the maximum value of valance band of the first semiconductor material at an absolute temperature T.
19. The compound junctionless field effect transistor of claim 17, wherein:
the active layer is doped to have the second conductive type be an n-type and to have the doping concentration of the n-type dopant be 9\xd71016\u02dc1\xd71018cm3, and
the blocking semiconductor layer is doped to have the first conductive type be a p-type and to have the doping concentration of the p-type dopant be 3.4\xd71017cm3 or lower.
20. The compound junctionless field effect transistor of claim 17, wherein:
the first semiconductor material is germanium (Ge) or silicon germanium (Si1-xGex), and
the second semiconductor material is gallium arsenide (GaAs).

1. A machine for the production of ice, comprising a tubular pipe to form the ice, covered by a refrigerator evaporator, and having an auger inside to move the ice towards the delivery outlet, associated with a ring nut having a plurality of drawing holes arranged angularly spaced along a circumference, wherein said delivery outlet of said tubular pipe above said drawing holes is associated with a terminal inlet part of a conveyor of said ice, having a substantially upward axial extension and a terminal outlet part positioned at a level substantially higher than said top of said machine, wherein said conveyor comprises a first and a second longitudinal element having at least one terminal section coaxial with said tubular pipe, and a crushing element for said ice is present at an outlet end of said first longitudinal element.
2. A machine for the production of ice according to claim 1, wherein said delivery outlet of said tubular pipe opens at the top of said machine.
3. A machine for the production of ice according to claim 1, wherein at least said second longitudinal element is tubular.
4. A machine for the production of ice according to claim 1, wherein at least said first longitudinal element is tubular.
5. A machine for the production of ice according to claim 1, wherein said first longitudinal element is inside said second longitudinal tubular element with which it delimits an annular interspace facing said drawing holes.
6. A machine for the production of ice according to claim 5, wherein the radial extension of said annular interspace is not less than the diameter of the outlet cross-section of said drawing holes.
7. A machine for the production of ice according to claim 5, wherein the radial extension of said annular interspace is substantially equal to the diameter of the outlet cross-section of said drawing holes.
8. A machine for the production of ice according to claim 1, wherein said drawing holes taper progressively from their inlet cross-section to their outlet cross-section.
9. The machine for the production of ice according to claim 1, wherein said auger has a double screw.
10. The machine for the production of ice according to claim 1, wherein said first and second longitudinal elements are rectilinear.
11. The machine for the production of ice according to claim 1, wherein said first and second longitudinal elements are vertical.
12. The machine for the production of ice according to claim 1, wherein said first and second longitudinal elements present at least one angle.
13. The machine for the production of ice according to claim 12, wherein said angle is a right angle.
14. The machine for the production of ice according to claim 1, wherein said first and second longitudinal elements have a vertical section and a horizontal section.
15. The machine for the production of ice according to claim 1, wherein said crushing element has a deflecting surface which is tilted with respect to the axis of said first longitudinal element.
16. A machine for the production of ice, comprising a tubular pipe to form the ice, covered by a refrigerator evaporator, and having an auger inside to move the ice towards the delivery outlet, associated with a ring nut having a plurality of drawing holes arranged angularly spaced along a circumference, wherein said delivery outlet of said tubular pipe is associated with the terminal inlet part of a conveyor of said ice, having a substantially upward axial extension and a terminal outlet part positioned at a level substantially higher than said top of said machine, wherein said conveyor comprises a first and a second longitudinal element having at least one terminal section coaxial with said tubular pipe, and first and second connectors, respectively, between said ring nut and said respective first and second longitudinal elements.
17. The machine for the production of ice according to claim 16, wherein said first connector comprise an annular recess of the external side surface of said first longitudinal element, on which an extension is fitted of a central sleeve of said ring nut.
18. The machine for the production of ice according to claim 17, wherein said external side surface of said extension is substantially on the external side surface of said first longitudinal element.
19. The machine for the production of ice according to claim 18, wherein said extension has an internal thread for its coupling with an external counter-thread of said first internal tubular element.
20. The machine for the production of ice according to claim 16, wherein said second connector comprise an annular shoulder of said ring nut on which a second tubular element is supported.
21. The machine for the production of ice according to claim 20, wherein a side surface of said shoulder is substantially on the extension of the internal side surface of said second tubular element.
22. The machine for the production of ice according to claim 20, wherein the outlet end of said second tubular element bears a dispenser of said crushed ice, having a tilted bottom with respect to the axis of said second longitudinal element for sliding said crushed ice towards the exterior.
23. The machine for the production of ice according to claim 22, wherein said dispenser has one or more supply channels which are angularly spaced around the outlet end of said second tubular element.
24. The machine for the production of ice according to claim 20, wherein said second tubular element has an external insulation coating.
25. The machine for the production of ice according to claim 20, wherein said second tubular element is made of a transparent material, and that said insulation coating has at least one inspection window to view the interior of said second tubular element.
26. A machine for the production of ice comprising a tubular pipe to form the ice, covered by a refrigerator evaporator, and having an auger inside to move the ice towards the delivery outlet, associated with a ring nut having a plurality of drawing holes arranged angularly spaced along a circumference, wherein said delivery outlet of said tubular pipe is associated with the terminal inlet part of a conveyor of said ice, having a substantially upward axial extension and a terminal outlet part positioned at a level substantially higher than said top of said machine, and wherein a junction area between said ring nut and said conveyor is externally encircled by a collector of condensation water or water melted from said ice, drained from at least one drainage hole present on said external pipe.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A method for correcting color characteristics of a flat panel display, comprising:
using a signal generating device to generate an input signal RGB and inputting said input signal RGB to a flat panel display after said flat panel display is assembled;
using a color measurement instrument to measure a color displayed by said flat panel display to obtain an output value XYZ of said flat panel display;
obtaining corrected color characteristic values necessary for said flat panel display to display a target output value Txyz through the computation of an inverse function RGB=f\u22121(XYZ) between said input signal RGB and said output value XYZ according to a set specification, and storing said corrected color characteristic values together with an identification code of said flat panel display into a storage medium;
downloading corresponding corrected color characteristic values to a hard disk of a computer from said storage medium according to said identification code of said flat panel display through the installation procedure of said driver after said flat panel display is connected to said computer; and
said computer using said driver of said flat panel display to start a color characteristic correction mechanism, such that said flat panel display can display a corrected color according to said corrected color characteristic values.
2. The method of claim 1, wherein said storage medium is a database of a network server, and said corresponding corrected color characteristic values are downloaded to said hard disk of said computer from said database through Internet according to said identification code of said flat panel display through the installation procedure of said driver after said flat panel display is connected to said computer.
3. The method of claim 1, wherein said storage medium is an optical disk, and said corresponding corrected color characteristic values are downloaded to said hard disk of said computer from said optical disk according to said identification code of said flat panel display through the installation procedure of said driver after said flat panel display is connected to said computer.
4. The method of claims 1, wherein said computation of said inverse function according to said set specification comprising the steps of:
creating the relation of a characteristic function XYZ=f(RGB) and said inverse function RGB=f\u22121(XYZ) between said input signal RGB and said output value XYZ;
using the relation of said inverse function RGB=f\u22121(XYZ) to derive a target input value Trgb=f\u22121(Txyz) corresponding to a target output value Txyz according to said set specification;
creating a correction function g( ), which is Trgb=g (RGB) between said input signal RGB and said target input value Trgb; and
obtaining corrected color characteristic values necessary for said flat panel display to display said target output value Txyz through the computation of said correction function g( ).
5. The method of claims 2, wherein said computation of said inverse function according to said set specification comprising the steps of:
creating the relation of a characteristic function XYZ=f(RGB) and said inverse function RGB=f\u22121(XYZ) between said input signal RGB and said output value XYZ;
using the relation of said inverse function RGB=f\u22121(XYZ) to derive a target input value Trgb=f\u22121(Txyz) corresponding to a target output value Txyz according to said set specification;
creating a correction function g( ), which is Trgb=g (RGB) between said input signal RGB and said target input value Trgb; and
obtaining corrected color characteristic values necessary for said flat panel display to display said target output value Txyz through the computation of said correction function g( ).
6. The method of claims 3, wherein said computation of said inverse function according to said set specification comprising the steps of:
creating the relation of a characteristic function XYZ=f(RGB) and said inverse function RGB=f\u22121(XYZ) between said input signal RGB and said output value XYZ;
using the relation of said inverse function RGB=f\u22121(XYZ) to derive a target input value Trgb=f\u22121(Txyz) corresponding to a target output value Txyz according to said set specification;
creating a correction function g( ), which is Trgb=g (RGB) between said input signal RGB and said target input value Trgb; and
obtaining corrected color characteristic values necessary for said flat panel display to display said target output value Txyz through the computation of said correction function g( ).
7. A method for correcting color characteristics of a flat panel display, comprising:
a computer downloading corresponding corrected color characteristic values, necessary for said flat panel display to display a target output value Txyz, to a hard disk of said computer from a storage medium according to an identification code through the installation procedure of a driver of said flat panel display, after said flat panel display is connected to said computer; and
said computer using said driver of said flat panel display to start a color characteristic correction mechanism, so that said flat panel display shows a corrected color according to said corrected color characteristic values.
8. The method of claim 7, wherein said corrected color characteristic values are computed by a procedure comprising the steps of:
creating the relation of a characteristic function XYZ=f(RGB) and its inverse function RGB=f\u22121(XYZ) between an input signal RGB and an output value XYZ of said flat panel display;
using the relation of said inverse function RGB=f\u22121(XYZ) to derive a target input value Trgb=f\u22121(Txyz) corresponding to a target output value Txyz according to a set specification;
creating a correction function g( ), which is equal to Trgb=g (RGB), between said input signal RGB and said target input value Trgb; and
obtaining corrected color characteristic values necessary for said flat panel display to display said target output value Txyz through the computation of said correction function g( ).
9. A flat panel display capable of automatically correcting color characteristics, comprising:
a flat panel display, having an identification code;
a set of corrected color characteristic values, obtained by inputting an input signal RGB to said flat panel display after said flat panel display is assembled, examining an output value XYZ of said flat panel display, and computing corrected color characteristic values necessary for said flat panel display to display a target output value Txyz, according to a set specification, through the relation of an inverse function of RGB=f\u22121(XYZ) between said input signal RGB and said output value XYZ; and
a driver, for downloading said set of corrected color characteristic values to a hard disk of a computer according to said identification code of said flat panel display through the installation procedure of said driver of said computer after said flat panel display is connected to said computer, and using said driver to start a color characteristic correction mechanism, such that said flat panel display can display the corrected color according to said corrected color characteristic values.