1460718508-3261663d-9af2-4eaf-ac42-fb1404ef6e75

1. An operational method of a controller for a flash memory, the operational method comprising:
receiving target data read out from the flash memory;
outputting the received target data to a main memory; and
generating an error detection syndrome related to the received target data, after or simultaneously with completion of the output of the target data.
2. The operational method of claim 1, wherein the outputting comprises outputting the received target data simultaneously with the receiving of the target data, without using a buffer provided in the controller to store the received target data.
3. The operational method of claim 1, further comprising:
reading out the target data again based on the error detection syndrome.
4. The operational method of claim 3, further comprising:
calculating, before the target data is read out again, at least one of a location of an error and a corrected value with respect to the error when the error detection syndrome indicates presence of the error in the received target data.
5. The operational method of claim 4, further comprising:
outputting new target data to the main memory by inserting the corrected value in the target data read out again.
6. The operational method of claim 1, wherein the generating comprises starting generation of the error detection syndrome using Bose, Chaudhuri, and Hocquenghem (BCH) codes during reception of the target data.
7. The operational method of claim 4, wherein the reading comprises reading again part of the target data that includes the error.
8. A non-transitory computer-readable recording medium storing a program to cause a computer to implement the method of claim 1.
9. A controller for a flash memory, the controller comprising:
an interface to receive target data read out from the flash memory and to output the received target data to a main memory; and
an error detector to generate an error detection syndrome with respect to the received target data, after or simultaneously with completion of the output of the target data.
10. The controller of claim 9, wherein the interface outputs the received target data directly to the main memory without using a buffer provided in the controller to store the received target data.
11. The controller of claim 9, further comprising a command generator to generate a command for reading out the target data again based on the error detection syndrome.
12. The controller of claim 11, wherein the error detector calculates, before the target data is read out again, at least one of a location of an error and a corrected value with respect to the error when the error detection syndrome indicates presence of the error in the received target data.
13. The controller of claim 12, wherein
the error detector generates a command for inserting the corrected value in the target data read out again so as to generate new target data, and
the interface outputs the new target data to the main memory.
14. The controller of claim 9, wherein the error detector starts generation of the error detection syndrome using Bose, Chaudhuri, and Hocquenghem (BCH) codes during reception of the target data.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A flow module assembly, comprising:
a first housing;
a second housing at least partially disposed within the first housing, wherein the second housing comprises a first flow path; and
a MEMS flow module mounted to the second housing such that all flow through the first flow path is directed through the MEMS flow module;
wherein the MEMS flow module comprises:
a first plate defining a first flow port;
a tuning element, comprising a flexing member, in spaced relationship with the first plate and movable along an axis that corresponds with a direction of a flow entering the MEMS flow module through the first flow port, wherein a position of the tuning element is dependent upon a pressure being exerted on the tuning element by the flow entering the MEMS flow module through the first flow port, and wherein a flow rate of the flow exiting the MEMS flow module is dependent upon a position of the tuning element; and
a spring interconnecting the tuning element with the first plate;
a second plate comprising a second flow port and that is spaced from the tuning element, wherein the tuning element is located between the first and second plates and movement of the tuning element is in a direction from the first plate toward the second plate or from the second plate toward the first plate, and wherein at least a portion of the flow that enters the MEMS flow module through the first flow port exits the MEMS flow module through the second flow port.
2. A flow module assembly, as claimed in claim 1, wherein the first housing is selected from the group consisting of a rigid body, a deformable body, or a combination thereof.
3. A flow module assembly, as claimed in claim 1, wherein the first housing comprises first and second ends, as well as an opening extending between the first and second ends, wherein the second housing is disposed within the opening.
4. A flow module assembly, as claimed in claim 1, wherein the second housing is rigid.
5. A flow module assembly, as claimed in claim 1, wherein second housing is formed from a material selected from the group consisting of polymethylmethacrylate, titanium, implantable metals, and implantable plastics.
6. A flow module assembly, as claimed in claim 1, wherein the second housing comprises a cylindrical outer sidewall.
7. A flow module assembly, as claimed in claim 1, wherein the MEMS flow module is recessed entirely within the second housing.
8. A flow module assembly, as claimed in claim 1, wherein the second housing comprises first and second ends, wherein the first flow path extends between the first and second ends, and wherein the MEMS flow module is disposed on the first end of the second housing.
9. A flow module assembly, as claimed in claim 8, further comprising a third housing at least partially disposed within the first housing, wherein the third housing comprises a second flow path, wherein the MEMS flow module is sandwiched between the second and third housings, and thereby between the first and second flow paths.
10. A flow module assembly, as claimed in claim 1, wherein the MEMS flow module is maintained in a fixed position relative to the second housing.
11. A flow module assembly, as claimed in claim 1, wherein the MEMS flow module is bonded to the second housing.
12. A flow module assembly, as claimed in claim 1, wherein the flow module assembly is in an implant.
13. A flow module assembly, as claimed in claim 1 further comprising a plurality of springs movably interconnecting the tuning element with the first plate.
14. A flow module assembly, as claimed in claim 1 further comprising a first flow channel defined by a space between the tuning element and the first plate extending substantially parallel to the first plate, wherein at least a portion of the flow entering the MEMS flow module through the first flow port flow passes through the first flow channel before exiting the MEMS flow module.
15. A flow module assembly, as claimed in claim 1, wherein, during any movement of the tuning element relative to the first plate, a distance between the tuning element and the first plate is proportional across an entire extent of the tuning element.
16. A flow module assembly, as claimed in claim 1, wherein the a first plate comprises a first group of a plurality of first flow ports, wherein the tuning element is aligned with each the first flow port in the first group.
17. A flow module assembly, as claimed in claim 16, wherein all flow though any of the first flow ports in the first group is required to proceed around a perimeter of the tuning element.
18. A flow module assembly, as claimed in claim 17, wherein the tuning element comprises a plurality of tuning element flow ports, wherein the plurality of first flow ports in the first group and the plurality of tuning element flow ports are arranged such that a flow through any given the first flow port must change direction to flow through any of the plurality tuning element flow ports.
19. A flow module assembly, as claimed in claim 1, wherein the tuning element is disposed to change a direction of the flow entering the MEMS flow module through the first flow port before the flow exits the MEMS flow module.
20. A flow module assembly, as claimed in claim 1, wherein the tuning element is disposed such that the flow entering the MEMS flow module is directed at the tuning element in a normal direction, thereby exerts a normal force on the tuning element.
21. A flow module assembly, as claimed in claim 1, further comprising means for limiting a maximum amount of movement of the tuning element away from the first flow port.
22. A flow module assembly, as claimed in claim 1, wherein the MEMS flow module further comprises:
a plurality of the first flow ports;
a plurality of tuning elements, wherein at least one of the first flow port is associated with each the tuning elements; and
at least one spring separately interconnecting each tuning element with the first plate.
23. A flow module assembly, as claimed in claim 1, wherein the MEMS flow module further comprises an annular support interconnecting the first and second plates, wherein the first plate, the second plate, and the annular support collectively define an enclosed space.
24. A flow module assembly, as claimed in claim 23, wherein the second plate comprises at least one overpressure stop aligned with the tuning element.
25. A method for regulating a fluidic output from a first source, comprising the steps of:
providing the flow module assembly of claim 1;
directing a fluid from the first source through the first flow path and to a second source;
regulating a pressure of first source during the directing step, wherein the regulating step comprises providing greater than a proportional increase in a flow rate out of the MEMS flow module for an increase in a differential pressure across the MEMS flow module; and
filtering the first flow path, wherein the filtering step comprises retaining a constituent within the MEMS flow module that enters the MEMS flow module from the second source, that is of at least a first size, and that is attempting to proceed through the MEMS flow module and back to the first source.
26. A method, as claimed in claim 25, wherein:
the first source is selected form the group consisting of an anterior chamber of a human eye, a cranial reservoir, and a drug reservoir, and wherein the second source comprises the environment.
27. A method, as claimed in claim 25, wherein the first source is selected from the group consisting of a man-made reservoir and a biological reservoir.
28. A method, as claimed in claim 25, further comprising step of positioning the tuning element such that the flow entering the MEMS flow module exerts an orthogonal force on the tuning element.

1460718500-5568a2f4-1145-42df-aae3-3077ee5b9253

1. A stream bank stabilization and stream crossing system comprising:
means to secure plant growth medium to a first inclined slope and a second, opposing inclined slope;
a first footing located laterally behind the first inclined slope, and a second footing located laterally behind the second inclined slope; and
a bridge deck supported by and crossing between said first footing and said second footing, the bridge deck constructed so as to permit light and rain to reach the plant growth medium secured to the first and second inclined slopes in an area beneath the bridge deck.
2. The stream bank stabilization and stream crossing system of claim 1 wherein the means to secure plant growth medium comprises:
a plurality of geotextile bags containing the plant growth medium; and
a plurality of uni-dimensional structures to resist forces pulling the bags away from the inclined slopes.
3. The stream bank stabilization and stream crossing system of claim 1 wherein the means to secure plant growth medium comprises:
a plurality of geotextile bags containing the plant growth medium; and
a plurality of two-dimensional structures to resist forces pulling the bags away from the inclined slopes.
4. The stream bank stabilization and stream crossing system of claim 1 wherein the bridge deck comprises a steel grid or mesh.
5. The stream bank stabilization and stream crossing system of claim 1 wherein the first footing comprises post-tension compatible blocks.
6. The stream bank stabilization and stream crossing system of claim 1 wherein the plant growth medium comprises a soil amendment product.
7. The stream bank stabilization and stream crossing system of claim 1 wherein the plant growth medium contains plant seeds.
8. A culvert comprising:
a compacted backfill slope;
a bridge support at least partially buried in the compacted backfill slope;
a retaining wall of horizontally- and vertically-linked bags of soil, said bags further secured to the compacted backfill slope and to the bridge support; and
a bridge having a travel surface comprising openings that permit light and water to pass through the travel surface, said bridge resting on the bridge support and passing above the linked bags of soil.
9. The culvert of claim 8, further comprising:
a layer of granular backfill or free-draining native soil between the linked bags of soil and the compacted backfill slope.
10. The culvert of claim 8, further comprising:
a horizontal step in the compacted backfill slope, said step to form a path passing beneath the bridge.
11. The culvert of claim 8 wherein the linked bags of soil are covered with a nonwoven geotextile material.
12. The culvert of claim 8 wherein the linked bags of soil are covered with a porous material that admits water and through which plants can grow.
13. The culvert of claim 8 wherein the linked bags of soil are covered with a material that can accept plant seeds applied by hydraulic seeding.
14. The culvert of claim 8 wherein the retaining wall comprises a linked bag of a water-filtering material.
15. The culvert of claim 8 wherein the retaining wall comprises a linked bag containing rocks.
16. The culvert of claim 8 wherein the retaining wall comprises a linked bag containing sand.
17. A method of constructing a culvert, comprising:
compacting soil of a stream bank at a desired crossing point;
embedding bridge footings in the soil;
laying courses of geotextile bags containing plant growth medium to form a retaining wall on the stream bank;
securing at least some of the geotextile bags to other geotextile bags;
securing at least some of the geotextile bags to the bridge footings; and
placing a water- and light-passing bridge deck to span between the bridge footings.
18. The method of claim 17, further comprising:
planting the retaining wall by hydroseeding.
19. The method of claim 17 wherein the bridge footings comprise integral utility chaseways.
20. A stream crossing comprising:
a bridge footing of post-tension-compatible concrete blocks embedded in a stream bank;
a first course of geotextile bags containing rocks;
a plurality of upper courses of geotextile bags containing a soil amendment mixture to support plant growth, at least some of the bags of the first course connected to at least some of the bags of the upper courses by spikes, and at least some of the bags of the upper courses connected to the bridge footing by a tether, the first course and the upper courses forming a retaining wall against the stream bank; and
a steel grid bridge deck adjacent the bridge footing, the bridge deck placed so as to permit some light and some rain water to reach the upper courses of the retaining wall under the bridge deck.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An at least penta-sided-channel type of FinFET transistor comprising:
a base;
a semiconductor body formed on the base, the body being arranged in a long dimension to have sourcedrain regions sandwiching a channel region,
wherein the channel has at least five planar surfaces above the base;

a gate insulator on the channel region of the body; and
a gate electrode formed on the gate insulator.
2. The FinFET transistor of claim 1, wherein:
the base includes
an inverted T-shaped semiconductor structure having a horizontal portion and a fin extending perpendicularly therefrom, and
one or more isolation structures formed on the horizontal portion of the inverted T-shaped semiconductor structure, the one or more isolation structures extending above the fin so as to define a recess in the one or more isolation structures above the fin;

the channel region of the body is located over the recess; and
the semiconductor body has a stalk that extends down into and at least partially fills the recess.
3. The FinFET transistor of claim 1, further comprising:
sidewall spacers formed to at least partially fill the recess in the one or more isolation structures, the sidewall spacers being sized such that at least a portion of the fin remains exposed to the recess.
4. The FinFET transistor of claim 1, further comprising:
sidewall spacers formed on the fin.
5. The FinFET transistor of claim 1, wherein the channel is strained.
6. The FinFET transistor of claim 5, wherein the base includes strain-inducing material and the semiconductor body includes strained material.
7. The FinFET transistor of claim 5, wherein the semiconductor body includes strained material and strain-inducing material.
8. The FinFET transistor of claim 5, wherein the cross-section of the channel includes at least seven planar surfaces.
9. The FinFET transistor of claim 8, further comprising:
sidewall spacers formed on the fin.
10. The FinFET transistor of claim 9, wherein:
the sidewall spacers are sized such that at least a portion of the fin remains exposed to the recess.
11. The FinFET transistor of claim 5, wherein:
the base includes
a base semiconductor structure having a fin extending perpendicularly therefrom and shoulder portions above which the fin extends;
one or more isolation structures formed on the base semiconductor structure, the one or more isolation structures extending above the fin so as to define a recess in the one or more isolation structures above the fin; and

the channel region of the body is located over the recess; and
the semiconductor body has a stalk that extends down into and at least partially fills the recess.
12. The FinFET transistor of claim 1, wherein:
the base includes
a silicon on insulator (SOI) structure, and
a silicon fin formed on the SOI structure; and

the channel region is formed on the fin and the SOI structure.
13. The FinFET transistor of claim 12, wherein the channel includes at least seven planar surfaces.
14. The FinFET transistor of claim 12, wherein the channel is strained.
15. The FinFET transistor of claim 14, wherein the base includes strain-inducing material and the semiconductor body includes strained material.
16. The FinFET transistor of claim 14, wherein the semiconductor body includes strained material and strain-inducing material.
17. The FinFET transistor of claim 1, wherein:
the channel region is formed of silicon;
the at least five planar surfaces include at least two beveled surfaces;
the at least two beveled surfaces exhibit at least one of a {1,1,1} surface and a {3,1,1} surface.
18. The FinFET transistor of claim 17, wherein:
the channel, in the cross-section, has at least seven planar surfaces;
the at least seven planar surfaces include at least four beveled surfaces;
the at least four beveled surfaces exhibit both of the {1,1,1} and {3,1,1} surfaces.
19. The FinFET transistor of claim 18, wherein adjacent beveled surfaces alternate between being the {1,1,1} surface and the {3,1,1} surface.
20. The FinFET transistor of claim 19, further comprising:
sidewall spacers formed on the fin.
21. The FinFET transistor of claim 19, wherein:
the sidewall spacers are sized such that at least a portion of the fin remains exposed to the recess.
22. The FinFET transistor of claim 1, wherein:
the channel includes at least seven planar surfaces;
the base includes
a silicon on insulator (SOI) structure, and
a silicon fin formed on the SOI structure; and

the channel region is formed on the fin and the SOI structure.
23. The FinFET transistor of claim 1, wherein the channel includes at least seven planar surfaces.
24. The FinFET transistor of claim 23, wherein:
the base includes
an inverted T-shaped semiconductor structure having a horizontal portion and a fin extending perpendicularly therefrom, and
one or more isolation structures formed on the semiconductor layer, the one or more isolation structures extending above the fin so as to define a recess in the one or more isolation structures above the fin; and

the channel region of the body is located over the recess; and
the semiconductor body has a stalk extends down into and at least partially fills the recess.
25. A method of forming an at least penta-sided-channel type of FinFET transistor, the method comprising:
providing a base;
forming a fin on the base;
epitaxially growing a body of semiconductor material, which includes a channel region, on the base,
at least the channel region, in cross-section transverse to a long dimension of the body, having five or more planar surfaces above the base;

selectively doping the semiconductor body to produce, in the long dimension, sourcedrain regions sandwiching the channel region,
forming a gate insulator on the channel region of the body; and
forming a gate electrode formed on the gate insulator.
26. The method of claim 25, wherein the epitaxially growing of the body includes:
varying materials of an atmosphere in which the epitaxial growth occurs in order to induce a strained semiconductor material in the body.
27. The method of claim 25, wherein the epitaxially growing of the semiconductor body includes:
forming a semiconductor body with strain-inducing semiconductor material and strained semiconductor material on the fin.
28. The method of claim 25, wherein the epitaxially growing of the semiconductor body includes:
forming the base with strain-inducing semiconductor material; and
forming the semiconductor body with strained semiconductor material on the fin.
29. The method of claim 25, wherein:
the forming of the fin includes
providing a semiconductor substrate,
forming a mask on the semiconductor substrate,
forming trenches in the semiconductor substrate aside the mask to obtain an inverted T-shaped semiconductor structure having a horizontal portion and the fin extending perpendicularly therefrom;

the providing of the base includes
forming isolation structures that fill the trenches, and
removing the mask such that a recess remains relative to the isolation structures and located above the fin; and

the epitaxial growing of the body includes
starting the epitaxial growth on the fin,
filling the recess with the inchoate body, and
expanding the inchoate body out of the recess onto the isolation structures such that the five or more planar surfaces of the body are located above the isolation structures.
30. The method of claim 29, wherein the providing of the base further includes:
forming sidewall spacers on the fin.
31. The method of claim 30, wherein the providing the base further includes:
sizing the sidewall spacers such that at least a portion of the fin remains exposed to the recess.
32. The method of claim 25, wherein:
the providing of the base includes
providing a semiconductor substrate,
forming a buried oxide (BOX) structure on the semiconductor substrate;

the forming of the fin includes locating the fin on the BOX structure; and
the epitaxial growing of the body includes
starting the epitaxial growth on the fin, and
expanding the inchoate body off the fin and onto the BOX structure such that the five or more planar surfaces of the body are located above the BOX structure.
33. The method of claim 25, wherein:
the body is formed of silicon;
the at least five planar surfaces include at least two beveled surfaces;
the at least two beveled surfaces exhibit at least one of a {1,1,1} surface and a {3,1,1} surface.
34. The method of claim 25, wherein the epitaxially growing of the body includes:
varying a temperature at which the epitaxial growth occurs in order that the cross-section of the body includes at least seven planar surfaces.
35. The method of claim 34, wherein:
the body is formed of silicon;
the body, in the cross-section, has at least seven planar surfaces;
the at least seven planar surfaces include at least four beveled surfaces;
the at least four beveled surfaces exhibit both of the {1,1,1} and {3,1,1} surfaces.
36. The method of claim 35, wherein adjacent beveled surfaces alternate between being the {1,1,1} surface and the {3,1,1} surface.
37. A multi-sided-channel FinFET transistor comprising:
a base;
a semiconductor body formed on the base, the body being arranged in a long dimension to have sourcedrain regions sandwiching a channel region,
the channel having above the base a polygonal silhouette featuring five or more sides;

a gate insulator on the channel region of the body; and
a gate electrode formed on the gate insulator.
38. The FinFET of claim 37, wherein the polygonal silhouette has six or more sides.
39. A method of forming an at least penta-sided-channel type of FinFET transistor, the method comprising:
providing a base;
forming a fin on the base;
epitaxially growing a body of semiconductor material, which includes a channel region, on the base,
the channel, above the base, having a polygonal silhouette featuring five or more sides;

selectively doping the semiconductor body to produce, in the long dimension, sourcedrain regions sandwiching the channel region,
forming a gate insulator on the channel region of the body; and
forming a gate electrode formed on the gate insulator.
40. The method of claim 39, wherein the polygonal silhouette has six or more sides.