Author: claimsbot

1. A liquid crystal module, comprising:
a liquid crystal glass, plastic frames, a front frame, and a COF base film, connecting pins of the COF base film closely connects to a first end of the liquid crystal glass, the plastic frames cover a rim of the liquid crystal glass, the front frame abuts against the plastic frames arranged on two opposite surfaces of the liquid crystal glass to fasten the liquid crystal glass; and
wherein the liquid crystal module further comprises a positioning member causing the COF base film to bend toward a predetermined direction, and at least one end of the positioning member is fixed between the front frame and the plastic frame by the front frame;
after the COF base film is bent, a second end of the COF base film is at a distance from the positioning member or from the plastic frames.
2. The liquid crystal module as claimed in claim 1, wherein the positioning member is an L-shaped sheet made by plastic or metallic material, and a width of the positioning member is less than 0.3 mm.
3. A liquid crystal module, comprising:
a liquid crystal glass, plastic frames, a front frame, and a COF base film, connecting pins of the COF base film closely connects to a first end of the liquid crystal glass, the plastic frames cover a rim of the liquid crystal glass, the front frame abuts against the plastic frames arranged on two opposite surfaces of the liquid crystal glass to fasten the liquid crystal glass; and
wherein the liquid crystal module further comprises a positioning member causing the COF base film to bend toward a predetermined direction, and at least one end of the positioning member is fixed between the front frame and the plastic frame by the front frame.
4. The liquid crystal module as claimed in claim 3, wherein an L-shaped holding cavity is defined in an internal side of the positioning member.
5. The liquid crystal module as claimed in claim 4, wherein the positioning member causes a first end of the COF base film connecting to the first end of the liquid crystal glass to bend such that the COF base film is received in the holding cavity.
6. The liquid crystal module as claimed in claim 5, wherein a shape of the front frame is the same with that of the positioning member, and an internal wall of the front frame abuts against the positioning member.
7. The liquid crystal module as claimed in claim 6, wherein a width of the positioning member is less than or equal to the width of the COF base film.
8. The liquid crystal module as claimed in claim 6, wherein a width of the positioning member is less than 0.3 mm.
9. The liquid crystal module as claimed in claim 6, wherein the positioning member is an L-shaped sheet made by plastic or metallic material.
10. The liquid crystal module as claimed in claim 9, wherein the positioning member comprises a horizontal sheet and a vertical sheet connected to the horizontal sheet, after the COF base film is bent, the first end and the second end of the COF base film are respectively parallel to the horizontal sheet and the vertical sheet of the positioning member.
11. The liquid crystal module as claimed in claim 5, wherein after the COF base film is bent, at least the second end of the COF base film is at a distance from the positioning member or the plastic frames.
12. A liquid crystal display, comprising:
a liquid crystal module comprising a liquid crystal glass, plastic frames, a front frame, and a COF base film, connecting pins of the COF base film closely connects to a first end of the liquid crystal glass, the plastic frames covers a rim of the liquid crystal glass, the front frame abuts against the plastic frames arranged on two opposite surfaces of the liquid crystal glass to fasten the liquid crystal glass; and
wherein the liquid crystal module further comprises a positioning member for bending the COF base film toward a predetermined direction, and at least one end of the positioning member is fixed between the front frame and the plastic frame by the front frame.
13. The liquid crystal display as claimed in claim 12, wherein an L-shaped holding cavity is defined in an internal side of the positioning member.
14. The liquid crystal display as claimed in claim 13, wherein the positioning member causes a first end of the COF base film connecting to the first end of the liquid crystal glass to bend such that the COF base film is received in the holding cavity.
15. The liquid crystal display as claimed in claim 14, wherein a shape of the front frame is the same with that of the positioning member, and an internal wall of the front frame abuts against the positioning member.
16. The liquid crystal display as claimed in claim 15, wherein a width of the positioning member is less than or equal to the width of the COF base film.
17. The liquid crystal display as claimed in claim 15, wherein a width of the positioning member is less than 0.3 mm.
18. The liquid crystal display as claimed in claim 15, wherein the positioning member is an L-shaped sheet made by plastic or metallic material.
19. The liquid crystal display as claimed in claim 18, wherein the positioning member comprises a horizontal sheet and a vertical sheet connected to the horizontal sheet, after the COF base film is bent, the first end and the second end of the COF base film are respectively parallel to the horizontal sheet and the vertical sheet of the positioning member.
20. The liquid crystal display as claimed in claim 15, wherein after the COF base film is bent, at least the second end of the COF base film is at a distance from the positioning member or the plastic frames.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A semiconductor device comprising:
a multi-layered wiring substrate having a main surface, a rear surface, and at least one inner layer;
first and second transistors each having first, second, and third transistor electrodes and mounted on the main surface of the multi-layered wiring substrate; and
at least one input-side capacitor having first and second capacitor electrodes and mounted on the rear surface of the multi-layered wiring substrate,
wherein the multi-layered wiring substrate includes:
first wiring layers to be supplied with a first potential formed on at least the main surface and the rear surface;
a second wiring layer to be supplied with a second potential formed on at least the main surface;
third wiring layers to be supplied with a third potential formed on each of the main surface, the rear surface, and the inner layer;
at least one first via conductor for electrically connecting among the first wiring layers in a thickness direction of the multi-layered wiring substrate; and
at least one second via conductor for electrically connecting among the third wiring layers in the thickness direction,
wherein the first transistor is mounted on the first wiring layer on the main surface so that the first transistor electrode of the first transistor is electrically connected to the first wiring layer on the main surface, and the second transistor electrode of the first transistor is electrically connected to the second wiring layer on the main surface,
wherein the second transistor is mounted on the second wiring layer on the main surface so that the first transistor electrode of the second transistor is electrically connected to the second wiring layer on the main surface, and the second transistor electrode of the second transistor is electrically connected to the third wiring layer on the main surface,
wherein the first capacitor electrode of the input-side capacitor is electrically connected to the first wiring layer, and the second capacitor electrode of the input-side capacitor is electrically connected to the third wiring layer, and
the multi-layered wiring substrate includes:
a third via conductor for the input-side capacitor arranged at a position of the first capacitor electrode and for electrically connecting among the first wiring layers in the thickness direction; and
a fourth via conductor for the input-side capacitor arranged at a position of the second capacitor electrode and for electrically connecting among the third wiring layers in the thickness direction, and
the first via conductor being arranged directly below the first transistor, and a cross-sectional area of the first via conductor being larger than cross-sectional areas of the via conductor for the input-side capacitor and the via conductor for the input-side capacitor.
2. The semiconductor device according to claim 1, wherein
the second transistor electrode and the third transistor electrode of each of the first transistor and the second transistor are formed on a main surface of a semiconductor chip where each of the first transistor and the second transistor is formed, and the first transistor electrode of each of the first transistor and the second transistor is formed on a rear surface of the semiconductor chip where each of the first transistor and the second transistor is formed.
3. A semiconductor device comprising:
a multi-layered wiring substrate having a main surface, a rear surface, and at least one inner layer;
first and second transistors each having first, second, and third transistor electrodes and mounted on the main surface of the multi-layered wiring substrate; and
at least one input-side capacitor having first and second capacitor electrodes and mounted on the rear surface of the multi-layered wiring substrate,
wherein the multi-layered wiring substrate includes:
first wiring layers to be supplied with a first potential formed on at least the main surface and the rear surface;
a second wiring layer to be supplied with a second potential formed on at least the main surface;
third wiring layers to be supplied with a third potential formed on each of the main surface, the rear surface, and the inner layer;
at least one first via conductor for electrically connecting among the first wiring layers in a thickness direction of the multi-layered wiring substrate; and
at least one second via conductor for electrically connecting among the third wiring layers in the thickness direction,
wherein the first transistor is mounted on the first wiring layer on the main surface so that the first transistor electrode of the first transistor is electrically connected to the first wiring layer on the main surface, and the second transistor electrode of the first transistor is electrically connected to the second wiring layer on the main surface,
wherein the second transistor is mounted on the second wiring layer on the main surface so that the first transistor electrode of the second transistor is electrically connected to the second wiring layer on the main surface, and the second transistor electrode of the second transistor is electrically connected to the third wiring layer on the main surface,
wherein the first capacitor electrode of the input-side capacitor is electrically connected to the first wiring layer, and the second capacitor electrode of the input-side capacitor is electrically connected to the third wiring layer, and
the multi-layered wiring substrate includes:
a third via conductor for the input-side capacitor arranged at a position of the first capacitor electrode and for electrically connecting among the first wiring layers in the thickness direction; and
a fourth via conductor for the input-side capacitor arranged at a position of the second capacitor electrode and for electrically connecting among the third wiring layers in the thickness direction,
at least one fifth via conductor for electrically connecting among the second wiring layers in the thickness direction,
the at least one fifth via conductor arranged directly below the second transistor, and
wherein a cross-sectional area of the at least one fifth via conductor is larger than cross-sectional areas of the third via conductor for the input-side capacitor and the fourth via conductor for the input-side capacitor.
4. A multi-layered wiring substrate comprising: a main surface; a rear surface; and at least one inner layer, first and second transistor being mounted on the main surface, and at least one input-side capacitor, which has first and second capacitor electrodes, being mounted on the rear surface,
wherein the multi-layered wiring substrate includes:
first wiring layers to be supplied with a first potential formed on at least the main surface and the rear surface;
a wiring layer to be supplied with a second potential formed on at least the main surface;
third wiring layers to be supplied with a third potential formed on each of the main surface, the rear surface, and the inner layer;
at least one first via conductor for electrically connecting among the first wiring layers in a thickness direction of the multi-layered wiring substrate; and
at least one second via conductor for electrically connecting among the third wiring layers in the thickness direction,
wherein the first capacitor electrode of the input-side capacitor is electrically connected to the first wiring layer, and the second capacitor electrode of the input-side capacitor is electrically connected to the third wiring layer, and
the multi-layered wiring substrate includes:
a third via conductor for the input-side capacitor arranged at a position of the first capacitor electrode and for electrically connecting among the first-potential wiring layers in the thickness direction; and
a fourth via conductor for the input-side capacitor arranged at a position of the second capacitor electrode and for electrically connecting among the wiring layers in the thickness direction,
wherein cross-sectional areas of the first via conductor and the second via conductor are larger than cross-sectional areas of the third via conductor and the fourth via conductor.

1. A single crystal semiconductor body having a trench with sidewall portions disposed in different crystallographic planes of the body, such sidewall portions having thereon substantially uniformly thick, thermally grown, silicon dioxide material.
2-4. (Cancelled)
5. A single crystal semiconductor body comprising:
a trench formed in a surface of said single crystal semiconductor body, having sidewall portions being disposed in different crystallographic planes of the body;
first sidewall portions disposed in a first one of the different crystallographic planes;
a first layer of silicon dioxide material grown on said first sidewall portions at a first rate and to a first thickness when subjected to a thermal oxidation process;
second sidewall portions disposed in a second one of the different crystallographic planes; and
a second layer of silicon dioxide grown on said second sidewall portion at a second rate and on said first layer of said silicon dioxide material at a rate slower than said second rate wherein said first and second sidewall portions of the trench are subjected to a thermal oxidation process such that the thickness of said second layer of silicon dioxide on said second sidewall portions is substantially equal to the thickness of both said first and second layers of silicon dioxide on said first sidewall portions.
6. A single crystal semiconductor body comprising:
a surface having portions thereof disposed in a different crystallographic planes
a relatively thin material on selected ones of the surface portions, said selected ones of the surface portions residing in a first crystallographic plane;
a layer of silicon dioxide grown over said relatively thin material at a first rate by a thermal oxidation process to a selected thickness; and
said silicon dioxide grown at a second rate during said thermal oxidation process on unselected surface portions in a different crystallographic plane, said second rate different than said first rate such that the thickness of said silicon dioxide grown over both the selected surface portions and the unselected surface portions are substantially uniform.
7. The semiconductor body of claim 5 wherein said first sidewall portions are disposed in the <100> crystallographic plane and said second sidewall portions are disposed in the <110> crystallographic plane.
8. The semiconductor body of claim 6 wherein the relatively thin material is silicon nitride.
9. The semiconductor body of claim 6 further comprising another layer of silicon dioxide formed on said relatively thin material such that said another layer of silicon dioxide and said layer of silicon dioxide grown over said relatively thin material have a combined thickness substantially the same as the thickness of said layer of silicon dioxide grown on said unselected surface portions of said semiconductor body.
10. The semiconductor body of claim 6 wherein the relatively thin material is less than approximately 20 Angstroms.
11. The semiconductor body of claim 6 wherein the relatively thin material forms a layer which is thinner than the corresponding oxide layer grown on the selected and unselected surface portions.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A device for transmitting energy between a control unit and a position-measuring device via a line pair in a charge mode and for transmitting data between the control unit and the position-measuring device via the line pair in a communication mode, comprising:
an energy storage device arranged in the position-measuring device, the energy storage device being chargeable by the line pair in the charge mode and adapted to supply energy to the position-measuring device in the communication mode;
a charge unit arranged in the control unit; and
a switching device arranged in the control unit and adapted to connect the charge unit to the line pair in a two-pole manner in the charge mode.
2. The device according to claim 1, further comprising:
a charge-control unit arranged in the charge unit; and
switch elements;
wherein the charge-control unit is adapted to actuate the switch element to output a voltage of a voltage source, for charging the energy storage device, with two polarities.
3. The device according to claim 2, further comprising a zero-crossing detector arranged in the charge unit and adapted to determine a current zero crossing of the charge current and to signal the current zero crossing to the charge-control unit.
4. The device according to claim 1, further comprising a rectifier unit arranged in the position-measuring device, between the energy storage device and the line pair.
5. The device according to claim 1, further comprising an evaluation unit arranged in the position-measuring device and adapted to detect an end of the charge mode by analyzing voltage levels or a time characteristic of signals between lines of the line pair.
6. A system, comprising:
a position-measuring device;
a control unit;
a line pair connected to the position-measuring device and to the control unit; and
a device adapted to transmit energy between the control unit and the position-measuring device via the line pair in a charge mode and to transmit data between the control unit and the position-measuring device via the line pair in a communication mode, including:
an energy storage device arranged in the position-measuring device, the energy storage device being chargeable by the line pair in the charge mode and adapted to supply energy to the position-measuring device in the communication mode;
a charge unit arranged in the control unit; and
a switching device arranged in the control unit and adapted to connect the charge unit to the line pair in a two-pole manner in the charge mode.
7. A method, comprising: for transmitting energy and data between a control unit and a position-measuring device via a line pair, comprising:
in a charge mode, transmitting energy between a control unit and a position-measuring device via a line pair;
in a communication mode, transmitting data between the control unit and the position-measuring device via the line pair;
in the charge mode, charging, via the line pair, an energy storage device provided in the position-measuring device;
in the communication mode, supplying energy to the position-measuring device;
in the charge mode, connecting a charge unit, provided in the control unit, to the line pair in a two-pole manner by a switching device.
8. The method according to claim 7, further comprising separating the line pair from the charge unit by the switching device at an end of the charge mode.
9. The method according to claim 7, further comprising actuating switching elements by a charge-control unit, arranged in the charge unit, to reverse, at least once in each charge state, a polarity of a charge voltage output by the charge unit to charge the energy storage device.
10. The method according to claim 9, further comprising:
detecting, by a zero-crossing detector arranged in the charge unit, a current zero crossing of a charge current triggered by the polarity reversal of the charge current; and
signaling the current zero crossing to the charge-control unit.
11. The method according to claim 7, further comprising detecting, by an evaluation unit arranged in the position-measuring device, an end of the charge mode by analyzing voltage levels or a time characteristic of signals between lines of the line pair.